X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=plugins%2Fgpulib%2Fgpu.h;h=28f10fa4c5e7e9a92232efa3f2c208c23f23d42f;hb=5bbe183f3aa15f21613fcf58ead2016c9283a842;hp=d1a3a75be0838dc4e712d58aa053e77c09f11e1e;hpb=5201e92fd5476d5022d0e74521c50334ebf94935;p=pcsx_rearmed.git diff --git a/plugins/gpulib/gpu.h b/plugins/gpulib/gpu.h index d1a3a75b..28f10fa4 100644 --- a/plugins/gpulib/gpu.h +++ b/plugins/gpulib/gpu.h @@ -19,37 +19,34 @@ extern "C" { #define CMD_BUFFER_LEN 1024 +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ +#define HTOLE32(x) __builtin_bswap32(x) +#define HTOLE16(x) __builtin_bswap16(x) +#define LE32TOH(x) __builtin_bswap32(x) +#define LE16TOH(x) __builtin_bswap16(x) +#else +#define HTOLE32(x) (x) +#define HTOLE16(x) (x) +#define LE32TOH(x) (x) +#define LE16TOH(x) (x) +#endif + +#define BIT(x) (1 << (x)) + +#define PSX_GPU_STATUS_DHEIGHT BIT(19) +#define PSX_GPU_STATUS_PAL BIT(20) +#define PSX_GPU_STATUS_RGB24 BIT(21) +#define PSX_GPU_STATUS_INTERLACE BIT(22) +#define PSX_GPU_STATUS_BLANKING BIT(23) +#define PSX_GPU_STATUS_IMG BIT(27) +#define PSX_GPU_STATUS_DMA(x) ((x) << 29) +#define PSX_GPU_STATUS_DMA_MASK (BIT(29) | BIT(30)) + struct psx_gpu { uint32_t cmd_buffer[CMD_BUFFER_LEN]; uint32_t regs[16]; uint16_t *vram; - union { - uint32_t reg; - struct { - uint32_t tx:4; // 0 texture page - uint32_t ty:1; - uint32_t abr:2; - uint32_t tp:2; // 7 t.p. mode (4,8,15bpp) - uint32_t dtd:1; // 9 dither - uint32_t dfe:1; - uint32_t md:1; // 11 set mask bit when drawing - uint32_t me:1; // 12 no draw on mask - uint32_t unkn:3; - uint32_t width1:1; // 16 - uint32_t width0:2; - uint32_t dheight:1; // 19 double height - uint32_t video:1; // 20 NTSC,PAL - uint32_t rgb24:1; - uint32_t interlace:1; // 22 interlace on - uint32_t blanking:1; // 23 display not enabled - uint32_t unkn2:2; - uint32_t busy:1; // 26 !busy drawing - uint32_t img:1; // 27 ready to DMA image data - uint32_t com:1; // 28 ready for commands - uint32_t dma:2; // 29 off, ?, to vram, from vram - uint32_t lcf:1; // 31 - }; - } status; + uint32_t status; uint32_t gp0; uint32_t ex_regs[8]; struct { @@ -57,6 +54,7 @@ struct psx_gpu { int x, y, w, h; int x1, x2; int y1, y2; + int src_x, src_y; } screen; struct { int x, y, w, h; @@ -73,6 +71,7 @@ struct psx_gpu { uint32_t enhancement_active:1; uint32_t downscale_enable:1; uint32_t downscale_active:1; + uint32_t dims_changed:1; uint32_t *frame_count; uint32_t *hcnt; /* hsync count */ struct { @@ -82,6 +81,10 @@ struct psx_gpu { uint32_t hcnt; } last_list; uint32_t last_vram_read_frame; + uint32_t w_out_old, h_out_old, status_vo_old; + int screen_centering_type; // 0 - auto, 1 - game conrolled, 2 - manual + int screen_centering_x; + int screen_centering_y; } state; struct { int32_t set:3; /* -1 auto, 0 off, 1-3 fixed */ @@ -96,8 +99,7 @@ struct psx_gpu { uint32_t pending_fill[3]; } frameskip; uint32_t scratch_ex_regs[8]; // for threaded rendering - int useDithering:1; /* 0 - off , 1 - on */ - uint16_t *(*get_enhancement_bufer) + void *(*get_enhancement_bufer) (int *x, int *y, int *w, int *h, int *vram_h); uint16_t *(*get_downscale_buffer) (int *x, int *y, int *w, int *h, int *vram_h); @@ -136,7 +138,7 @@ struct GPUFreeze; long GPUinit(void); long GPUshutdown(void); void GPUwriteDataMem(uint32_t *mem, int count); -long GPUdmaChain(uint32_t *rambase, uint32_t addr); +long GPUdmaChain(uint32_t *rambase, uint32_t addr, uint32_t *progress_addr); void GPUwriteData(uint32_t data); void GPUreadDataMem(uint32_t *mem, int count); uint32_t GPUreadData(void);