X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=testpico%2Fmain.c;h=0e6c69215eec64537d5af5c5a078de4d1988b31b;hb=4f936a9c6b1180ffe82b618bacade0c746cd3c18;hp=804fc6153ab54fffec487ff1590314f3a7535935;hpb=cc7e512231d610dbe477d56ffffd56bdff78285d;p=megadrive.git diff --git a/testpico/main.c b/testpico/main.c index 804fc61..0e6c692 100644 --- a/testpico/main.c +++ b/testpico/main.c @@ -4,20 +4,7 @@ */ #include #include - -#define u8 unsigned char -#define u16 unsigned short -#define u32 unsigned int - -#define noinline __attribute__((noinline)) -#define unused __attribute__((unused)) -#define _packed __attribute__((packed)) - -#define mem_barrier() \ - asm volatile("":::"memory") - -#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) - +#include "common.h" #include "asmtools.h" #define VDP_DATA_PORT 0xC00000 @@ -36,19 +23,6 @@ #define APLANE (TILE_MEM_END + 0x1000) #define BPLANE (TILE_MEM_END + 0x3000) -#define read8(a) \ - *((volatile u8 *) (a)) -#define read16(a) \ - *((volatile u16 *) (a)) -#define read32(a) \ - *((volatile u32 *) (a)) -#define write8(a, d) \ - *((volatile u8 *) (a)) = (d) -#define write16(a, d) \ - *((volatile u16 *) (a)) = (d) -#define write32(a, d) \ - *((volatile u32 *) (a)) = (d) - #define write16_z80le(a, d) \ ((volatile u8 *)(a))[0] = (u8)(d), \ ((volatile u8 *)(a))[1] = ((d) >> 8) @@ -336,8 +310,6 @@ struct exc_frame { }; } _packed; -int xtttt(void) { return sizeof(struct exc_frame); } - void exception(const struct exc_frame *f) { int i; @@ -1296,17 +1268,23 @@ static int t_tim_vdp_as_cram_w(void) return ok; } +struct irq_test { + u16 cnt; + union { + u16 hv; + u8 v; + } first, last; +}; + static int t_irq_hint(void) { - u16 *ram = (u16 *)0xfff000; - u8 *ram8 = (u8 *)0xfff000; - u16 v_p, cnt_p; + struct irq_test *it = (void *)0xfff000; int ok = 1; // for more fun, disable the display VDP_setReg(VDP_MODE2, VDP_MODE2_MD); - ram[0] = ram[1] = ram[2] = 0; + it->cnt = it->first.hv = it->last.hv = 0; memcpy_((void *)0xff0100, test_hint, test_hint_end - test_hint); VDP_setReg(10, 0); while (read8(VDP_HV_COUNTER) != 100) @@ -1318,24 +1296,39 @@ static int t_irq_hint(void) move_sr(0x2000); burn10(488 * 2 / 10); move_sr(0x2700); - v_p = ram8[2]; - cnt_p = ram[0]; - ram[0] = ram[1] = ram[2] = 0; + expect(ok, it->first.v, 229); // pending irq trigger + expect(ok, it->cnt, 1); + // count irqs + it->cnt = it->first.hv = it->last.hv = 0; move_sr(0x2000); while (read8(VDP_HV_COUNTER) != 4) ; while (read8(VDP_HV_COUNTER) != 228) ; move_sr(0x2700); - VDP_setReg(VDP_MODE1, VDP_MODE1_PS); + expect(ok, it->cnt, 225); + expect(ok, it->first.v, 0); + expect(ok, it->last.v, 224); + VDP_setReg(VDP_MODE2, VDP_MODE2_MD | VDP_MODE2_DMA | VDP_MODE2_DISP); - expect(ok, v_p, 229); // pending irq trigger - expect(ok, cnt_p, 1); - expect(ok, ram[0], 225); // count - expect(ok, ram8[2], 0); // first line - expect(ok, ram8[4], 224); // last line + // detect reload line + it->cnt = it->first.hv = it->last.hv = 0; + VDP_setReg(10, 17); + move_sr(0x2000); + while (read16(VDP_CTRL_PORT) & 8) + /* blanking */; + VDP_setReg(10, 255); + while (read8(VDP_HV_COUNTER) != 228) + ; + move_sr(0x2700); + expect(ok, it->cnt, 1); + expect(ok, it->first.v, 17); + expect(ok, it->last.v, 17); + + VDP_setReg(VDP_MODE1, VDP_MODE1_PS); + return ok; } @@ -1351,6 +1344,11 @@ static int t_irq_ack_v_h(void) memcpy_((void *)0xff0100, test_hint, test_hint_end - test_hint); memcpy_((void *)0xff0140, test_vint, test_vint_end - test_vint); VDP_setReg(10, 0); + /* ensure hcnt reload */ + while (!(read16(VDP_CTRL_PORT) & 8)) + /* not blanking */; + while (read16(VDP_CTRL_PORT) & 8) + /* blanking */; VDP_setReg(VDP_MODE1, VDP_MODE1_PS | VDP_MODE1_IE1); VDP_setReg(VDP_MODE2, VDP_MODE2_MD | VDP_MODE2_IE0); while (read8(VDP_HV_COUNTER) != 100) @@ -1529,51 +1527,239 @@ static int t_irq_f_flag_h32(void) return ok; } +// 32X + +static int t_32x_init(void) +{ + void (*do_32x_enable)(void) = (void *)0xff0040; + u32 M_OK = MKLONG('M','_','O','K'); + u32 S_OK = MKLONG('S','_','O','K'); + u32 *r = (u32 *)0xa15100; + u16 *r16 = (u16 *)r; + int i, ok = 1; + + //v1070 = read32(0x1070); + + /* what does REN mean exactly? + * Seems to be sometimes clear after reset */ + for (i = 0; i < 1000000; i++) + if (read16(r16) & 0x80) + break; + expect(ok, r16[0x00/2], 0x82); + expect(ok, r16[0x02/2], 0); + expect(ok, r16[0x04/2], 0); + expect(ok, r16[0x06/2], 0); + expect(ok, r[0x14/4], 0); + expect(ok, r[0x18/4], 0); + expect(ok, r[0x1c/4], 0); + write32(&r[0x20/4], 0); // master resp + write32(&r[0x24/4], 0); // slave resp + write32(&r[0x28/4], 0); + write32(&r[0x2c/4], 0); + + // could just set RV, but BIOS reads ROM, so can't + memcpy_(do_32x_enable, x32x_enable, + x32x_enable_end - x32x_enable); + do_32x_enable(); + + expect(ok, r16[0x00/2], 0x83); + expect(ok, r16[0x02/2], 0); + expect(ok, r16[0x04/2], 0); + expect(ok, r16[0x06/2], 1); // RV + expect(ok, r[0x14/4], 0); + expect(ok, r[0x18/4], 0); + expect(ok, r[0x1c/4], 0); + expect(ok, r[0x20/4], M_OK); + while (!read16(&r16[0x24/2])) + ; + expect(ok, r[0x24/4], S_OK); + write32(&r[0x20/4], 0); + return ok; +} + +static void x32_cmd(enum x32x_cmd cmd, u32 a0, u32 a1, u16 is_slave) +{ + u16 v, *r = (u16 *)0xa15120; + u16 cmd_s = cmd | (is_slave << 15); + int i; + + write32(&r[4/2], a0); + write32(&r[8/2], a1); + mem_barrier(); + write16(r, cmd_s); + mem_barrier(); + for (i = 0; i < 10000 && (v = read16(r)) == cmd_s; i++) + burn10(1); + if (v != 0) { + printf("cmd clr: %x\n", v); + mem_barrier(); + printf("c, e: %02x %02x\n", r[0x0c/2], r[0x0e/2]); + write16(r, 0); + } + v = read16(&r[1]); + if (v != 0) { + printf("cmd err: %x\n", v); + write16(&r[1], 0); + } +} + +static int t_32x_echo(void) +{ + u16 *r = (u16 *)0xa15120; + int ok = 1; + + x32_cmd(CMD_ECHO, 0x12340000, 0, 0); + expect(ok, r[0x06/2], 0x1234); + x32_cmd(CMD_ECHO, 0x23450000, 0, 1); + expect(ok, r[0x06/2], 0xa345); + return ok; +} + +static int t_32x_md_bios(void) +{ + void (*do_call_c0)(int a, int d) = (void *)0xff0040; + u8 *rmb = (u8 *)0xff0000; + u32 *rl = (u32 *)0; + int ok = 1; + + memcpy_(do_call_c0, test_32x_b_c0, + test_32x_b_c0_end - test_32x_b_c0); + write8(rmb, 0); + do_call_c0(0xff0000, 0x5a); + + expect(ok, rmb[0], 0x5a); + expect(ok, rl[0x04/4], 0x880200); + return ok; +} + +static int t_32x_md_rom(void) +{ + u32 *rl = (u32 *)0; + int ok = 1; + + expect(ok, rl[0x004/4], 0x880200); + expect(ok, rl[0x100/4], 0x53454741); + expect(ok, rl[0x70/4], 0); + write32(&rl[0x70/4], 0xa5123456); + write32(&rl[0x78/4], ~0); + mem_barrier(); + expect(ok, rl[0x78/4], 0x8802ae); + expect(ok, rl[0x70/4], 0xa5123456); + //expect(ok, rl[0x1070/4], v1070); + write32(&rl[0x70/4], 0); + // with RV 0x880000/0x900000 hangs, can't test + return ok; +} + +static int t_32x_md_fb(void) +{ + u8 *fbb = (u8 *)0x840000; + u16 *fbw = (u16 *)fbb; + u32 *fbl = (u32 *)fbb; + u8 *fob = (u8 *)0x860000; + u16 *fow = (u16 *)fob; + u32 *fol = (u32 *)fob; + int ok = 1; + + fbl[0] = 0x12345678; + fol[1] = 0x89abcdef; + mem_barrier(); + expect(ok, fbw[1], 0x5678); + expect(ok, fow[2], 0x89ab); + fbb[0] = 0; + fob[1] = 0; + fbw[1] = 0; + fow[2] = 0; + fow[3] = 1; + mem_barrier(); + fow[3] = 0x200; + mem_barrier(); + expect(ok, fol[0], 0x12340000); + expect(ok, fbl[1], 0x89ab0201); + return ok; +} + +static int t_32x_sh_fb(void) +{ + u32 *fbl = (u32 *)0x840000; + int ok = 1; + + fbl[0] = 0x12345678; + fbl[1] = 0x89abcdef; + mem_barrier(); + write8(0xa15100, 0x80); // FM=1 + x32_cmd(CMD_WRITE8, 0x24000000, 0, 0); + x32_cmd(CMD_WRITE8, 0x24020001, 0, 0); + x32_cmd(CMD_WRITE16, 0x24000002, 0, 0); + x32_cmd(CMD_WRITE16, 0x24020000, 0, 0); + x32_cmd(CMD_WRITE32, 0x24020004, 0x5a0000a5, 1); + write8(0xa15100, 0x00); // FM=0 + mem_barrier(); + expect(ok, fbl[0], 0x12340000); + expect(ok, fbl[1], 0x5aabcda5); + return ok; +} + +enum { + T_MD = 0, + T_32 = 1, // 32X +}; + static const struct { + u8 type; int (*test)(void); const char *name; } g_tests[] = { - { t_dma_zero_wrap, "dma zero len + wrap" }, - { t_dma_zero_fill, "dma zero len + fill" }, - { t_dma_ram_wrap, "dma ram wrap" }, - { t_dma_multi, "dma multi" }, - { t_dma_cram_wrap, "dma cram wrap" }, - { t_dma_vsram_wrap, "dma vsram wrap" }, - { t_dma_and_data, "dma and data" }, - { t_dma_short_cmd, "dma short cmd" }, - { t_dma_fill3_odd, "dma fill3 odd" }, - { t_dma_fill3_even, "dma fill3 even" }, + { T_MD, t_dma_zero_wrap, "dma zero len + wrap" }, + { T_MD, t_dma_zero_fill, "dma zero len + fill" }, + { T_MD, t_dma_ram_wrap, "dma ram wrap" }, + { T_MD, t_dma_multi, "dma multi" }, + { T_MD, t_dma_cram_wrap, "dma cram wrap" }, + { T_MD, t_dma_vsram_wrap, "dma vsram wrap" }, + { T_MD, t_dma_and_data, "dma and data" }, + { T_MD, t_dma_short_cmd, "dma short cmd" }, + { T_MD, t_dma_fill3_odd, "dma fill3 odd" }, + { T_MD, t_dma_fill3_even, "dma fill3 even" }, #ifndef PICO // later - { t_dma_fill3_vsram, "dma fill3 vsram" }, + { T_MD, t_dma_fill3_vsram, "dma fill3 vsram" }, #endif - { t_dma_fill_dis, "dma fill disabled" }, - { t_dma_fill_src, "dma fill src incr" }, - { t_dma_128k, "dma 128k mode" }, - { t_vdp_128k_b16, "vdp 128k addr bit16" }, + { T_MD, t_dma_fill_dis, "dma fill disabled" }, + { T_MD, t_dma_fill_src, "dma fill src incr" }, + { T_MD, t_dma_128k, "dma 128k mode" }, + { T_MD, t_vdp_128k_b16, "vdp 128k addr bit16" }, // { t_vdp_128k_b16_inc, "vdp 128k bit16 inc" }, // mystery - { t_vdp_reg_cmd, "vdp reg w cmd reset" }, - { t_vdp_sr_vb, "vdp status reg vb" }, - { t_z80mem_long_mirror, "z80 ram long mirror" }, - { t_z80mem_noreq_w, "z80 ram noreq write" }, - { t_z80mem_vdp_r, "z80 vdp read" }, + { T_MD, t_vdp_reg_cmd, "vdp reg w cmd reset" }, + { T_MD, t_vdp_sr_vb, "vdp status reg vb" }, + { T_MD, t_z80mem_long_mirror, "z80 ram long mirror" }, + { T_MD, t_z80mem_noreq_w, "z80 ram noreq write" }, + { T_MD, t_z80mem_vdp_r, "z80 vdp read" }, // { t_z80mem_vdp_w, "z80 vdp write" }, // hang - { t_tim_loop, "time loop" }, - { t_tim_z80_ram, "time z80 ram" }, - { t_tim_z80_ym, "time z80 ym2612" }, - { t_tim_z80_vdp, "time z80 vdp" }, - { t_tim_z80_bank_rom, "time z80 bank rom" }, - { t_tim_vcnt, "time V counter" }, - { t_tim_hblank_h40, "time hblank h40" }, - { t_tim_hblank_h32, "time hblank h32" }, - { t_tim_vdp_as_vram_w, "time vdp vram w" }, - { t_tim_vdp_as_cram_w, "time vdp cram w" }, - { t_irq_hint, "irq4 / line" }, - { t_irq_ack_v_h, "irq ack v-h" }, - { t_irq_ack_v_h_2, "irq ack v-h 2" }, - { t_irq_ack_h_v, "irq ack h-v" }, - { t_irq_ack_h_v_2, "irq ack h-v 2" }, - { t_irq_f_flag_h40, "irq f flag h40" }, - { t_irq_f_flag_h32, "irq f flag h32" }, + { T_MD, t_tim_loop, "time loop" }, + { T_MD, t_tim_z80_ram, "time z80 ram" }, + { T_MD, t_tim_z80_ym, "time z80 ym2612" }, + { T_MD, t_tim_z80_vdp, "time z80 vdp" }, + { T_MD, t_tim_z80_bank_rom, "time z80 bank rom" }, + { T_MD, t_tim_vcnt, "time V counter" }, + { T_MD, t_tim_hblank_h40, "time hblank h40" }, + { T_MD, t_tim_hblank_h32, "time hblank h32" }, + { T_MD, t_tim_vdp_as_vram_w, "time vdp vram w" }, + { T_MD, t_tim_vdp_as_cram_w, "time vdp cram w" }, + { T_MD, t_irq_hint, "irq4 / line" }, + { T_MD, t_irq_ack_v_h, "irq ack v-h" }, + { T_MD, t_irq_ack_v_h_2, "irq ack v-h 2" }, + { T_MD, t_irq_ack_h_v, "irq ack h-v" }, + { T_MD, t_irq_ack_h_v_2, "irq ack h-v 2" }, + { T_MD, t_irq_f_flag_h40, "irq f flag h40" }, + { T_MD, t_irq_f_flag_h32, "irq f flag h32" }, + + // the first one enables 32X, so must be kept + // all tests assume RV=1 FM=0 + { T_32, t_32x_init, "32x init" }, + { T_32, t_32x_echo, "32x echo" }, + { T_32, t_32x_md_bios, "32x md bios" }, + { T_32, t_32x_md_rom, "32x md rom" }, + { T_32, t_32x_md_fb, "32x md fb" }, + { T_32, t_32x_sh_fb, "32x sh fb" }, }; static void setup_z80(void) @@ -1631,6 +1817,8 @@ static unused int hexinc(char *c) int main() { int passed = 0; + int skipped = 0; + int have_32x; int ret; u8 v8; int i; @@ -1696,10 +1884,12 @@ int main() VDP_setReg(VDP_MODE2, VDP_MODE2_MD | VDP_MODE2_DMA | VDP_MODE2_DISP); + have_32x = read32(0xa130ec) == MKLONG('M','A','R','S'); v8 = read8(0xa10001); - printf("MD version: %02x %s %s\n", v8, + printf("MD version: %02x %s %s %s\n", v8, (v8 & 0x80) ? "world" : "jap", - (v8 & 0x40) ? "pal" : "ntsc"); + (v8 & 0x40) ? "pal" : "ntsc", + have_32x ? "32X" : ""); for (i = 0; i < ARRAY_SIZE(g_tests); i++) { // print test number if we haven't scrolled away @@ -1710,6 +1900,10 @@ int main() printf_ypos = old_ypos; printf_xpos = 0; } + if ((g_tests[i].type & T_32) && !have_32x) { + skipped++; + continue; + } ret = g_tests[i].test(); if (ret != 1) { text_pal = 2; @@ -1721,7 +1915,8 @@ int main() } text_pal = 0; - printf("%d/%d passed.\n", passed, ARRAY_SIZE(g_tests)); + printf("%d/%d passed, %d skipped.\n", + passed, ARRAY_SIZE(g_tests), skipped); printf_ypos = 0; printf(" ");