X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=testpico%2Fmain.c;h=1d27128bceb9b0c8563fdfc1da264be4af9ae70f;hb=HEAD;hp=b4a65c8eb9c52f6d99641c8a082ad433b4133467;hpb=7449b889b89e674e2b2b2ea3e2eea7c4aa57ff72;p=megadrive.git

diff --git a/testpico/main.c b/testpico/main.c
index b4a65c8..2f7a4ec 100644
--- a/testpico/main.c
+++ b/testpico/main.c
@@ -810,6 +810,33 @@ static int t_dma_fill_src(void)
     return ok;
 }
 
+// should not see the busy flag
+static int t_dma_busy_vram(void)
+{
+    const u32 *src = (const u32 *)0x3c0000;
+    u16 sr[3];
+    int ok = 1;
+
+    vdp_wait_for_line_0();
+
+    do_setup_dma(src, 1);
+    write32(VDP_CTRL_PORT, CTL_WRITE_VRAM(0x100) | CTL_WRITE_DMA);
+    sr[0] = read16(VDP_CTRL_PORT);
+
+    do_setup_dma(src, 4);
+    write32(VDP_CTRL_PORT, CTL_WRITE_VRAM(0x100) | CTL_WRITE_DMA);
+    sr[1] = read16(VDP_CTRL_PORT);
+
+    VDP_setReg(VDP_DMA_LEN0, 8);
+    write32(VDP_CTRL_PORT, CTL_WRITE_VRAM(0x100) | CTL_WRITE_DMA);
+    sr[2] = read16(VDP_CTRL_PORT);
+
+    expect_bits(ok, sr[0], 0, SR_DMA);
+    expect_bits(ok, sr[1], 0, SR_DMA);
+    expect_bits(ok, sr[2], 0, SR_DMA);
+    return ok;
+}
+
 // (((a & 2) >> 1) ^ 1) | ((a & $400) >> 9) | (a & $3FC) | ((a & $1F800) >> 1)
 static int t_dma_128k(void)
 {
@@ -1828,7 +1855,7 @@ static int t_32x_reset_btn(void)
     expect(ok, r32[0x20/4], 0x00005a20);
     expect(ok, r32[0x24/4], 0x5a5a5a24);
     expect(ok, r32[0x28/4], 0x5a5a5a28);
-    expect(ok, r32[0x2c/4], 0x07075a2c); // 7 - last_irq_vec
+    expect(ok, r32[0x2c/4], 0x075a5a2c); // 7 - last_irq_vec
     if (!(r16[0x00/2] & 0x8000)) {
         expect(ok, r8 [0x81], 1);
         expect(ok, r16[0x82/2], 1);
@@ -1858,7 +1885,18 @@ static int t_32x_reset_btn(void)
         expect(ok, s_icnt[i], 0x100);
     }
     expect(ok, m_icnt[7], 0x101); // VRES happened
+    expect(ok, s_icnt[7], 0x100); // masked on slave
+
+    x32_cmd(CMD_GETSR, 0, 0, 1);
+    expect_sh2(ok, 1, r32[0x24/4] & ~1, 0xf0); // still masked
+    x32_cmd(CMD_SETSR, 0x10, 0, 1);
+    expect(ok, r16[0x00/2], 0x8083);
+    write8(r8, 0x00); // FM=0
+    mem_barrier();
+    expect(ok, m_icnt[7], 0x101);
     expect(ok, s_icnt[7], 0x101);
+    expect(ok, r32[0x2c/4], 0x00070000); // 7 - last_irq_vec
+    r32[0x2c/4] = 0;
 
     memcpy_(do_32x_disable, x32x_disable,
             x32x_disable_end - x32x_disable);
@@ -2202,6 +2240,7 @@ static int t_32x_reset_prep(void)
         write32(&fbl_icnt[i], 0x01000100);
     x32_cmd(CMD_WRITE8, 0x20004001, 0x02, 0); // unmask cmd
     x32_cmd(CMD_WRITE8, 0x20004001, 0x02, 1); // unmask slave
+    x32_cmd(CMD_SETSR, 0xf0, 0, 1);           // mask slave irqs (on the cpu)
     burn10(10);
     write8(r8, 0x00); // FM=0
     expect(ok, r32[0x2c/4], 0);
@@ -2222,7 +2261,7 @@ static int t_32x_reset_prep(void)
         r16[0x8a/2] = 0x0001;
         mem_barrier();
         for (i = 0; i < 220/2; i++)
-            fbl[i] = 0;
+            write32(&fbl[i], 0);
         r8 [0x81] = 1;
         r16[0x82/2] = 0xffff;
         r16[0x84/2] = 0xffff;
@@ -2261,6 +2300,7 @@ static const struct {
     { T_MD, t_dma_fill3_vsram,     "dma fill3 vsram" },
     { T_MD, t_dma_fill_dis,        "dma fill disabled" },
     { T_MD, t_dma_fill_src,        "dma fill src incr" },
+    { T_MD, t_dma_busy_vram,       "dma no busy" },
     { T_MD, t_dma_128k,            "dma 128k mode" },
     { T_MD, t_vdp_128k_b16,        "vdp 128k addr bit16" },
     // { t_vdp_128k_b16_inc,    "vdp 128k bit16 inc" }, // mystery