sh2 drc, fix for SH2 T handling in Mips/RiscV
authorkub <derkub@gmail.com>
Thu, 25 Jun 2020 14:49:17 +0000 (16:49 +0200)
committerkub <derkub@gmail.com>
Thu, 25 Jun 2020 14:49:17 +0000 (16:49 +0200)
commit18c95d9f57eaac320c3d6725333d7f11d590ac70
tree2e2f1c232e67422607fa9ebed7f661d8970901c3
parent09cab6d27a8079522abd4eddeaa0561f581e8409
sh2 drc, fix for SH2 T handling in Mips/RiscV
cpu/drc/emit_mips.c
cpu/drc/emit_riscv.c