t |= (t >> 4) & 0x08610861;
*dpal = t;
}
t |= (t >> 4) & 0x08610861;
*dpal = t;
}
}
static void FinalizeLineRGB555M4(int line)
}
static void FinalizeLineRGB555M4(int line)
for (y = 0; y < lines; y++)
{
pv->v_counter = Pico.m.scanline = y;
for (y = 0; y < lines; y++)
{
pv->v_counter = Pico.m.scanline = y;
+ if (y > 218)
+ pv->v_counter = y - 6;
if (y < lines_vis && !skip)
PicoLineMode4(y);
if (y < lines_vis && !skip)
PicoLineMode4(y);
char header[8];\r
int ver, len;\r
\r
char header[8];\r
int ver, len;\r
\r
+ memset(buff_m68k, 0, sizeof(buff_m68k));\r
+ memset(buff_s68k, 0, sizeof(buff_s68k));\r
+ memset(buff_z80, 0, sizeof(buff_z80));\r
+\r
g_read_offs = 0;\r
CHECKED_READ(8, header);\r
if (strncmp(header, "PicoSMCD", 8) && strncmp(header, "PicoSEXT", 8))\r
g_read_offs = 0;\r
CHECKED_READ(8, header);\r
if (strncmp(header, "PicoSMCD", 8) && strncmp(header, "PicoSEXT", 8))\r
\r
case CHUNK_Z80:\r
CHECKED_READ_BUFF(buff_z80);\r
\r
case CHUNK_Z80:\r
CHECKED_READ_BUFF(buff_z80);\r
- z80_unpack(buff_z80);\r
break;\r
\r
case CHUNK_RAM: CHECKED_READ_BUFF(Pico.ram); break;\r
break;\r
\r
case CHUNK_RAM: CHECKED_READ_BUFF(Pico.ram); break;\r
if (!(Pico_mcd->s68k_regs[0x36] & 1) && (Pico_mcd->scd.Status_CDC & 1))\r
cdda_start_play();\r
\r
if (!(Pico_mcd->s68k_regs[0x36] & 1) && (Pico_mcd->scd.Status_CDC & 1))\r
cdda_start_play();\r
\r
- // must unpack after mem is set up\r
SekUnpackCpu(buff_s68k, 1);\r
}\r
\r
SekUnpackCpu(buff_s68k, 1);\r
}\r
\r
+ // must unpack 68k and z80 after banks are set up\r
if (!(PicoAHW & PAHW_SMS))\r
SekUnpackCpu(buff_m68k, 0);\r
\r
if (!(PicoAHW & PAHW_SMS))\r
SekUnpackCpu(buff_m68k, 0);\r
\r
+ z80_unpack(buff_z80);\r
+\r
if (PicoAHW & PAHW_32X)\r
Pico32xStateLoaded();\r
\r
if (PicoAHW & PAHW_32X)\r
Pico32xStateLoaded();\r
\r