\r
.if DRZ80_FOR_PICODRIVE\r
\r
\r
.if DRZ80_FOR_PICODRIVE\r
\r
-.macro YM2612Read_and_ret8\r
- ldr r0, =ym2612_st\r
- ldr r0, [r0]\r
- ldrb r0, [r0, #0x11] ;@ ym2612_st->status\r
- bx lr\r
-.endm\r
-\r
-.macro YM2612Read_and_ret16\r
- ldr r0, =ym2612_st\r
- ldr r0, [r0]\r
- ldrb r0, [r0, #0x11] ;@ ym2612_st->status\r
- orr r0,r0,r0,lsl #8\r
- bx lr\r
-.endm\r
-\r
pico_z80_read8: @ addr\r
cmp r0,#0x2000 @ Z80 RAM\r
ldrlt r1,[cpucontext,#z80sp_base]\r
pico_z80_read8: @ addr\r
cmp r0,#0x2000 @ Z80 RAM\r
ldrlt r1,[cpucontext,#z80sp_base]\r
eorlt r0,r0,#1 @ our ROM is byteswapped\r
ldrltb r0,[r1,r0]\r
bxlt lr\r
eorlt r0,r0,#1 @ our ROM is byteswapped\r
ldrltb r0,[r1,r0]\r
bxlt lr\r
- stmfd sp!,{r3,r12,lr}\r
+ stmfd sp!,{r3,r12,lr}\r
- ldmfd sp!,{r3,r12,pc}\r
+ ldmfd sp!,{r3,r12,pc}\r
1:\r
mov r1,r0,lsr #13\r
cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
bne 0f\r
and r0,r0,#3\r
1:\r
mov r1,r0,lsr #13\r
cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
bne 0f\r
and r0,r0,#3\r
+ stmfd sp!,{r3,r12,lr}\r
+ str z80_icount,[cpucontext,#cycles_pointer]\r
+ bl ym2612_read_local_z80\r
+ ldmfd sp!,{r3,r12,pc}\r
0:\r
cmp r0,#0x4000\r
movge r0,#0xff\r
0:\r
cmp r0,#0x4000\r
movge r0,#0xff\r
cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
bne 0f\r
and r0,r0,#3\r
cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
bne 0f\r
and r0,r0,#3\r
+ stmfd sp!,{r3,r12,lr}\r
+ str z80_icount,[cpucontext,#cycles_pointer]\r
+ bl ym2612_read_local_z80\r
+ orr r0,r0,r0,lsl #8\r
+ ldmfd sp!,{r3,r12,pc}\r
0:\r
cmp r0,#0x4000\r
movge r0,#0xff\r
0:\r
cmp r0,#0x4000\r
movge r0,#0xff\r
bx lr\r
1:\r
stmfd sp!,{r3,r12,lr}\r
bx lr\r
1:\r
stmfd sp!,{r3,r12,lr}\r
+ str z80_icount,[cpucontext,#cycles_pointer]\r
bl z80_write\r
ldmfd sp!,{r3,r12,pc}\r
\r
bl z80_write\r
ldmfd sp!,{r3,r12,pc}\r
\r
strb r0,[r2,#1]\r
bx lr\r
1:\r
strb r0,[r2,#1]\r
bx lr\r
1:\r
- stmfd sp!,{r3-r5,r12,lr}\r
+ stmfd sp!,{r3-r5,r12,lr}\r
+ str z80_icount,[cpucontext,#cycles_pointer]\r
mov r0,r4,lsr #8\r
add r1,r5,#1\r
mov r0,r4,lsr #8\r
add r1,r5,#1\r
- bl z80_write\r
- ldmfd sp!,{r3-r5,r12,pc}\r
+ bl z80_write\r
+ ldmfd sp!,{r3-r5,r12,pc}\r
if (CPU->IRQState != CLEAR_LINE)\r
{\r
CHECK_INT\r
if (CPU->IRQState != CLEAR_LINE)\r
{\r
CHECK_INT\r
+ CPU->ICount -= CPU->ExtraCycles;\r
+ CPU->ExtraCycles = 0;\r
}\r
goto Cz80_Exec;\r
}\r
}\r
goto Cz80_Exec;\r
}\r
//#else\r
#define CZ80_ENCRYPTED_ROM 0\r
//#endif\r
//#else\r
#define CZ80_ENCRYPTED_ROM 0\r
//#endif\r
-#define CZ80_EMULATE_R_EXACTLY 0\r
+#define CZ80_EMULATE_R_EXACTLY 1\r
\r
#define zR8(A) (*CPU->pzR8[A])\r
#define zR16(A) (CPU->pzR16[A]->W)\r
\r
#define zR8(A) (*CPU->pzR8[A])\r
#define zR16(A) (CPU->pzR16[A]->W)\r
if (CPU->IRQState)\r
{\r
afterEI = 1;\r
if (CPU->IRQState)\r
{\r
afterEI = 1;\r
+ CPU->ExtraCycles += 1 - CPU->ICount;\r
+ CPU->ICount = 1;\r
- if (CPU->ICount <= 0)\r
+ else if (CPU->ICount <= 0)\r
{\r
CPU->ICount = 1;\r
}\r
{\r
CPU->ICount = 1;\r
}\r