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87accdf)
Chaotix works but unstable
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@794
be3aeb3a-fb24-0410-a615-
afba39da0efa
// ~1463.8, but due to cache misses and slow mem
// it's much lower than that
// ~1463.8, but due to cache misses and slow mem
// it's much lower than that
-#define SH2_LINE_CYCLES 735
+//#define SH2_LINE_CYCLES 735
+#define CYCLES_M68K2SH2(x) ((x) * 9 / 4)
-#define RUN_SH2S_SIMPLE \
+#define RUN_SH2S_SIMPLE(m68k_cycles) \
if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
- sh2_execute(&msh2, SH2_LINE_CYCLES); \
+ sh2_execute(&msh2, CYCLES_M68K2SH2(m68k_cycles)); \
if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
- sh2_execute(&ssh2, SH2_LINE_CYCLES);
+ sh2_execute(&ssh2, CYCLES_M68K2SH2(m68k_cycles))
-#define RUN_SH2S_LOCKSTEP \
+#define STEP 66
+#define RUN_SH2S_LOCKSTEP(m68k_cycles) \
- for (i = 0; i < SH2_LINE_CYCLES; i+= 3) { \
- sh2_execute(&msh2, 3); \
- sh2_execute(&ssh2, 3); \
+ for (i = 0; i < CYCLES_M68K2SH2(m68k_cycles); i+= STEP) { \
+ sh2_execute(&msh2, STEP); \
+ sh2_execute(&ssh2, STEP); \
} \
}
#define RUN_SH2S RUN_SH2S_SIMPLE
} \
}
#define RUN_SH2S RUN_SH2S_SIMPLE
+//#define RUN_SH2S RUN_SH2S_LOCKSTEP
PicoFrameStart();
PicoFrameHints();
PicoFrameStart();
PicoFrameHints();
+ elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);
static void bank_switch(int b);
static void bank_switch(int b);
-#define MSB8(x) ((x) >> 8)
-
// poll detection
#define POLL_THRESHOLD 6
struct poll_det {
// poll detection
#define POLL_THRESHOLD 6
struct poll_det {
- int addr, pc, cnt, flag;
+ u32 addr, cycles, cyc_max;
+ int cnt, flag;
};
static struct poll_det m68k_poll, sh2_poll[2];
};
static struct poll_det m68k_poll, sh2_poll[2];
-static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int is_vdp)
+static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 cycles, int is_vdp)
{
int ret = 0, flag = pd->flag;
if (is_vdp)
flag <<= 3;
{
int ret = 0, flag = pd->flag;
if (is_vdp)
flag <<= 3;
- if (a - 2 <= pd->addr && pd->addr <= a + 2) { // && pd->pc == pc) {
+ if (a - 2 <= pd->addr && pd->addr <= a + 2 && cycles - pd->cycles < pd->cyc_max) {
pd->cnt++;
if (pd->cnt > POLL_THRESHOLD) {
if (!(Pico32x.emu_flags & flag)) {
pd->cnt++;
if (pd->cnt > POLL_THRESHOLD) {
if (!(Pico32x.emu_flags & flag)) {
- elprintf(EL_32X, "%s poll addr %08x @ %06x",
- flag == P32XF_68KPOLL ? "m68k" : (flag == P32XF_MSH2POLL ? "msh2" : "ssh2"), a, pc);
+ elprintf(EL_32X, "%s poll addr %08x, cyc %u",
+ flag & (P32XF_68KPOLL|P32XF_68KVPOLL) ? "m68k" :
+ (flag & (P32XF_MSH2POLL|P32XF_MSH2VPOLL) ? "msh2" : "ssh2"), a, cycles - pd->cycles);
ret = 1;
}
Pico32x.emu_flags |= flag;
ret = 1;
}
Pico32x.emu_flags |= flag;
else
pd->cnt = 0;
pd->addr = a;
else
pd->cnt = 0;
pd->addr = a;
{
int ret = 0, flag = pd->flag;
if (is_vdp)
{
int ret = 0, flag = pd->flag;
if (is_vdp)
- flag <<= 3;
- if (pd->cnt > POLL_THRESHOLD)
+ flag <<= 3; // VDP only
+ else
+ flag |= flag << 3; // both
+ if (Pico32x.emu_flags & flag) {
+ elprintf(EL_32X, "poll %02x -> %02x", Pico32x.emu_flags, Pico32x.emu_flags & ~flag);
- pd->addr = pd->cnt = 0;
Pico32x.emu_flags &= ~flag;
Pico32x.emu_flags &= ~flag;
+ pd->addr = pd->cnt = 0;
for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
extern void p32x_sh2_write16(u32 a, u32 d, int id);
for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
extern void p32x_sh2_write16(u32 a, u32 d, int id);
- elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
+ elprintf(EL_32X, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0);
dmac0->dar0 += 2;
dmac0->tcr0--;
p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0);
dmac0->dar0 += 2;
dmac0->tcr0--;
Pico32x.regs[6 / 2] &= ~P32XS_FULL;
if (*dreqlen == 0)
Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
Pico32x.regs[6 / 2] &= ~P32XS_FULL;
if (*dreqlen == 0)
Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
+ if (dmac0->tcr0 == 0) {
dmac0->chcr0 |= 2; // DMA has ended normally
dmac0->chcr0 |= 2; // DMA has ended normally
+ p32x_poll_undetect(&sh2_poll[0], 0);
+ }
}
// ------------------------------------------------------------------
}
// ------------------------------------------------------------------
if ((a & 0x30) == 0x20)
return sh2_comm_faker(a);
#else
if ((a & 0x30) == 0x20)
return sh2_comm_faker(a);
#else
- if ((a & 0x30) == 0x20 && p32x_poll_detect(&m68k_poll, a, SekPc, 0)) {
+ if ((a & 0x30) == 0x20 && p32x_poll_detect(&m68k_poll, a, SekCyclesDoneT(), 0)) {
if ((r[0] ^ d) & P32XV_PRI)
Pico32x.dirty_pal = 1;
r[0] = (r[0] & P32XV_nPAL) | (d & 0xff);
if ((r[0] ^ d) & P32XV_PRI)
Pico32x.dirty_pal = 1;
r[0] = (r[0] & P32XV_nPAL) | (d & 0xff);
+ if ((d & 3) == 3)
+ elprintf(EL_32X|EL_ANOMALY, "TODO: mode3");
+ break;
+ case 0x05: // fill len
+ r[4 / 2] = d & 0xff;
break;
case 0x0b:
d &= 1;
break;
case 0x0b:
d &= 1;
static void p32x_vdp_write16(u32 a, u32 d)
{
static void p32x_vdp_write16(u32 a, u32 d)
{
+ a &= 0x0e;
+ if (a == 6) { // fill start
+ Pico32x.vdp_regs[6 / 2] = d;
+ return;
+ }
+ if (a == 8) { // fill data
+ u16 *dram = Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
+ int len = Pico32x.vdp_regs[4 / 2];
+ a = Pico32x.vdp_regs[6 / 2];
+ while (len--) {
+ dram[a] = d;
+ a = (a & 0xff00) | ((a + 1) & 0xff);
+ }
+ Pico32x.vdp_regs[6 / 2] = a;
+ Pico32x.vdp_regs[8 / 2] = d;
+ return;
+ }
+
p32x_vdp_write8(a | 1, d);
}
p32x_vdp_write8(a | 1, d);
}
return r[a / 2];
// comm port
if ((a & 0x30) == 0x20) {
return r[a / 2];
// comm port
if ((a & 0x30) == 0x20) {
- if (p32x_poll_detect(&sh2_poll[cpuid], a, sh2_pc(cpuid), 0))
+ if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0))
ash2_end_run(8);
return r[a / 2];
}
ash2_end_run(8);
return r[a / 2];
}
case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls;
case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls;
- case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls;
+ case 0x1c:
+ Pico32x.sh2irqs &= ~P32XI_PWM;
+ p32x_pwm_irq_check(0);
+ goto irls;
}
p32x_sh2reg_write8(a | 1, d, cpuid);
}
p32x_sh2reg_write8(a | 1, d, cpuid);
static void sh2_peripheral_write32(u32 a, u32 d, int id)
{
static void sh2_peripheral_write32(u32 a, u32 d, int id)
{
- unsigned int *r = Pico32xMem->sh2_peri_regs[id];
+ u32 *r = Pico32xMem->sh2_peri_regs[id];
elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
a &= 0x1fc;
r[a / 4] = d;
switch (a) {
elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
a &= 0x1fc;
r[a / 4] = d;
switch (a) {
+ // division unit (TODO: verify):
case 0x104: // DVDNT: divident L, starts divide
elprintf(EL_32X, "%csh2 divide %08x / %08x", id ? 's' : 'm', d, r[0x100 / 4]);
if (r[0x100 / 4]) {
case 0x104: // DVDNT: divident L, starts divide
elprintf(EL_32X, "%csh2 divide %08x / %08x", id ? 's' : 'm', d, r[0x100 / 4]);
if (r[0x100 / 4]) {
- r[0x118 / 4] = r[0x110 / 4] = d % r[0x100 / 4];
- r[0x11c / 4] = r[0x114 / 4] = d / r[0x100 / 4];
+ signed int divisor = r[0x100 / 4];
+ r[0x118 / 4] = r[0x110 / 4] = (signed int)d % divisor;
+ r[0x104 / 4] = r[0x11c / 4] = r[0x114 / 4] = (signed int)d / divisor;
}
break;
case 0x114:
elprintf(EL_32X, "%csh2 divide %08x%08x / %08x @%08x",
id ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(id));
if (r[0x100 / 4]) {
}
break;
case 0x114:
elprintf(EL_32X, "%csh2 divide %08x%08x / %08x @%08x",
id ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(id));
if (r[0x100 / 4]) {
- long long divident = (long long)r[0x110 / 4] << 32 | d;
+ signed long long divident = (signed long long)r[0x110 / 4] << 32 | d;
+ signed int divisor = r[0x100 / 4];
// XXX: undocumented mirroring to 0x118,0x11c?
// XXX: undocumented mirroring to 0x118,0x11c?
- r[0x118 / 4] = r[0x110 / 4] = divident % r[0x100 / 4];
- r[0x11c / 4] = r[0x114 / 4] = divident / r[0x100 / 4];
+ r[0x118 / 4] = r[0x110 / 4] = divident % divisor;
+ r[0x11c / 4] = r[0x114 / 4] = divident / divisor;
elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id));
dmac0->tcr0 &= 0xffffff;
elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id));
dmac0->tcr0 &= 0xffffff;
+
+ // HACK: assume bus is busy and SH2 is halted
+ // XXX: use different mechanism for this, not poll det
+ Pico32x.emu_flags |= id ? P32XF_SSH2POLL : P32XF_MSH2POLL;
+ ash2_end_run(5);
+
// DREQ is only sent after first 4 words are written.
// we do multiple of 4 words to avoid messing up alignment
if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) {
// DREQ is only sent after first 4 words are written.
// we do multiple of 4 words to avoid messing up alignment
if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) {
if ((a & 0xdfffff00) == 0x4100) {
d = p32x_vdp_read16(a);
if ((a & 0xdfffff00) == 0x4100) {
d = p32x_vdp_read16(a);
- if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), 1))
+ if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1))
ash2_end_run(8);
goto out_16to8;
}
ash2_end_run(8);
goto out_16to8;
}
if ((a & 0xdfffff00) == 0x4100) {
d = p32x_vdp_read16(a);
if ((a & 0xdfffff00) == 0x4100) {
d = p32x_vdp_read16(a);
- if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), 1))
+ if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1))
ash2_end_run(8);
goto out;
}
ash2_end_run(8);
goto out;
}
}
if ((a & 0xdfffff00) == 0x4100) {
}
if ((a & 0xdfffff00) == 0x4100) {
+ sh2_poll[id].cnt = 0; // for poll before VDP accesses
p32x_vdp_write16(a, d);
return;
}
p32x_vdp_write16(a, d);
return;
}
// setup poll detector
m68k_poll.flag = P32XF_68KPOLL;
// setup poll detector
m68k_poll.flag = P32XF_68KPOLL;
+ m68k_poll.cyc_max = 64;
sh2_poll[0].flag = P32XF_MSH2POLL;
sh2_poll[0].flag = P32XF_MSH2POLL;
+ sh2_poll[0].cyc_max = 16;
sh2_poll[1].flag = P32XF_SSH2POLL;
sh2_poll[1].flag = P32XF_SSH2POLL;
+ sh2_poll[1].cyc_max = 16;
// irq for every sample??
// FIXME: we need to hit more than once per line :(
// irq for every sample??
// FIXME: we need to hit more than once per line :(
-void p32x_pwm_irq_check(void)
+void p32x_pwm_irq_check(int new_line)
{
int tm = (Pico32x.regs[0x30 / 2] & 0x0f00) >> 8;
if (tm == 0)
return; // TODO: verify
{
int tm = (Pico32x.regs[0x30 / 2] & 0x0f00) >> 8;
if (tm == 0)
return; // TODO: verify
- Pico32x.pwm_irq_sample_cnt += pwm_line_samples;
+ if (new_line)
+ Pico32x.pwm_irq_sample_cnt += pwm_line_samples;
if (Pico32x.pwm_irq_sample_cnt >= (tm << 16)) {
Pico32x.pwm_irq_sample_cnt -= tm << 16;
Pico32x.sh2irqs |= P32XI_PWM;
if (Pico32x.pwm_irq_sample_cnt >= (tm << 16)) {
Pico32x.pwm_irq_sample_cnt -= tm << 16;
Pico32x.sh2irqs |= P32XI_PWM;
- elprintf(EL_STATUS, "pwm_update: pwm_ptr %d, len %d, step %04x, done %d",
+ elprintf(EL_32X, "pwm_update: pwm_ptr %d, len %d, step %04x, done %d",
pwm_ptr, length, step, (pwmb - Pico32xMem->pwm) / 2);
pwm_ptr = 0;
pwm_ptr, length, step, (pwmb - Pico32xMem->pwm) / 2);
pwm_ptr = 0;
sprintf(dstrp, "%02x: %04x %04x %04x %04x %04x %04x %04x %04x\n",
i*2, r[i+0], r[i+1], r[i+2], r[i+3], r[i+4], r[i+5], r[i+6], r[i+7]); MVP;
}
sprintf(dstrp, "%02x: %04x %04x %04x %04x %04x %04x %04x %04x\n",
i*2, r[i+0], r[i+1], r[i+2], r[i+3], r[i+4], r[i+5], r[i+6], r[i+7]); MVP;
}
+ r = Pico32x.sh2_regs;
+ sprintf(dstrp, "SH: %04x %04x %04x IRQs: %02x\n", r[0], r[1], r[2], Pico32x.sh2irqs); MVP;
i = 0;
r = Pico32x.vdp_regs;
i = 0;
r = Pico32x.vdp_regs;
sh2_reg(0,i), sh2_reg(0,i+8), sh2_reg(1,i), sh2_reg(1,i+8)); MVP;
}
sprintf(dstrp, "gb,vb %08x,%08x %08x,%08x\n", sh2_gbr(0), sh2_vbr(0), sh2_gbr(1), sh2_vbr(1));
sh2_reg(0,i), sh2_reg(0,i+8), sh2_reg(1,i), sh2_reg(1,i+8)); MVP;
}
sprintf(dstrp, "gb,vb %08x,%08x %08x,%08x\n", sh2_gbr(0), sh2_vbr(0), sh2_gbr(1), sh2_vbr(1));
+ sprintf(dstrp, "IRQs/mask: %02x/%02x %02x/%02x\n",
+ Pico32x.sh2irqi[0], Pico32x.sh2irq_mask[0], Pico32x.sh2irqi[1], Pico32x.sh2irq_mask[1]); MVP;
// CPUS_RUN
#ifndef RUN_SH2S
// CPUS_RUN
#ifndef RUN_SH2S
#endif
#ifndef PICO_CD
#define CPUS_RUN(m68k_cycles,s68k_cycles) \
{ \
SekRunM68k(m68k_cycles); \
#endif
#ifndef PICO_CD
#define CPUS_RUN(m68k_cycles,s68k_cycles) \
{ \
SekRunM68k(m68k_cycles); \
+ RUN_SH2S(m68k_cycles); \
}
#else
#define CPUS_RUN(m68k_cycles,s68k_cycles) \
}
#else
#define CPUS_RUN(m68k_cycles,s68k_cycles) \
check_cd_dma();
#endif
#ifdef PICO_32X
check_cd_dma();
#endif
#ifdef PICO_32X
check_cd_dma();
#endif
#ifdef PICO_32X
check_cd_dma();
#endif
#ifdef PICO_32X
check_cd_dma();
#endif
#ifdef PICO_32X
check_cd_dma();
#endif
#ifdef PICO_32X
\r
SH2 msh2, ssh2;\r
#define ash2_end_run(after) sh2_icount = after\r
\r
SH2 msh2, ssh2;\r
#define ash2_end_run(after) sh2_icount = after\r
+#define ash2_cycles_done() (10000 - sh2_icount) // HACK\r
\r
#define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc\r
#define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x]\r
\r
#define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc\r
#define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x]\r
unsigned int p32x_pwm_read16(unsigned int a);\r
void p32x_pwm_write16(unsigned int a, unsigned int d);\r
void p32x_pwm_refresh(void);\r
unsigned int p32x_pwm_read16(unsigned int a);\r
void p32x_pwm_write16(unsigned int a, unsigned int d);\r
void p32x_pwm_refresh(void);\r
-void p32x_pwm_irq_check(void);\r
+void p32x_pwm_irq_check(int new_line);\r
void p32x_pwm_update(int *buf32, int length, int stereo);\r
extern int pwm_frame_smp_cnt;\r
\r
void p32x_pwm_update(int *buf32, int length, int stereo);\r
extern int pwm_frame_smp_cnt;\r
\r
CFLAGS += -ftracer -fstrength-reduce -funroll-loops -fomit-frame-pointer -fstrict-aliasing -ffast-math
CFLAGS += -fprofile-generate
else
CFLAGS += -ftracer -fstrength-reduce -funroll-loops -fomit-frame-pointer -fstrict-aliasing -ffast-math
CFLAGS += -fprofile-generate
else
-CFLAGS = -ggdb -Wall -falign-functions=2
+CFLAGS += -ggdb -Wall -falign-functions=2
endif
DEFINES = _UNZIP_SUPPORT IO_STATS IN_EVDEV
CFLAGS += -I../.. -I.
endif
DEFINES = _UNZIP_SUPPORT IO_STATS IN_EVDEV
CFLAGS += -I../.. -I.
#define SIMPLE_WRITE_SOUND 0
#define mix_32_to_16l_stereo_lvl mix_32_to_16l_stereo
#define SIMPLE_WRITE_SOUND 0
#define mix_32_to_16l_stereo_lvl mix_32_to_16l_stereo
-#define EL_LOGMASK (EL_ANOMALY|EL_STATUS|EL_UIO|EL_IDLE|EL_32X)//|EL_VDPDMA|EL_HVCNT|EL_ASVDP)//|EL_SVP)
+#define EL_LOGMASK (EL_ANOMALY|EL_STATUS|EL_UIO|EL_IDLE|EL_32X)
// EL_VDPDMA|EL_ASVDP|EL_SR) // |EL_BUSREQ|EL_Z80BNK)
// EL_VDPDMA|EL_ASVDP|EL_SR) // |EL_BUSREQ|EL_Z80BNK)
+//#define EL_LOGMASK (EL_ANOMALY|EL_STATUS)
//#define dprintf(f,...) printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__)
#define dprintf(x...)
//#define dprintf(f,...) printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__)
#define dprintf(x...)