rom_alloc_size = 0x10000;\r
}\r
else {\r
- // make alloc size at least sizeof(mcd_state),\r
- // in case we want to switch to CD mode\r
- if (filesize < sizeof(mcd_state))\r
- filesize = sizeof(mcd_state);\r
-\r
// align to 512K for memhandlers\r
rom_alloc_size = (filesize + 0x7ffff) & ~0x7ffff;\r
}\r
return -1;
}
+ track->type = CT_AUDIO;
track->fd = tmp_file;
track->offset = 0;
}
tracks[0].fd = pmf;
tracks[0].fname = strdup(cd_img_name);
+ tracks[0].type = *type & CT_AUDIO;
if (*type == CT_ISO)
- cd_img_sectors = pmf->size >>= 11; // size in sectors
- else cd_img_sectors = pmf->size /= 2352;
+ cd_img_sectors = pmf->size >> 11; // size in sectors
+ else cd_img_sectors = pmf->size / 2352;
// cdd.c operates with lba - 150
tracks[0].start = 0;
tracks[0].offset = 0;
sprintf_lba(tmp_ext, sizeof(tmp_ext), 0);
- elprintf(EL_STATUS, "Track 1: %s %9i DATA %s",
- tmp_ext, tracks[0].end, cd_img_name);
+ elprintf(EL_STATUS, "Track 1: %s %9i %s %s",
+ tmp_ext, tracks[0].end, tracks[0].type ? "AUDIO" : "DATA ", cd_img_name);
lba = cd_img_sectors;
length = cue_data->tracks[n].sector_xlength;
Pico_mcd->cdda_type = cue_data->tracks[n].type;
+ tracks[index].type = cue_data->tracks[n].type & CT_AUDIO;
tracks[index].start = lba;
lba += length;
tracks[index].end = lba;
sprintf_lba(tmp_ext, sizeof(tmp_ext), tracks[index].start);
- elprintf(EL_STATUS, "Track %2i: %s %9i AUDIO %s", n, tmp_ext, length,
+ elprintf(EL_STATUS, "Track %2i: %s %9i %s %s", n, tmp_ext, length,
+ tracks[index].type ? "AUDIO" : "DATA ",
cue_data->tracks[n].fname ? cue_data->tracks[n].fname : "");
}
goto finish;
tracks[index].end = lba;
Pico_mcd->cdda_type = CT_MP3;
+ tracks[index].type = CT_AUDIO;
sprintf_lba(tmp_ext, sizeof(tmp_ext), tracks[index].start);
elprintf(EL_STATUS, "Track %2i: %s %9i AUDIO - %s",
}
memset(&data->tracks[count], 0, sizeof(data->tracks[0]));
- if (count == 1) { // binary code
- data->tracks[count].fname = strdup(fname);
- if (!strcmp(type, "MODE1_RAW") || !strcmp(type, "MODE2_RAW")) {
- data->tracks[count].type = CT_BIN;
- } else if (!strcmp(type, "MODE1") || !strcmp(type, "MODE2_FORM1")) {
- data->tracks[count].type = CT_ISO;
- } else
- break;
- } else { // audio
- if (strcmp(type, "AUDIO"))
- break;
+ data->tracks[count].fname = strdup(fname);
+ if (!strcmp(type, "MODE1_RAW") || !strcmp(type, "MODE2_RAW")) {
+ data->tracks[count].type = CT_BIN;
+ } else if (!strcmp(type, "MODE1") || !strcmp(type, "MODE2_FORM1")) {
+ data->tracks[count].type = CT_ISO;
+ } else if (!strcmp(type, "AUDIO")) {
data->tracks[count].type = CT_CHD;
- }
+ } else
+ break;
data->tracks[count].pregap = pregap;
if (pgtype[0] != 'V') // VAUDIO includes pregap in file
else if (strcasecmp(ext, "wav") == 0)
data->tracks[count].type = CT_WAV;
else if (strcasecmp(ext, "bin") == 0)
- data->tracks[count].type = CT_BIN;
+ data->tracks[count].type = CT_RAW;
else {
elprintf(EL_STATUS, "unhandled audio format: \"%s\"",
data->tracks[count].fname);
}
}
- else
+ else if (data->tracks[count-1].type & CT_AUDIO)
{
// propagate previous
data->tracks[count].type = data->tracks[count-1].type;
}
+ else
+ {
+ // assume raw binary data
+ data->tracks[count].type = CT_RAW;
+ }
}
else {
elprintf(EL_STATUS, "unhandled track type: \"%s\"", buff2);
case 0x0f: /* RESET */
cdc_reset();
- Pico_mcd->s68k_regs[0x04+1] = 0x10;
break;
default: /* by default, SBOUT is not used */
unsigned char cdc_reg_r(void)
{
- switch (Pico_mcd->s68k_regs[0x04+1] & 0x01F)
+ switch (Pico_mcd->s68k_regs[0x04+1] & 0x1F)
{
case 0x00:
return 0xff;
/* clear DSR bit & set EDT bit (SCD register $04) */
Pico_mcd->s68k_regs[0x04+0] = (Pico_mcd->s68k_regs[0x04+0] & 0x07) | 0x80;
- } else if ((int16)cdc.dbc <= 2) {
+
+ } else if ((int16)cdc.dbc <= 2)
+ {
if (cdc.ifstat & BIT_DTEI) {
/* pending Data Transfer End interrupt */
cdc.ifstat &= ~BIT_DTEI;
cdd_t cdd;
+#define is_audio(index) \
+ (cdd.toc.tracks[index].type & CT_AUDIO)
+
/* BCD conversion lookup tables */
static const uint8 lut_BCD_8[100] =
{
}
/* seek to current track position */
- if (!cdd.index)
+ if (!is_audio(cdd.index))
{
/* DATA track */
- if (cdd.toc.tracks[0].fd)
+ if (cdd.toc.tracks[cdd.index].fd)
{
- pm_seek(cdd.toc.tracks[0].fd, lba * cdd.sectorSize, SEEK_SET);
+ pm_seek(cdd.toc.tracks[cdd.index].fd, lba * cdd.sectorSize, SEEK_SET);
}
}
#ifdef USE_LIBTREMOR
cdd.sectorSize = 2048;
}
- ret = (type == CT_BIN) ? 2352 : 2048;
+ ret = (type == CT_ISO ? 2048 : 2352);
if (ret != cdd.sectorSize)
elprintf(EL_STATUS|EL_ANOMALY, "cd: type detection mismatch");
pm_sectorsize(cdd.sectorSize, cdd.toc.tracks[0].fd);
void cdd_read_data(uint8 *dst)
{
/* only read DATA track sectors */
- if ((cdd.lba >= 0) && (cdd.lba < cdd.toc.tracks[0].end))
+ if ((cdd.lba >= 0) && (cdd.lba < cdd.toc.tracks[cdd.index].end))
{
/* BIN format ? */
if (cdd.sectorSize == 2352)
{
/* skip 16-byte header */
- pm_seek(cdd.toc.tracks[0].fd, cdd.lba * 2352 + 16, SEEK_SET);
+ pm_seek(cdd.toc.tracks[cdd.index].fd, cdd.lba * 2352 + 16, SEEK_SET);
}
/* read sector data (Mode 1 = 2048 bytes) */
- pm_read(dst, 2048, cdd.toc.tracks[0].fd);
+ pm_read(dst, 2048, cdd.toc.tracks[cdd.index].fd);
}
}
if (cdd.status == CD_PLAY)
{
/* track type */
- if (!cdd.index)
+ if (!is_audio(cdd.index))
{
/* DATA sector header (CD-ROM Mode 1) */
uint8 header[4];
}
/* seek to current block */
- if (!cdd.index)
+ if (!is_audio(cdd.index))
{
/* no AUDIO track playing */
Pico_mcd->s68k_regs[0x36+0] = 0x01;
/* DATA track */
- pm_seek(cdd.toc.tracks[0].fd, cdd.lba * cdd.sectorSize, SEEK_SET);
+ pm_seek(cdd.toc.tracks[cdd.index].fd, cdd.lba * cdd.sectorSize, SEEK_SET);
}
#ifdef USE_LIBTREMOR
else if (cdd.toc.tracks[cdd.index].vf.seekable)
set_reg16(0x3a, lut_BCD_16[(lba/75)/60]);
set_reg16(0x3c, lut_BCD_16[(lba/75)%60]);
set_reg16(0x3e, lut_BCD_16[(lba%75)]);
- Pico_mcd->s68k_regs[0x40+0] = cdd.index ? 0x00 : 0x04;
+ Pico_mcd->s68k_regs[0x40+0] = is_audio(cdd.index) ? 0x00 : 0x04;
} else if (Pico_mcd->s68k_regs[0x38+1] == 0x02) {
/* then return valid track infos, e.g current track number in RS2-RS3 (fixes Lunar - The Silver Star) */
Pico_mcd->s68k_regs[0x38+1] = 0x02;
set_reg16(0x3a, lut_BCD_16[(lba/75)/60]);
set_reg16(0x3c, lut_BCD_16[(lba/75)%60]);
set_reg16(0x3e, lut_BCD_16[(lba%75)]);
- Pico_mcd->s68k_regs[0x40+0] = cdd.index ? 0x00 : 0x04; /* Current block flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */
+ Pico_mcd->s68k_regs[0x40+0] = is_audio(cdd.index) ? 0x00 : 0x04; /* Current block flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */
break;
}
set_reg16(0x3a, lut_BCD_16[(lba/75)/60]);
set_reg16(0x3c, lut_BCD_16[(lba/75)%60]);
set_reg16(0x3e, lut_BCD_16[(lba%75)]);
- Pico_mcd->s68k_regs[0x40+0] = cdd.index ? 0x00 : 0x04; /* Current block flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */
+ Pico_mcd->s68k_regs[0x40+0] = is_audio(cdd.index) ? 0x00 : 0x04; /* Current block flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */
break;
}
}
/* seek to current block */
- if (!index)
+ if (!is_audio(cdd.index))
{
/* DATA track */
- pm_seek(cdd.toc.tracks[0].fd, lba * cdd.sectorSize, SEEK_SET);
+ pm_seek(cdd.toc.tracks[cdd.index].fd, lba * cdd.sectorSize, SEEK_SET);
}
#ifdef USE_LIBTREMOR
else if (cdd.toc.tracks[index].vf.seekable)
}
/* seek to current block */
- if (!index)
+ if (!is_audio(cdd.index))
{
/* DATA track */
- pm_seek(cdd.toc.tracks[0].fd, lba * cdd.sectorSize, SEEK_SET);
+ pm_seek(cdd.toc.tracks[cdd.index].fd, lba * cdd.sectorSize, SEEK_SET);
}
#ifdef USE_LIBTREMOR
else if (cdd.toc.tracks[index].vf.seekable)
/* CD track */
typedef struct
{
+ int type;
char *fname;
void *fd;
#ifdef USE_LIBTREMOR
static unsigned int mcd_m68k_cycle_base;
static unsigned int mcd_s68k_cycle_base;
+mcd_state *Pico_mcd;
PICO_INTERNAL void PicoInitMCD(void)
{
PICO_INTERNAL void PicoExitMCD(void)
{
cdd_unload();
+ if (Pico_mcd) {
+ plat_munmap(Pico_mcd, sizeof(mcd_state));
+ Pico_mcd = NULL;
+ }
}
PICO_INTERNAL void PicoPowerMCD(void)
Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
- memset(Pico_mcd->bios + 0x70, 0xff, 4);
+ if (Pico.romsize <= 0x20000)
+ memset(Pico.rom + 0x70, 0xff, 4);
}
void pcd_soft_reset(void)
MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)\r
#endif\r
\r
+u32 pcd_base_address;\r
+#define BASE pcd_base_address\r
+\r
// -----------------------------------------------------------------\r
\r
// provided by ASM code:\r
d = Pico_mcd->s68k_regs[4]<<8;\r
goto end;\r
case 6:\r
- d = *(u16 *)(Pico_mcd->bios + 0x72);\r
+ d = *(u16 *)(Pico.rom + 0x72);\r
goto end;\r
case 8:\r
d = cdc_host_r();\r
case 1:\r
d &= 3;\r
dold = Pico_mcd->m.busreq;\r
- if (!(d & 1))\r
- d |= 2; // verified: can't release bus on reset\r
+// if (!(d & 1))\r
+// d |= 2; // verified: can't release bus on reset\r
if (dold == d)\r
return;\r
\r
elprintf(EL_CDREGS, "m68k: resetting s68k");\r
SekResetS68k();\r
}\r
- if ((dold ^ d) & 2) {\r
+ if (((dold & 3) == 1) != ((d & 3) == 1)) {\r
elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r
remap_prg_window(d, Pico_mcd->s68k_regs[3]);\r
}\r
remap_word_ram(d);\r
goto write_comm;\r
case 6:\r
- Pico_mcd->bios[MEM_BE2(0x72)] = d; // simple hint vector changer\r
+ Pico.rom[MEM_BE2(0x72)] = d; // simple hint vector changer\r
return;\r
case 7:\r
- Pico_mcd->bios[MEM_BE2(0x73)] = d;\r
+ Pico.rom[MEM_BE2(0x73)] = d;\r
elprintf(EL_CDREGS, "hint vector set to %04x%04x",\r
- ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r
+ ((u16 *)Pico.rom)[0x70/2], ((u16 *)Pico.rom)[0x72/2]);\r
return;\r
case 8:\r
(void) cdc_host_r(); // acts same as reading\r
}\r
#endif\r
\r
-// RAM cart (40000 - 7fffff, optional)\r
+// RAM cart (400000 - 7fffff, optional)\r
static u32 PicoReadM68k8_ramc(u32 a)\r
{\r
u32 d = 0;\r
static u32 PicoReadM68k16_ramc(u32 a)\r
{\r
elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);\r
+ if ((a & 0xfffffc) == BASE+0x100) // CD detection by MSU\r
+ return (~a & 2) ? 0x5345 : 0x4741; // "SEGA"\r
return PicoReadM68k8_ramc(a + 1);\r
}\r
\r
\r
static void remap_prg_window(u32 r1, u32 r3)\r
{\r
- // PRG RAM\r
- if (r1 & 2) {\r
+ // PRG RAM, mapped to main CPU if sub is not running\r
+ if ((r1 & 3) != 1) {\r
void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];\r
- cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r
- }\r
- else {\r
- m68k_map_unmap(0x020000, 0x03ffff);\r
+ cpu68k_map_all_ram(BASE+0x020000, BASE+0x03ffff, bank, 0);\r
+ } else {\r
+ m68k_map_unmap(BASE+0x020000, BASE+0x03ffff);\r
}\r
}\r
\r
// 2M mode.\r
bank = Pico_mcd->word_ram2M;\r
if (r3 & 1) {\r
- cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);\r
+ cpu68k_map_all_ram(BASE+0x200000, BASE+0x23ffff, bank, 0);\r
cpu68k_map_all_funcs(0x80000, 0xbffff,\r
s68k_wordram_main_read8, s68k_wordram_main_read16,\r
s68k_wordram_main_write8, s68k_wordram_main_write16, 1);\r
} else {\r
Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP;\r
cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);\r
- m68k_map_unmap(0x200000, 0x23ffff);\r
+ m68k_map_unmap(BASE+0x200000, BASE+0x23ffff);\r
}\r
// TODO: handle 0x0c0000\r
}\r
int m = (r3 & 0x18) >> 3;\r
Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP;\r
bank = Pico_mcd->word_ram1M[b0];\r
- cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);\r
+ cpu68k_map_all_ram(BASE+0x200000, BASE+0x21ffff, bank, 0);\r
bank = Pico_mcd->word_ram1M[b0 ^ 1];\r
cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);\r
// "cell arrange" on m68k\r
- cpu68k_map_all_funcs(0x220000, 0x23ffff,\r
+ cpu68k_map_all_funcs(BASE+0x220000, BASE+0x23ffff,\r
m68k_cell_read8[b0], m68k_cell_read16[b0],\r
m68k_cell_write8[b0], m68k_cell_write16[b0], 0);\r
// "decode format" on s68k\r
Pico_mcd->m.dmna_ret_2m &= 3;\r
\r
// restore hint vector\r
- *(u16 *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r
+ *(u16 *)(Pico.rom + 0x72) = Pico_mcd->m.hint_vector;\r
}\r
\r
#ifdef EMU_M68K\r
\r
PICO_INTERNAL void PicoMemSetupCD(void)\r
{\r
+ if (!Pico_mcd)\r
+ Pico_mcd = plat_mmap(0x05000000, sizeof(mcd_state), 0, 0);\r
+ pcd_base_address = (Pico.romsize > 0x20000 ? 0x400000 : 0x000000);\r
+\r
// setup default main68k map\r
PicoMemSetup();\r
\r
cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_mcd_io, 1);\r
\r
// sub68k map\r
- cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);\r
- cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);\r
- cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);\r
- cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);\r
+ cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 3);\r
+ cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 3);\r
+ cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 3);\r
+ cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 3);\r
\r
// PRG RAM\r
- cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
- cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
- cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
- cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
- cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);\r
- cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);\r
+ cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 2);\r
+ cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 2);\r
+ cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 2);\r
+ cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 2);\r
+ cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 3);\r
+ cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 3);\r
\r
// BRAM\r
- cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r
- cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);\r
- cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);\r
- cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);\r
+ cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 3);\r
+ cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 3);\r
+ cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 3);\r
+ cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 3);\r
\r
// PCM, regs\r
- cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);\r
- cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);\r
- cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);\r
- cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);\r
+ cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 3);\r
+ cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 3);\r
+ cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 3);\r
+ cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 3);\r
\r
// RAMs\r
remap_prg_window(2,1);\r
PicoCpuFS68k.write_byte = (void *)s68k_write8;\r
PicoCpuFS68k.write_word = (void *)s68k_write16;\r
PicoCpuFS68k.write_long = (void *)s68k_write32;\r
-\r
- // setup FAME fetchmap\r
- {\r
-#if defined __clang__ || defined HW_WUP\r
- volatile // prevent strange relocs from clang\r
-#endif\r
- uptr ptr_ram = (uptr)PicoMem.ram;\r
- int i;\r
-\r
- // M68k\r
- // by default, point everything to fitst 64k of ROM (BIOS)\r
- for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
- // now real ROM (BIOS)\r
- for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom;\r
- // .. and RAM\r
- for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = ptr_ram - (i<<(24-FAMEC_FETCHBITS));\r
- // S68k\r
- // PRG RAM is default\r
- for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
- // real PRG RAM\r
- for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
- PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->prg_ram;\r
- // WORD RAM 2M area\r
- for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
- PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->word_ram2M - 0x80000;\r
- // remap_word_ram() will setup word ram for both\r
- }\r
#endif\r
#ifdef EMU_M68K\r
m68k_mem_setup_cd();\r
.global PicoWriteS68k16_dec_m2b1
@ externs, just for reference
-.extern Pico
+.extern Pico_mcd
.extern cdc_host_r
.extern m68k_reg_write8
.extern s68k_reg_read16
mov r3, #0x0e0000
0:
cell_map
- PIC_LDR(r1, r2, Pico)
+ PIC_LDR(r1, r2, Pico_mcd)
add r0, r0, r3
- ldr r1, [r1, #OFS_Pico_rom] @ Pico.mcd (used everywhere)
+ ldr r1, [r1] @ Pico.mcd (used everywhere)
eor r0, r0, #1
ldrb r0, [r1, r0]
bx lr
cmp r1, #0x2000 @ a120xx?
bne PicoRead8_io
- PIC_LDR(r1, r2, Pico)
+ PIC_LDR(r1, r2, Pico_mcd)
and r0, r0, #0x3f
- ldr r1, [r1, #OFS_Pico_rom] @ Pico.mcd
+ ldr r1, [r1] @ Pico.mcd
cmp r0, #0x0e
PIC_XB(lt ,r0, lsl #2)
b m_m68k_read8_hi
mov r3, #0x0e0000
0:
cell_map
- PIC_LDR(r1, r2, Pico)
+ PIC_LDR(r1, r2, Pico_mcd)
add r0, r0, r3
- ldr r1, [r1, #OFS_Pico_rom] @ Pico.mcd
+ ldr r1, [r1] @ Pico.mcd
bic r0, r0, #1
ldrh r0, [r1, r0]
bx lr
bne PicoRead16_io
m_m68k_read16_m68k_regs:
- PIC_LDR(r1, r2, Pico)
+ PIC_LDR(r1, r2, Pico_mcd)
and r0, r0, #0x3e
- ldr r1, [r1, #OFS_Pico_rom] @ Pico.mcd
+ ldr r1, [r1, @ Pico.mcd
cmp r0, #0x0e
PIC_XB(lt ,r0, lsl #1)
b m_m68k_read16_hi
0:
mov r3, r1
cell_map
- PIC_LDR(r2, r1, Pico)
+ PIC_LDR(r2, r1, Pico_mcd)
add r0, r0, r12
- ldr r2, [r2, #OFS_Pico_rom] @ Pico.mcd
+ ldr r2, [r2] @ Pico.mcd
ldr r2, [r2]
eor r0, r0, #1
strb r3, [r2, r0]
0:
mov r3, r1
cell_map
- PIC_LDR(r1, r2, Pico)
+ PIC_LDR(r1, r2, Pico_mcd)
add r0, r0, r12
- ldr r1, [r1, #OFS_Pico_rom] @ Pico.mcd
+ ldr r1, [r1] @ Pico.mcd
bic r0, r0, #1
strh r3, [r1, r0]
bx lr
PicoReadS68k8_dec1:
mov r3, #0x0a0000 @ + ^ / 2
0:
- PIC_LDR(r2, r1, Pico)
+ PIC_LDR(r2, r1, Pico_mcd)
eor r0, r0, #2
- ldr r2, [r2, #OFS_Pico_rom] @ Pico.mcd
+ ldr r2, [r2] @ Pico.mcd
movs r0, r0, lsr #1 @ +4-6 <<16
add r2, r2, r3 @ map to our address
ldrb r0, [r2, r0]
bx lr
m_s68k_read8_comm:
- PIC_LDR(r1, r2, Pico)
- ldr r1, [r1, #OFS_Pico_rom] @ Pico.mcd
+ PIC_LDR(r1, r2, Pico_mcd)
+ ldr r1, [r1] @ Pico.mcd
add r1, r1, #0x110000
ldrb r1, [r1, r0]
bic r0, r0, #1
bne m_read_null
@ must not trash r3 and r12
- PIC_LDR(r1, r2, Pico)
+ PIC_LDR(r1, r2, Pico_mcd)
bic r0, r0, #0xff0000
- ldr r1, [r1, #OFS_Pico_rom] @ Pico.mcd
+ ldr r1, [r1] @ Pico.mcd
mov r2, #0x110000
orr r2, r2, #0x002200
cmp r0, #0x2000
PicoReadS68k16_dec1:
mov r3, #0x0a0000 @ + ^ / 2
0:
- PIC_LDR(r2, r1, Pico)
+ PIC_LDR(r2, r1, Pico_mcd)
eor r0, r0, #2
- ldr r2, [r2, #OFS_Pico_rom] @ Pico.mcd
+ ldr r2, [r2] @ Pico.mcd
mov r0, r0, lsr #1 @ +4-6 <<16
add r2, r2, r3 @ map to our address
ldrb r0, [r2, r0]
.macro m_s68k_write8_2M_decode
- PIC_LDR(r2, ip, Pico)
+ PIC_LDR(r2, ip, Pico_mcd)
eor r0, r0, #2
- ldr r2, [r2, #OFS_Pico_rom] @ Pico.mcd
+ ldr r2, [r2] @ Pico.mcd
movs r0, r0, lsr #1 @ +4-6 <<16
add r2, r2, r3 @ map to our address
.endm
bxlt lr
m_s68k_write8_pcm_ram:
- PIC_LDR(r3, r2, Pico)
+ PIC_LDR(r3, r2, Pico_mcd)
bic r0, r0, #0x00e000
- ldr r3, [r3, #OFS_Pico_rom] @ Pico.mcd
+ ldr r3, [r3] @ Pico.mcd
mov r0, r0, lsr #1
add r2, r3, #0x110000
add r2, r2, #0x002200
.macro m_s68k_write16_2M_decode
- PIC_LDR(r2, ip, Pico)
+ PIC_LDR(r2, ip, Pico_mcd)
eor r0, r0, #2
- ldr r2, [r2, #OFS_Pico_rom] @ Pico.mcd
+ ldr r2, [r2] @ Pico.mcd
mov r0, r0, lsr #1 @ +4-6 <<16
add r2, r2, r3 @ map to our address
.endm
bne s68k_reg_write16
m_s68k_write16_regs_spec: @ special case
- PIC_LDR(r2, r0, Pico)
+ PIC_LDR(r2, r0, Pico_mcd)
mov r0, #0x110000
- ldr r2, [r2, #OFS_Pico_rom] @ Pico.mcd
+ ldr r2, [r2] @ Pico.mcd
add r0, r0, #0x00000f
strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d;
bx lr
void cpu68k_map_set(uptr *map, u32 start_addr, u32 end_addr,\r
const void *func_or_mh, int is_func)\r
{\r
- xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r
+ xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func & 1);\r
#ifdef EMU_F68K\r
// setup FAME fetchmap\r
- if (!is_func)\r
+ if (!(is_func & 1))\r
{\r
+ M68K_CONTEXT *ctx = is_func & 2 ? &PicoCpuFS68k : &PicoCpuFM68k;\r
int shiftout = 24 - FAMEC_FETCHBITS;\r
int i = start_addr >> shiftout;\r
uptr base = (uptr)func_or_mh - (i << shiftout);\r
for (; i <= (end_addr >> shiftout); i++)\r
- PicoCpuFM68k.Fetch[i] = base;\r
+ ctx->Fetch[i] = base;\r
}\r
#endif\r
}\r
PicoCpuFM68k.write_byte = (void *)m68k_write8;\r
PicoCpuFM68k.write_word = (void *)m68k_write16;\r
PicoCpuFM68k.write_long = (void *)m68k_write32;\r
-\r
- // setup FAME fetchmap\r
- {\r
- int i;\r
- // by default, point everything to first 64k of ROM\r
- for (i = 0; i < M68K_FETCHBANK1 * 0xe0 / 0x100; i++)\r
- PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
- // now real ROM\r
- for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom;\r
- // RAM already set\r
- }\r
#endif\r
#ifdef EMU_M68K\r
m68k_mem_setup();\r
else if (support&1) hw=0x00; // Japan NTSC\r
else hw=0x80; // USA\r
\r
- Pico.m.hardware=(unsigned char)(hw|0x20); // No disk attached\r
+ if (!(PicoIn.AHW & PAHW_MCD)) hw |= 0x20; // No disk attached\r
+\r
+ Pico.m.hardware=(unsigned char)hw; \r
Pico.m.pal=pal;\r
}\r
\r
CT_ISO = 1, /* 2048 B/sector */\r
CT_BIN = 2, /* 2352 B/sector */\r
// audio tracks\r
- CT_MP3 = 3,\r
- CT_WAV = 4,\r
- CT_CHD = 5,\r
+ CT_AUDIO = 8,\r
+ CT_RAW = CT_AUDIO | 1,\r
+ CT_CHD = CT_AUDIO | 2,\r
+ CT_MP3 = CT_AUDIO | 3,\r
+ CT_WAV = CT_AUDIO | 4,\r
};\r
\r
typedef struct\r
char pcm_regs_dirty;\r
} mcd_state;\r
\r
-// XXX: this will need to be reworked for cart+cd support.\r
-#define Pico_mcd ((mcd_state *)Pico.rom)\r
-\r
// 32X\r
#define P32XS_FM (1<<15)\r
#define P32XS_nCART (1<< 8)\r
void DmaSlowCell(u32 source, u32 a, int len, unsigned char inc);\r
\r
// cd/memory.c\r
+extern unsigned int pcd_base_address;\r
PICO_INTERNAL void PicoMemSetupCD(void);\r
u32 PicoRead8_mcd_io(u32 a);\r
u32 PicoRead16_mcd_io(u32 a);\r
#define PCDS_IEN5 (1<<5)\r
#define PCDS_IEN6 (1<<6)\r
\r
+extern mcd_state *Pico_mcd;\r
+\r
PICO_INTERNAL void PicoInitMCD(void);\r
PICO_INTERNAL void PicoExitMCD(void);\r
PICO_INTERNAL void PicoPowerMCD(void);\r
PCD_EVENT_COUNT,\r
};\r
extern unsigned int pcd_event_times[PCD_EVENT_COUNT];\r
+\r
void pcd_event_schedule(unsigned int now, enum pcd_event event, int after);\r
void pcd_event_schedule_s68k(enum pcd_event event, int after);\r
void pcd_prepare_frame(void);\r
SekPackCpu(buff, 1);\r
if (Pico_mcd->s68k_regs[3] & 4) // 1M mode?\r
wram_1M_to_2M(Pico_mcd->word_ram2M);\r
- memcpy(&Pico_mcd->m.hint_vector, Pico_mcd->bios + 0x72,\r
+ memcpy(&Pico_mcd->m.hint_vector, Pico.rom + 0x72,\r
sizeof(Pico_mcd->m.hint_vector));\r
\r
CHECKED_WRITE_BUFF(CHUNK_S68K, buff);\r
{\r
u8 r3 = Pico_mcd->s68k_regs[3];\r
elprintf(EL_VDPDMA, "DmaSlow CD, r3=%02x", r3);\r
- if (source < 0x20000) { // Bios area\r
- base = (u16 *)Pico_mcd->bios;\r
- } else if ((source & 0xfc0000) == 0x200000) { // Word Ram\r
+ if (source < Pico.romsize /*0x20000*/) { // Bios area\r
+ base = (u16 *)(Pico.rom + (source & 0xfe0000));\r
+ } else if ((source & 0xfc0000) == pcd_base_address+0x200000) { // Word Ram\r
if (!(r3 & 4)) { // 2M mode\r
base = (u16 *)(Pico_mcd->word_ram2M + (source & 0x20000));\r
} else {\r
- if (source < 0x220000) { // 1M mode\r
+ if ((source & 0xfe0000) < pcd_base_address+0x220000) { // 1M mode\r
int bank = r3 & 1;\r
base = (u16 *)(Pico_mcd->word_ram1M[bank]);\r
} else {\r
}\r
}\r
source -= 2;\r
- } else if ((source & 0xfe0000) == 0x020000) { // Prg Ram\r
+ } else if ((source & 0xfe0000) == pcd_base_address+0x020000) { // Prg Ram\r
base = (u16 *)Pico_mcd->prg_ram_b[r3 >> 6];\r
source -= 2; // XXX: test\r
}\r