*(unsigned int *)(cpu+0x44)=context->sr;\r
*(unsigned int *)(cpu+0x48)=context->asp;\r
cpu[0x4c] = context->interrupts[0];\r
- cpu[0x4d] = (context->execinfo & M68K_HALTED) ? 1 : 0;\r
+ cpu[0x4d] = (context->execinfo & FM68K_HALTED) ? 1 : 0;\r
#endif\r
\r
*(unsigned int *)(cpu+0x40)=pc;\r
context->sr =*(unsigned int *)(cpu+0x44);\r
context->asp=*(unsigned int *)(cpu+0x48);\r
context->interrupts[0] = cpu[0x4c];\r
- context->execinfo &= ~M68K_HALTED;\r
- if (cpu[0x4d]&1) context->execinfo |= M68K_HALTED;\r
+ context->execinfo &= ~FM68K_HALTED;\r
+ if (cpu[0x4d]&1) context->execinfo |= FM68K_HALTED;\r
#endif\r
return 0;\r
}\r
#undef dprintf\r
#define dprintf(f,...) printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__)\r
\r
+#if defined(EMU_C68K)\r
+#define other_get_sr() CycloneGetSr(&PicoCpuCM68k)\r
+#define other_dar(i) PicoCpuCM68k.d[i]\r
+#define other_osp PicoCpuCM68k.osp\r
+#define other_get_irq() PicoCpuCM68k.irq\r
+#define other_set_irq(irq) PicoCpuCM68k.irq=irq\r
+#define other_is_stopped() (PicoCpuCM68k.state_flags&1)\r
+#define other_is_tracing() ((PicoCpuCM68k.state_flags&2)?1:0)\r
+#elif defined(EMU_F68K)\r
+#define other_get_sr() PicoCpuFM68k.sr\r
+#define other_dar(i) ((unsigned int*)PicoCpuFM68k.dreg)[i]\r
+#define other_osp PicoCpuFM68k.asp\r
+#define other_get_irq() PicoCpuFM68k.interrupts[0]\r
+#define other_set_irq(irq) PicoCpuFM68k.interrupts[0]=irq\r
+#define other_is_stopped() ((PicoCpuFM68k.execinfo&FM68K_HALTED)?1:0)\r
+#define other_is_tracing() ((PicoCpuFM68k.execinfo&FM68K_EMULATE_TRACE)?1:0)\r
+#else\r
+#error other core missing, don't compile this file\r
+#endif\r
+\r
+static int otherRun(void)\r
+{\r
+#if defined(EMU_C68K)\r
+ PicoCpuCM68k.cycles=1;\r
+ CycloneRun(&PicoCpuCM68k);\r
+ return 1-PicoCpuCM68k.cycles;\r
+#elif defined(EMU_F68K)\r
+ return fm68k_emulate(1);\r
+#endif\r
+}\r
+\r
//static\r
void dumpPCandExit()\r
{\r
dprintf("PC: %06x: %04x: %s", pppc, ppop, buff);\r
dprintf(" this | prev");\r
for(i=0; i < 8; i++)\r
- dprintf("d%i=%08x, a%i=%08x | d%i=%08x, a%i=%08x", i, PicoCpuCM68k.d[i], i, PicoCpuCM68k.a[i], i, old_regs[i], i, old_regs[i+8]);\r
- dprintf("SR: %04x | %04x (??s? 0iii 000x nzvc)", CycloneGetSr(&PicoCpuCM68k), old_sr);\r
+ dprintf("d%i=%08x, a%i=%08x | d%i=%08x, a%i=%08x", i, other_dar(i), i, other_dar(i+8), i, old_regs[i], i, old_regs[i+8]);\r
+ dprintf("SR: %04x | %04x (??s? 0iii 000x nzvc)", other_get_sr(), old_sr);\r
dprintf("last_read: %08x @ %06x", lastread_d[--lrp_cyc&15], lastread_a);\r
dprintf("ops done: %i", ops);\r
exit(1);\r
int CM_compareRun(int cyc)\r
{\r
char *str;\r
- int cyc_done=0, cyc_cyclone, cyc_musashi, err=0;\r
+ int cyc_done=0, cyc_other, cyc_musashi, err=0;\r
unsigned int i, mu_sr;\r
\r
lrp_cyc = lrp_mus = 0;\r
{\r
have_illegal = 0;\r
m68ki_cpu.pc += 2;\r
+#ifdef EMU_C68K\r
PicoCpuCM68k.pc=PicoCpuCM68k.checkpc(PicoCpuCM68k.pc + 2);\r
+#endif\r
}\r
// hacks for test_misc2\r
if (m68ki_cpu.pc == 0x0002e0 && m68k_read_disassembler_16(m68ki_cpu.pc) == 0x4e73)\r
\r
pppc = SekPc;\r
ppop = m68k_read_disassembler_16(pppc);\r
- memcpy(old_regs, PicoCpuCM68k.d, 4*16);\r
- old_sr = CycloneGetSr(&PicoCpuCM68k);\r
+ memcpy(old_regs, &other_dar(0), 4*16);\r
+ old_sr = other_get_sr();\r
\r
#if 0\r
{\r
\r
if (dbg_irq_level)\r
{\r
- PicoCpuCM68k.irq=dbg_irq_level;\r
+ other_set_irq(dbg_irq_level);\r
m68k_set_irq(dbg_irq_level);\r
dbg_irq_level=0;\r
}\r
\r
- PicoCpuCM68k.cycles=1;\r
- CycloneRun(&PicoCpuCM68k);\r
- cyc_cyclone=1-PicoCpuCM68k.cycles;\r
+ cyc_other=otherRun();\r
cyc_musashi=m68k_execute(1);\r
\r
- if(cyc_cyclone != cyc_musashi) {\r
- dprintf("cycles: %i vs %i", cyc_cyclone, cyc_musashi);\r
+ if (cyc_other != cyc_musashi) {\r
+ dprintf("cycles: %i vs %i", cyc_other, cyc_musashi);\r
err=1;\r
}\r
\r
- if(lrp_cyc != lrp_mus) {\r
+ if (lrp_cyc != lrp_mus) {\r
dprintf("lrp: %i vs %i", lrp_cyc&15, lrp_mus&15);\r
err=1;\r
}\r
\r
- if(lwp_cyc != lwp_mus) {\r
+ if (lwp_cyc != lwp_mus) {\r
dprintf("lwp: %i vs %i", lwp_cyc&15, lwp_mus&15);\r
err=1;\r
}\r
\r
- for(i=0; i < 16; i++) {\r
- if(lastwrite_cyc_d[i] != lastwrite_mus_d[i]) {\r
+ for (i=0; i < 16; i++) {\r
+ if (lastwrite_cyc_d[i] != lastwrite_mus_d[i]) {\r
dprintf("lastwrite: [%i]= %08x vs %08x", i, lastwrite_cyc_d[i], lastwrite_mus_d[i]);\r
- err=1;\r
+ err=1;\r
break;\r
}\r
}\r
\r
// compare PC\r
m68ki_cpu.pc&=~1;\r
- if( SekPc != (m68ki_cpu.pc/*&0xffffff*/) ) {\r
- dprintf("PC: %06x vs %06x", SekPc, m68ki_cpu.pc/*&0xffffff*/);\r
+ if ( SekPc != (m68ki_cpu.pc&0xffffff) ) {\r
+ dprintf("PC: %06x vs %06x", SekPc, m68ki_cpu.pc&0xffffff);\r
err=1;\r
}\r
\r
#endif\r
\r
// compare regs\r
- for(i=0; i < 16; i++) {\r
- if(PicoCpuCM68k.d[i] != m68ki_cpu.dar[i]) {\r
+ for (i=0; i < 16; i++) {\r
+ if (other_dar(i) != m68ki_cpu.dar[i]) {\r
str = (i < 8) ? "d" : "a";\r
- dprintf("reg: %s%i: %08x vs %08x", str, i&7, PicoCpuCM68k.d[i], m68ki_cpu.dar[i]);\r
+ dprintf("reg: %s%i: %08x vs %08x", str, i&7, other_dar(i), m68ki_cpu.dar[i]);\r
err=1;\r
}\r
}\r
\r
// SR\r
- if((CycloneGetSr(&PicoCpuCM68k)) != (mu_sr = m68k_get_reg(NULL, M68K_REG_SR))) {\r
- dprintf("SR: %04x vs %04x (??s? 0iii 000x nzvc)", CycloneGetSr(&PicoCpuCM68k), mu_sr);\r
+ if (other_get_sr() != (mu_sr = m68k_get_reg(NULL, M68K_REG_SR))) {\r
+ dprintf("SR: %04x vs %04x (??s? 0iii 000x nzvc)", other_get_sr(), mu_sr);\r
err=1;\r
}\r
\r
// IRQl\r
- if(PicoCpuCM68k.irq != (m68ki_cpu.int_level>>8)) {\r
- dprintf("IRQ: %i vs %i", PicoCpuCM68k.irq, (m68ki_cpu.int_level>>8));\r
+ if (other_get_irq() != (m68ki_cpu.int_level>>8)) {\r
+ dprintf("IRQ: %i vs %i", other_get_irq(), (m68ki_cpu.int_level>>8));\r
err=1;\r
}\r
\r
// OSP/USP\r
- if(PicoCpuCM68k.osp != m68ki_cpu.sp[((mu_sr>>11)&4)^4]) {\r
- dprintf("OSP: %06x vs %06x", PicoCpuCM68k.osp, m68ki_cpu.sp[((mu_sr>>11)&4)^4]);\r
+ if (other_osp != m68ki_cpu.sp[((mu_sr>>11)&4)^4]) {\r
+ dprintf("OSP: %06x vs %06x", other_osp, m68ki_cpu.sp[((mu_sr>>11)&4)^4]);\r
err=1;\r
}\r
\r
// stopped\r
- if(((PicoCpuCM68k.state_flags&1) && !m68ki_cpu.stopped) || (!(PicoCpuCM68k.state_flags&1) && m68ki_cpu.stopped)) {\r
- dprintf("stopped: %i vs %i", PicoCpuCM68k.state_flags&1, m68ki_cpu.stopped);\r
+ if ((other_is_stopped() && !m68ki_cpu.stopped) || (!other_is_stopped() && m68ki_cpu.stopped)) {\r
+ dprintf("stopped: %i vs %i", other_is_stopped(), m68ki_cpu.stopped);\r
err=1;\r
}\r
\r
// tracing\r
- if(((PicoCpuCM68k.state_flags&2) && !m68ki_tracing) || (!(PicoCpuCM68k.state_flags&2) && m68ki_tracing)) {\r
- dprintf("tracing: %i vs %i", PicoCpuCM68k.state_flags&2, m68ki_tracing);\r
+ if((other_is_tracing() && !m68ki_tracing) || (!other_is_tracing() && m68ki_tracing)) {\r
+ dprintf("tracing: %i vs %i", other_is_tracing(), m68ki_tracing);\r
err=1;\r
}\r
\r
PicoCpuCM68k.a[7] = m68ki_cpu.dar[15] = 0xff8000;\r
#endif\r
\r
- cyc_done += cyc_cyclone;\r
+ cyc_done += cyc_other;\r
ops++;\r
}\r
\r
#endif\r
\r
\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
-// cyclone debug mode\r
+#ifdef EMU_CORE_DEBUG\r
u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r
extern unsigned int ppop;\r
\r
a&=0xffffff;\r
\r
-#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
+#ifndef EMU_CORE_DEBUG\r
// sram\r
if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
d = SRAMRead(a);\r
#ifdef __debug_io\r
dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
#endif\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
+#ifdef EMU_CORE_DEBUG\r
if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
lastread_a = a;\r
lastread_d[lrp_cyc++&15] = (u8)d;\r
\r
a&=0xfffffe;\r
\r
-#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
+#ifndef EMU_CORE_DEBUG\r
// sram\r
if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
d = SRAMRead(a);\r
#ifdef __debug_io\r
dprintf("r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
#endif\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
+#ifdef EMU_CORE_DEBUG\r
if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
lastread_a = a;\r
lastread_d[lrp_cyc++&15] = d;\r
#ifdef __debug_io\r
dprintf("r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
#endif\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
+#ifdef EMU_CORE_DEBUG\r
if(a>=Pico.romsize/*&&(ppop&0x3f)!=0x3a&&(ppop&0x3f)!=0x3b*/) {\r
lastread_a = a;\r
lastread_d[lrp_cyc++&15] = d;\r
#ifdef __debug_io\r
dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
#endif\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
+#ifdef EMU_CORE_DEBUG\r
lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
- //if ((a&0xe0ffff)==0xe0a9ba+0x69c)\r
- //if(a==0x200000||a==0x200001) printf("w8 : %02x [%06x] @ %06x [%i]\n", d, a, SekPc, SekCyclesDoneT());\r
- // dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
\r
if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r
log_io(a, 8, 1);\r
#ifdef __debug_io\r
dprintf("w16: %06x, %04x", a&0xffffff, d);\r
#endif\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
+#ifdef EMU_CORE_DEBUG\r
lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
\r
#ifdef __debug_io\r
dprintf("w32: %06x, %08x", a&0xffffff, d);\r
#endif\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
+#ifdef EMU_CORE_DEBUG\r
lastwrite_cyc_d[lwp_cyc++&15] = d;\r
#endif\r
\r
a&=0xffffff;\r
if(PicoMCD&1) return m68k_read_pcrelative_CD8(a);\r
if(a<Pico.romsize) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
-#ifdef EMU_C68K\r
+#ifdef EMU_CORE_DEBUG\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
a&=0xffffff;\r
if(PicoMCD&1) return m68k_read_pcrelative_CD16(a);\r
if(a<Pico.romsize) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
-#ifdef EMU_C68K\r
+#ifdef EMU_CORE_DEBUG\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
a&=0xffffff;\r
if(PicoMCD&1) return m68k_read_pcrelative_CD32(a);\r
if(a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
-#ifdef EMU_C68K\r
+#ifdef EMU_CORE_DEBUG\r
if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
#endif\r
if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r
unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r
\r
-#ifdef EMU_C68K\r
+#ifdef EMU_CORE_DEBUG\r
// ROM only\r
unsigned int m68k_read_memory_8(unsigned int a)\r
{\r
{\r
u8 ret = 0;\r
\r
+#ifndef _USE_DRZ80\r
+ if (a<0x4000) return Pico.zram[a&0x1fff];\r
+#endif\r
+\r
if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
{\r
- if(PicoOpt&1) ret = (u8) YM2612Read();\r
- goto end;\r
+ if (PicoOpt&1) ret = (u8) YM2612Read();\r
+ return ret;\r
}\r
\r
if (a>=0x8000)\r
\r
ret = (u8) PicoRead8(addr68k);\r
elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
- goto end;\r
+ return ret;\r
}\r
\r
+#ifdef _USE_DRZ80\r
// should not be needed || dprintf("z80_read RAM");\r
- if (a<0x4000) { ret = (u8) Pico.zram[a&0x1fff]; goto end; }\r
+ if (a<0x4000) return Pico.zram[a&0x1fff];\r
+#endif\r
\r
elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret);\r
-\r
-end:\r
return ret;\r
}\r
\r
PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data)\r
#endif\r
{\r
- //if (a<0x4000)\r
- // dprintf("z80 w8 : %06x, %02x @%04x", a, data, mz80GetRegisterValue(NULL, 0));\r
+#ifndef _USE_DRZ80\r
+ if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
+#endif\r
\r
if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
{\r
return;\r
}\r
\r
+#ifdef _USE_DRZ80\r
// should not be needed, drZ80 knows how to access RAM itself || dprintf("z80_write RAM @ %08x", lr);\r
if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
+#endif\r
\r
elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
}\r
#ifndef _USE_CZ80\r
PICO_INTERNAL unsigned short z80_read16(unsigned short a)\r
{\r
- //dprintf("z80_read16");\r
-\r
return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r
}\r
\r
PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a)\r
{\r
- //dprintf("z80_write16");\r
-\r
z80_write((unsigned char) data,a);\r
z80_write((unsigned char)(data>>8),(u16)(a+1));\r
}\r
{\r
int cyc_do;\r
SekCycleAim+=cyc;\r
- //printf("aim: %i, cnt: %i\n", SekCycleAim, SekCycleCnt);\r
if((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;\r
- //printf("cyc_do: %i\n", cyc_do);\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
- // this means we do run-compare Cyclone vs Musashi\r
+#if defined(EMU_CORE_DEBUG)\r
+ // this means we do run-compare\r
SekCycleCnt+=CM_compareRun(cyc_do);\r
#elif defined(EMU_C68K)\r
PicoCpuCM68k.cycles=cyc_do;\r
#elif defined(EMU_M68K)\r
SekCycleCnt+=m68k_execute(cyc_do);\r
#elif defined(EMU_F68K)\r
- SekCycleCnt+=m68k_emulate(cyc_do);\r
+ SekCycleCnt+=fm68k_emulate(cyc_do+1);\r
#endif\r
}\r
\r
{\r
// this is required for timing sensitive stuff to work\r
int realaim=SekCycleAim; SekCycleAim=SekCycleCnt+1;\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
- // this means we do run-compare Cyclone vs Musashi\r
+#if defined(EMU_CORE_DEBUG)\r
SekCycleCnt+=CM_compareRun(1);\r
#elif defined(EMU_C68K)\r
PicoCpuCM68k.cycles=1;\r
#elif defined(EMU_M68K)\r
SekCycleCnt+=m68k_execute(1);\r
#elif defined(EMU_F68K)\r
- SekCycleCnt+=m68k_emulate(1);\r
+ SekCycleCnt+=fm68k_emulate(1);\r
#endif\r
SekCycleAim=realaim;\r
}\r
static int PicoFrameHints(void)
{
struct PicoVideo *pv=&Pico.video;
- int lines,y,lines_vis = 224,total_z80 = 0,z80CycleAim = 0,line_sample;
- int skip=PicoSkipFrame || (PicoOpt&0x10);
+ int lines, y, lines_vis = 224, total_z80 = 0, z80CycleAim = 0, line_sample, skip;
int hint; // Hint counter
+ if ((PicoOpt&0x10) && !PicoSkipFrame) {
+ // draw a frame just after vblank in alternative render mode
+ // yes, this will cause 1 frame lag, but this is inaccurate mode anyway.
+ PicoFrameFull();
+#ifdef DRAW_FINISH_FUNC
+ DRAW_FINISH_FUNC();
+#endif
+ skip = 1;
+ }
+ else skip=PicoSkipFrame;
+
if (Pico.m.pal) {
//cycles_68k = (int) ((double) OSC_PAL / 7 / 50 / 312 + 0.4); // should compile to a constant (488)
//cycles_z80 = (int) ((double) OSC_PAL / 15 / 50 / 312 + 0.4); // 228
}
#ifdef DRAW_FINISH_FUNC
- DRAW_FINISH_FUNC();
+ if (!skip)
+ DRAW_FINISH_FUNC();
#endif
// V-int line (224 or 240)
#endif
}
- // draw a frame just after vblank in alternative render mode
- if (!PicoSkipFrame && (PicoOpt&0x10))
- PicoFrameFull();
-
return 0;
}
#define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)\r
#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }\r
#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }\r
+#define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
+#ifdef EMU_M68K\r
+#define EMU_CORE_DEBUG\r
+#endif\r
#endif\r
\r
#ifdef EMU_F68K\r
#define SekSetCyclesLeft(c) { \\r
if ((PicoMCD&1) && (PicoOpt & 0x2000)) SekCycleCnt=SekCycleAim-(c); else SekSetCyclesLeftNoMCD(c); \\r
}\r
-#define SekPc m68k_get_pc(&PicoCpuFM68k)\r
-#define SekPcS68k m68k_get_pc(&PicoCpuFS68k)\r
+#define SekPc fm68k_get_pc(&PicoCpuFM68k)\r
+#define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)\r
#define SekSetStop(x) { \\r
- PicoCpuFM68k.execinfo &= ~M68K_HALTED; \\r
- if (x) { PicoCpuFM68k.execinfo |= M68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \\r
+ PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \\r
+ if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \\r
}\r
#define SekSetStopS68k(x) { \\r
- PicoCpuFS68k.execinfo &= ~M68K_HALTED; \\r
- if (x) { PicoCpuFS68k.execinfo |= M68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \\r
+ PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \\r
+ if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \\r
}\r
+#define SekShouldInterrupt fm68k_would_interrupt()\r
+#ifdef EMU_M68K\r
+#define EMU_CORE_DEBUG\r
+#endif\r
#endif\r
\r
#ifdef EMU_M68K\r
if(x) { SET_CYCLES(0); PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \\r
else PicoCpuMS68k.stopped=0; \\r
}\r
+#define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK)\r
#endif\r
#endif\r
\r
}\r
#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)\r
\r
-// debug cyclone\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
+#ifdef EMU_CORE_DEBUG\r
#undef SekSetCyclesLeftNoMCD\r
#undef SekSetCyclesLeft\r
#undef SekCyclesBurn\r
// Cart.c\r
PICO_INTERNAL void PicoCartDetect(void);\r
\r
+// Debug.c\r
+int CM_compareRun(int cyc);\r
+\r
// Draw.c\r
PICO_INTERNAL int PicoLine(int scan);\r
PICO_INTERNAL void PicoFrameStart(void);\r
PicoCpuCM68k.IrqCallback=SekIntAck;\r
PicoCpuCM68k.ResetCallback=SekResetAck;\r
PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;\r
+ PicoCpuCM68k.flags=4; // Z set\r
#endif\r
#ifdef EMU_M68K\r
{\r
void *oldcontext = g_m68kcontext;\r
g_m68kcontext = &PicoCpuFM68k;\r
memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));\r
- m68k_init();\r
+ fm68k_init();\r
PicoCpuFM68k.iack_handler = SekIntAckF68K;\r
g_m68kcontext = oldcontext;\r
}\r
PicoCpuCM68k.state_flags=0;\r
PicoCpuCM68k.osp=0;\r
PicoCpuCM68k.srh =0x27; // Supervisor mode\r
- PicoCpuCM68k.flags=4; // Z set\r
PicoCpuCM68k.irq=0;\r
PicoCpuCM68k.a[7]=PicoCpuCM68k.read32(0); // Stack Pointer\r
PicoCpuCM68k.membase=0;\r
#ifdef EMU_F68K\r
{\r
g_m68kcontext = &PicoCpuFM68k;\r
- m68k_reset();\r
+ fm68k_reset();\r
}\r
#endif\r
\r
\r
PICO_INTERNAL int SekInterrupt(int irq)\r
{\r
-#if defined(EMU_C68K) && defined(EMU_M68K)\r
+#ifdef EMU_CORE_DEBUG\r
{\r
extern unsigned int dbg_irq_level;\r
dbg_irq_level=irq;\r
PICO_INTERNAL void SekState(int *data)\r
{\r
#ifdef EMU_C68K\r
- memcpy32(data,PicoCpuCM68k.d,0x44/4);\r
+ memcpy32(data,(int *)PicoCpuCM68k.d,0x44/4);\r
#elif defined(EMU_M68K)\r
- memcpy32(data, PicoCpuMM68k.dar, 0x40/4);\r
+ memcpy32(data, (int *)PicoCpuMM68k.dar, 0x40/4);\r
data[0x10] = PicoCpuMM68k.pc;\r
#elif defined(EMU_F68K)\r
memcpy32(data, (int *)PicoCpuFM68k.dreg, 0x40/4);\r
pd=(u16 *)(prg_ram+(source&0x1fffe));\r
pdend=(u16 *)(prg_ram+0x20000);\r
} else {\r
- elprintf(EL_VDPDMA|EL_ANOMALY, "DmaSlow FIXME: unsupported src");\r
+ elprintf(EL_VDPDMA|EL_ANOMALY, "DmaSlow[%i] %06x->%04x: FIXME: unsupported src", Pico.video.type, source, a);\r
return;\r
}\r
} else {\r
pd=(u16 *)(Pico.rom+(source&~1));\r
pdend=(u16 *)(Pico.rom+Pico.romsize);\r
} else {\r
- elprintf(EL_VDPDMA|EL_ANOMALY, "DmaSlow: invalid dma src");\r
+ elprintf(EL_VDPDMA|EL_ANOMALY, "DmaSlow[%i] %06x->%04x: invalid src", Pico.video.type, source, a);\r
return;\r
}\r
}\r
//if(num==01) dprintf("set_blank: %i @ %06x [%i|%i]", !((d&0x40)>>6), SekPc, Pico.m.scanline, SekCyclesDone());\r
//if(num==10) dprintf("hint_set: %i @ %06x [%i|%i]", (unsigned char)d, SekPc, Pico.m.scanline, SekCyclesDone());\r
pvid->reg[num]=(unsigned char)d;\r
-#if !(defined(EMU_C68K) && defined(EMU_M68K)) // not debugging Cyclone\r
+#ifndef EMU_CORE_DEBUG\r
// update IRQ level (Lemmings, Wiz 'n' Liz intro, ... )\r
// may break if done improperly:\r
// International Superstar Soccer Deluxe (crash), Street Racer (logos), Burning Force (gfx),\r
- // Fatal Rewind (hang), Sesame Street Counting Cafe\r
- if(num < 2) {\r
-#ifdef EMU_C68K\r
- // hack: make sure we do not touch the irq line if Cyclone is just about to take the IRQ\r
- if (PicoCpuCM68k.irq <= (PicoCpuCM68k.srh&7)) {\r
-#endif\r
- int lines, pints;\r
+ // Fatal Rewind (crash), Sesame Street Counting Cafe\r
+ if (num < 2)\r
+ {\r
+ if (!SekShouldInterrupt) // hack\r
+ {\r
+ int lines, pints, irq=0;\r
lines = (pvid->reg[1] & 0x20) | (pvid->reg[0] & 0x10);\r
pints = (pvid->pending_ints&lines);\r
- if(pints & 0x20) SekInterrupt(6);\r
- else if(pints & 0x10) SekInterrupt(4);\r
- else SekInterrupt(0);\r
-#ifdef EMU_C68K\r
- // adjust cycles for Cyclone so it would take the int "in time"\r
- if(PicoCpuCM68k.irq) {\r
- SekEndRun(24);\r
- }\r
+ if(pints & 0x20) irq = 6;\r
+ else if(pints & 0x10) irq = 4;\r
+ SekInterrupt(irq); // update line\r
+\r
+ if (irq) SekEndRun(24); // make it delayed\r
}\r
-#endif\r
}\r
else\r
#endif\r
SekCycleCnt+=m68k_execute(cyc_do);
#elif defined(EMU_F68K)
g_m68kcontext=&PicoCpuFM68k;
- SekCycleCnt+=m68k_emulate(cyc_do);
+ SekCycleCnt+=fm68k_emulate(cyc_do);
#endif
}
SekCycleCntS68k+=m68k_execute(cyc_do);
#elif defined(EMU_F68K)
g_m68kcontext=&PicoCpuFS68k;
- SekCycleCntS68k+=m68k_emulate(cyc_do);
+ SekCycleCntS68k+=fm68k_emulate(cyc_do);
#endif
}
SekCycleCnt += m68k_execute(cyc_do);
#elif defined(EMU_F68K)
g_m68kcontext = &PicoCpuFM68k;
- SekCycleCnt += m68k_emulate(cyc_do);
+ SekCycleCnt += fm68k_emulate(cyc_do);
#endif
}
if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
SekCycleCntS68k += m68k_execute(cyc_do);
#elif defined(EMU_F68K)
g_m68kcontext = &PicoCpuFS68k;
- SekCycleCntS68k += m68k_emulate(cyc_do);
+ SekCycleCntS68k += fm68k_emulate(cyc_do);
#endif
}
}
-// (c) Copyright 2006 notaz, All rights reserved.
+// (c) Copyright 2007 notaz, All rights reserved.
#include "../PicoInt.h"
void *oldcontext = g_m68kcontext;
g_m68kcontext = &PicoCpuFS68k;
memset(&PicoCpuFS68k, 0, sizeof(PicoCpuFS68k));
- m68k_init();
+ fm68k_init();
PicoCpuFS68k.iack_handler = SekIntAckFS68k;
g_m68kcontext = oldcontext;
}
{
void *oldcontext = g_m68kcontext;
g_m68kcontext = &PicoCpuFS68k;
- m68k_reset();
+ fm68k_reset();
g_m68kcontext = oldcontext;
}
#endif
#elif defined(_USE_CZ80)\r
*(int *)data = 0x00007a43; // "Cz"\r
memcpy(data+4, &CZ80, (INT32)&CZ80.BasePC - (INT32)&CZ80);\r
- printf("size: %i (%x)\n", (INT32)&CZ80.BasePC - (INT32)&CZ80, (INT32)&CZ80.BasePC - (INT32)&CZ80); // FIXME rm\r
#endif\r
}\r
\r
#define M68K_FETCHBANK1 (1 << FAMEC_FETCHBITS)\r
\r
//#define M68K_RUNNING 0x01\r
-#define M68K_HALTED 0x80\r
-#define M68K_WAITING 0x04\r
-#define M68K_DISABLE 0x20\r
-#define M68K_FAULTED 0x40\r
-#define M68K_EMULATE_GROUP_0 0x02\r
-#define M68K_EMULATE_TRACE 0x08\r
-#define M68K_DO_TRACE 0x10\r
+#define FM68K_HALTED 0x80\r
+//#define M68K_WAITING 0x04\r
+//#define M68K_DISABLE 0x20\r
+//#define M68K_FAULTED 0x40\r
+#define FM68K_EMULATE_GROUP_0 0x02\r
+#define FM68K_EMULATE_TRACE 0x08\r
+#define FM68K_DO_TRACE 0x10\r
\r
\r
/************************************/\r
/* Data definition */\r
/*******************/\r
\r
-/* M68K registers */\r
-typedef enum {\r
- M68K_REG_D0=0,\r
- M68K_REG_D1,\r
- M68K_REG_D2,\r
- M68K_REG_D3,\r
- M68K_REG_D4,\r
- M68K_REG_D5,\r
- M68K_REG_D6,\r
- M68K_REG_D7,\r
- M68K_REG_A0,\r
- M68K_REG_A1,\r
- M68K_REG_A2,\r
- M68K_REG_A3,\r
- M68K_REG_A4,\r
- M68K_REG_A5,\r
- M68K_REG_A6,\r
- M68K_REG_A7,\r
- M68K_REG_ASP,\r
- M68K_REG_PC,\r
- M68K_REG_SR\r
-} m68k_register;\r
-\r
typedef union\r
{\r
unsigned char B;\r
/************************/\r
\r
/* General purpose functions */\r
-void m68k_init(void);\r
-int m68k_reset(void);\r
-int m68k_emulate(int n);\r
+void fm68k_init(void);\r
+int fm68k_reset(void);\r
+int fm68k_emulate(int n);\r
+int fm68k_would_interrupt(void); // to be called from fm68k_emulate()\r
\r
-unsigned m68k_get_pc(M68K_CONTEXT *context);\r
-unsigned m68k_get_register(M68K_CONTEXT *context, m68k_register reg);\r
-unsigned m68k_set_register(M68K_CONTEXT *context, m68k_register reg, unsigned value);\r
+unsigned fm68k_get_pc(M68K_CONTEXT *context);\r
\r
\r
#ifdef __cplusplus\r
if ((_PC_)&1) \\r
{ \\r
u32 pr_PC=GET_PC; \\r
- m68kcontext.execinfo |= M68K_EMULATE_GROUP_0; \\r
+ m68kcontext.execinfo |= FM68K_EMULATE_GROUP_0; \\r
execute_exception_group_0(M68K_ADDRESS_ERROR_EX, 0, pr_PC, 0x12 ); \\r
CHECK_BRANCH_EXCEPTION_GOTO_END \\r
}\r
/* Debe ser llamado para inicializar la tabla de saltos de instruccion */\r
/* No recibe parametros y no devuelve nada */\r
/***************************************************************************/\r
-void m68k_init(void)\r
+void fm68k_init(void)\r
{\r
#ifdef FAMEC_DEBUG\r
puts("Initializing FAME...");\r
#endif\r
\r
if (!initialised)\r
- m68k_emulate(0);\r
+ fm68k_emulate(0);\r
\r
#ifdef FAMEC_DEBUG\r
puts("FAME initialized.");\r
/* M68K_NO_SUP_ADDR_SPACE (2): No se puede resetear porque no hay mapa */\r
/* de memoria supervisor de extraccion de opcodes */\r
/******************************************************************************/\r
-int m68k_reset(void)\r
+int fm68k_reset(void)\r
{\r
if (!initialised)\r
- m68k_emulate(0);\r
+ fm68k_emulate(0);\r
\r
// Si la CPU esta en ejecucion, salir con M68K_RUNNING\r
if (m68kcontext.execinfo & M68K_RUNNING)\r
return M68K_RUNNING;\r
\r
// Resetear registros\r
- memset(&m68kcontext.dreg[0], 0, 16*4);\r
+ //memset(&m68kcontext.dreg[0], 0, 16*4);\r
\r
// Resetear interrupts, execinfo y ASP\r
m68kcontext.interrupts[0] = 0;\r
ASP = 0;\r
\r
// Fijar registro de estado\r
- m68kcontext.sr = 0x2700;\r
+ m68kcontext.sr = (m68kcontext.sr & 0xff) | 0x2700;\r
\r
// Obtener puntero de pila inicial y PC\r
AREG(7) = m68kcontext.read_long(0);\r
/* No recibe parametros */\r
/* Retorna 68k PC */\r
/****************************************************************************/\r
-u32 m68k_get_pc(M68K_CONTEXT *context)\r
+u32 fm68k_get_pc(M68K_CONTEXT *context)\r
{\r
return (context->execinfo & M68K_RUNNING)?(u32)PC-BasePC:context->pc;\r
}\r
\r
\r
-/***************************************************************************/\r
-/* m68k_get_register(register) */\r
-/* Parametro: Registro a obtener valor (indice) */\r
-/* Retorno: Valor del registro requerido */\r
-/* Observacion: En caso de que el indice no sea correcto */\r
-/* la funcion devolvera -1 */\r
-/***************************************************************************/\r
-u32 m68k_get_register(M68K_CONTEXT *context, m68k_register reg)\r
-{\r
- M68K_CONTEXT *oldcontext = g_m68kcontext;\r
- s32 ret;\r
-\r
- g_m68kcontext = context;\r
-\r
- switch (reg)\r
- {\r
- case M68K_REG_D0:\r
- case M68K_REG_D1:\r
- case M68K_REG_D2:\r
- case M68K_REG_D3:\r
- case M68K_REG_D4:\r
- case M68K_REG_D5:\r
- case M68K_REG_D6:\r
- case M68K_REG_D7:\r
- ret = DREG(reg - M68K_REG_D0);\r
- break;\r
-\r
- case M68K_REG_A0:\r
- case M68K_REG_A1:\r
- case M68K_REG_A2:\r
- case M68K_REG_A3:\r
- case M68K_REG_A4:\r
- case M68K_REG_A5:\r
- case M68K_REG_A6:\r
- case M68K_REG_A7:\r
- ret = AREG(reg - M68K_REG_A0);\r
- break;\r
-\r
- case M68K_REG_ASP:\r
- ret = ASP;\r
- break;\r
-\r
- case M68K_REG_PC:\r
- ret = m68k_get_pc(context);\r
- break;\r
-\r
- case M68K_REG_SR:\r
- ret = m68kcontext.sr;\r
- break;\r
-\r
- default:\r
- ret = M68K_INV_REG;\r
- break;\r
- }\r
-\r
- g_m68kcontext = oldcontext;\r
- return ret;\r
-}\r
-\r
-/***********************************************************************/\r
-/* m68k_set_register(register,value) */\r
-/* Parametros: Registro (indice) y valor a asignar */\r
-/* Retorno: Exito de la operacion */\r
-/* 0 La operacion se ha realizado satisfactoriamente */\r
-/* 1 El indice del registro no es valido (fuera de limites) */\r
-/***********************************************************************/\r
-u32 m68k_set_register(M68K_CONTEXT *context, m68k_register reg, u32 value)\r
-{\r
- M68K_CONTEXT *oldcontext = g_m68kcontext;\r
- s32 ret = M68K_OK;\r
-\r
- g_m68kcontext = context;\r
-\r
- switch (reg)\r
- {\r
- case M68K_REG_D0:\r
- case M68K_REG_D1:\r
- case M68K_REG_D2:\r
- case M68K_REG_D3:\r
- case M68K_REG_D4:\r
- case M68K_REG_D5:\r
- case M68K_REG_D6:\r
- case M68K_REG_D7:\r
- DREG(reg - M68K_REG_D0) = value;\r
- break;\r
-\r
- case M68K_REG_A0:\r
- case M68K_REG_A1:\r
- case M68K_REG_A2:\r
- case M68K_REG_A3:\r
- case M68K_REG_A4:\r
- case M68K_REG_A5:\r
- case M68K_REG_A6:\r
- case M68K_REG_A7:\r
- AREG(reg - M68K_REG_A0) = value;\r
- break;\r
-\r
- case M68K_REG_ASP:\r
- ASP = value;\r
- break;\r
-\r
- case M68K_REG_PC:\r
- if (m68kcontext.execinfo & M68K_RUNNING)\r
- {\r
- SET_PC(value & M68K_ADR_MASK);\r
- }\r
- else\r
- {\r
- m68kcontext.pc = value;\r
- }\r
- break;\r
-\r
- case M68K_REG_SR:\r
- m68kcontext.sr = value & 0xFFFF;\r
- break;\r
-\r
- default:\r
- ret = M68K_INV_REG;\r
- break;\r
- }\r
-\r
- g_m68kcontext = oldcontext;\r
- return ret;\r
-}\r
-\r
-\r
//////////////////////////\r
// Chequea las interrupciones y las inicia\r
static FAMEC_EXTRA_INLINE s32 interrupt_chk__(void)\r
return 0;\r
}\r
\r
+int fm68k_would_interrupt(void)\r
+{\r
+ return interrupt_chk__();\r
+}\r
\r
static FAMEC_EXTRA_INLINE void execute_exception(s32 vect)\r
{\r
/* adjust SR */\r
flag_S = M68K_SR_S;\r
\r
- newPC&=M68K_ADR_MASK;\r
+ newPC&=M68K_ADR_MASK&~1; // don't crash on games with bad vector tables\r
\r
SET_PC(newPC)\r
\r
// main exec function\r
//////////////////////\r
\r
-int m68k_emulate(s32 cycles)\r
+int fm68k_emulate(s32 cycles)\r
{\r
if (!initialised)\r
{\r
#endif\r
}\r
\r
- /* Comprobar si la CPU esta detenida debido a un doble error de bus */\r
- if (m68kcontext.execinfo & M68K_FAULTED) return -1;\r
+ // won't emulate double fault\r
+ // if (m68kcontext.execinfo & M68K_FAULTED) return -1;\r
\r
- if (m68kcontext.execinfo & M68K_HALTED)\r
+ if (m68kcontext.execinfo & FM68K_HALTED)\r
{\r
if (interrupt_chk__() <= 0)\r
{\r
return cycles;\r
}\r
- m68kcontext.execinfo &= ~M68K_HALTED;\r
+ m68kcontext.execinfo &= ~FM68K_HALTED;\r
}\r
\r
#ifdef FAMEC_DEBUG\r
cycles_needed = 0;\r
\r
#ifdef FAMEC_EMULATE_TRACE\r
- if (!(m68kcontext.execinfo & M68K_EMULATE_TRACE))\r
+ if (!(m68kcontext.execinfo & FM68K_EMULATE_TRACE))\r
#endif\r
{\r
s32 line=interrupt_chk__();\r
\r
execute_exception(line + 0x18);\r
flag_I = (u32)line;\r
+ if (m68kcontext.io_cycle_counter <= 0) goto famec_End;\r
}\r
#ifdef FAMEC_EMULATE_TRACE\r
else\r
if (flag_T)\r
{\r
- m68kcontext.execinfo |= M68K_EMULATE_TRACE;\r
+ m68kcontext.execinfo |= FM68K_EMULATE_TRACE;\r
cycles_needed= m68kcontext.io_cycle_counter;\r
m68kcontext.io_cycle_counter=0;\r
}\r
}\r
\r
\r
-#ifndef FAMEC_NO_GOTOS\r
+//#ifndef FAMEC_NO_GOTOS\r
famec_Exec:\r
-#endif\r
+//#endif\r
\r
#ifdef FAMEC_DEBUG\r
printf("Antes de NEXT... PC = %p\n", PC);\r
#endif\r
\r
#ifdef FAMEC_EMULATE_TRACE\r
- if (m68kcontext.execinfo & M68K_EMULATE_TRACE)\r
+ if (m68kcontext.execinfo & FM68K_EMULATE_TRACE)\r
{\r
m68kcontext.io_cycle_counter= cycles_needed;\r
- m68kcontext.execinfo &= ~M68K_EMULATE_TRACE;\r
- m68kcontext.execinfo |= M68K_DO_TRACE;\r
+ m68kcontext.execinfo &= ~FM68K_EMULATE_TRACE;\r
+ m68kcontext.execinfo |= FM68K_DO_TRACE;\r
execute_exception(M68K_TRACE_EX);\r
flag_T=0;\r
if (m68kcontext.io_cycle_counter > 0)\r
}\r
else\r
#endif\r
- if (cycles_needed>0)\r
+ if (cycles_needed != 0)\r
{\r
s32 line=interrupt_chk__();\r
m68kcontext.io_cycle_counter= cycles_needed;\r
#endif\r
if (m68kcontext.io_cycle_counter > 0)\r
{\r
- NEXT\r
+ //NEXT\r
+ goto famec_Exec;\r
}\r
}\r
\r
+famec_End:\r
m68kcontext.sr = GET_SR;\r
m68kcontext.pc = GET_PC;\r
\r
#endif\r
u32 i, j;\r
\r
+ m68kcontext.sr = 0x2704; // Z flag\r
+\r
for(i = 0x0000; i <= 0xFFFF; i += 0x0001)\r
JumpTable[0x0000 + i] = CAST_OP(0x4AFC);\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
JumpTable[0x1EC0 + i] = CAST_OP(0x1EC0);\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
JumpTable[0x1F00 + i] = CAST_OP(0x1F00);\r
+#if 0\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
for(j = 0x0000; j <= 0x0E00; j += 0x0200)\r
JumpTable[0x1008 + i + j] = CAST_OP(0x1008);\r
JumpTable[0x1EC8 + i] = CAST_OP(0x1EC8);\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
JumpTable[0x1F08 + i] = CAST_OP(0x1F08);\r
+#endif\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
for(j = 0x0000; j <= 0x0E00; j += 0x0200)\r
JumpTable[0x1010 + i + j] = CAST_OP(0x1010);\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
for(j = 0x0000; j <= 0x0E00; j += 0x0200)\r
JumpTable[0x9000 + i + j] = CAST_OP(0x9000);\r
+#if 0\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
for(j = 0x0000; j <= 0x0E00; j += 0x0200)\r
JumpTable[0x9008 + i + j] = CAST_OP(0x9008);\r
+#endif\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
for(j = 0x0000; j <= 0x0E00; j += 0x0200)\r
JumpTable[0x9010 + i + j] = CAST_OP(0x9010);\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
for(j = 0x0000; j <= 0x0E00; j += 0x0200)\r
JumpTable[0xB000 + i + j] = CAST_OP(0xB000);\r
+#if 0\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
for(j = 0x0000; j <= 0x0E00; j += 0x0200)\r
JumpTable[0xB008 + i + j] = CAST_OP(0xB008);\r
+#endif\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
for(j = 0x0000; j <= 0x0E00; j += 0x0200)\r
JumpTable[0xB010 + i + j] = CAST_OP(0xB010);\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
for(j = 0x0000; j <= 0x0E00; j += 0x0200)\r
JumpTable[0xD000 + i + j] = CAST_OP(0xD000);\r
+#if 0\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
for(j = 0x0000; j <= 0x0E00; j += 0x0200)\r
JumpTable[0xD008 + i + j] = CAST_OP(0xD008);\r
+#endif\r
for(i = 0x0000; i <= 0x0007; i += 0x0001)\r
for(j = 0x0000; j <= 0x0E00; j += 0x0200)\r
JumpTable[0xD010 + i + j] = CAST_OP(0xD010);\r
u32 newPC = (u32)(PC) - BasePC;
SET_PC(newPC-2);
execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
- RET(4)
+ RET(0)
}
RET(20)
}
READ_BYTE_F(adr + 2, src)
DREGu16((Opcode >> 9) & 7) = (res << 8) | src;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(24)
+#endif
}
// MOVEPLaD
READ_BYTE_F(adr, src)
DREG((Opcode >> 9) & 7) = res | src;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(24)
+#else
RET(32)
+#endif
}
// MOVEPWDa
WRITE_BYTE_F(adr + 0, res >> 8)
WRITE_BYTE_F(adr + 2, res >> 0)
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(24)
+#endif
}
// MOVEPLDa
adr += 2;
WRITE_BYTE_F(adr, res >> 0)
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(24)
+#else
RET(32)
+#endif
}
// MOVEB
RET(8)
}
+#if 0
// MOVEB
OPCODE(0x1008)
{
*/
RET(8)
}
+#endif
// MOVEB
OPCODE(0x1010)
adr = AREG(7) - 4;
AREG(7) = adr;
PRE_IO
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(12)
}
adr = AREG(7) - 4;
AREG(7) = adr;
PRE_IO
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(12)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(20)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(20)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(22)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(24)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(26)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(24)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(28)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(24)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(26)
}
adr = AREG(7) - 4;
AREG(7) = adr;
PRE_IO
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(20)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(20)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(22)
}
u32 oldPC=GET_PC;
SET_PC(oldPC-2)
execute_exception(M68K_ILLEGAL_INSTRUCTION_EX);
-RET(4)
+RET(0)
}
// ILLEGAL A000-AFFF
u32 oldPC=GET_PC;
SET_PC(oldPC-2)
execute_exception(M68K_1010_EX);
-RET(4)
+RET(0)
}
// ILLEGAL F000-FFFF
u32 oldPC=GET_PC;
SET_PC(oldPC-2)
execute_exception(M68K_1111_EX);
-RET(4)
+RET(0) // 4 already taken by exc. handler
}
// MOVEMaR
AREG(7) = ASP;
ASP = res;
}
- m68kcontext.execinfo |= M68K_HALTED;
+ m68kcontext.execinfo |= FM68K_HALTED;
m68kcontext.io_cycle_counter = 0;
RET(4)
}
ASP = res;
}
POST_IO
- m68kcontext.execinfo &= ~(M68K_EMULATE_GROUP_0|M68K_EMULATE_TRACE|M68K_DO_TRACE);
+ m68kcontext.execinfo &= ~(FM68K_EMULATE_GROUP_0|FM68K_EMULATE_TRACE|FM68K_DO_TRACE);
CHECK_INT_TO_JUMP(20)
RET(20)
}
dst = AREGu32((Opcode >> 0) & 7);
res = dst + src;
AREG((Opcode >> 0) & 7) = res;
-#ifdef USE_CYCLONE_TIMING_ // breaks Project-X
+#ifdef USE_CYCLONE_TIMING
RET(4)
#else
RET(8)
}
// SUBaD
+#if 0
OPCODE(0x9008)
{
u32 adr, res;
*/
RET(4)
}
+#endif
// SUBaD
OPCODE(0x9010)
}
// CMP
+#if 0
OPCODE(0xB008)
{
u32 adr, res;
*/
RET(4)
}
+#endif
// CMP
OPCODE(0xB010)
}
// ADDaD
+#if 0
OPCODE(0xD008)
{
u32 adr, res;
*/
RET(4)
}
+#endif
// ADDaD
OPCODE(0xD010)
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
RET(10)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
RET(10)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(14)
+#else
RET(12)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(14)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
RET(16)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(14)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(20)
+#else
RET(18)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(14)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
RET(16)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
RET(10)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(14)
+#else
RET(12)
+#endif
}
// ADDA
# settings
#use_musashi = 1
+use_fame = 1
#use_mz80 = 1
# profile = 1
ifeq "$(use_musashi)" "1"
DEFINC += -DEMU_M68K
OBJS += ../../cpu/musashi/m68kops.o ../../cpu/musashi/m68kcpu.o
-else
+endif
+ifeq "$(use_fame)" "1"
DEFINC += -DEMU_F68K
OBJS += ../../cpu/fame/famec.o
endif
# z80
ifeq "$(use_mz80)" "1"
-CFLAGS += -D_USE_MZ80
+DEFINC += -D_USE_MZ80
OBJS += ../../cpu/mz80/mz80.o
else
-CFLAGS += -D_USE_CZ80
+DEFINC += -D_USE_CZ80
OBJS += ../../cpu/cz80/cz80.o
endif
-
-# faked asm
-#DEFINC += -D_ASM_DRAW_C
-#OBJS += fakedasm.o
+# misc
+ifeq "$(use_fame)" "1"
+ifeq "$(use_musashi)" "1"
+OBJS += ../../Pico/Debug.o
+OBJS += ../../cpu/musashi/m68kdasm.o
+endif
+endif
all: PicoDrive
@make -C ../common/helix/ X86=1 clean
PicoDrive : $(OBJS) ../common/helix/helix_mp3_x86.a
- @echo $@
- @$(GCC) $(COPT) $^ $(LDFLAGS) -lm -lpng -Wl,-Map=PicoDrive.map -o $@
+ @echo ">>>" $@
+ $(GCC) $(COPT) $^ $(LDFLAGS) -lm -lpng -Wl,-Map=PicoDrive.map -o $@
../../cpu/musashi/m68kops.c :
@make -C ../common/helix/ X86=1 clean all
.c.o:
- @echo $<
- @$(GCC) $(COPT) $(DEFINC) -c $< -o $@
+ @echo ">>>" $<
+ $(GCC) $(COPT) $(DEFINC) -c $< -o $@
.s.o:
- @echo $<
- @$(GCC) $(COPT) $(DEFINC) -c $< -o $@
+ @echo ">>>" $<
+ $(GCC) $(COPT) $(DEFINC) -c $< -o $@
../../Pico/sound/ym2612.o : ../../Pico/sound/ym2612.c
- @echo $@
- @$(GCC) $(COPT_COMMON) $(DEFINC) -c $< -o $@ # -mtune=arm940t -DEXTERNAL_YM2612
+ @echo ">>>" $@
+ $(GCC) $(COPT_COMMON) $(DEFINC) -c $< -o $@
+
+../../cpu/fame/famec.o : ../../cpu/fame/famec.c ../../cpu/fame/famec_opcodes.h
+ @echo ">>>" $<
+ $(GCC) $(COPT) $(DEFINC) -Wno-unused -c $< -o $@
-../../cpu/fame/famec.o : ../../cpu/fame/famec.c
- @echo $<
- @$(GCC) $(COPT) $(DEFINC) -Wno-unused -c $< -o $@