if (type==3) ot(" orr r1,r0,r11 ;@ Set bit\n");\r
ot("\n");\r
EaWrite(8, 1,tea,size,0x003f,0,0);\r
+#if CYCLONE_FOR_GENESIS && !MEMHANDLERS_CHANGE_CYCLES\r
+ // this is a bit hacky (device handlers might modify cycles)\r
+ if (tea==0x38||tea==0x39)\r
+ ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
+#endif\r
}\r
\r
OpEnd(sea,tea);\r
}\r
\r
#if CYCLONE_FOR_GENESIS && !MEMHANDLERS_CHANGE_CYCLES\r
- // this is a bit hacky\r
- if ((tea==0x39||(tea>=0x10&&tea<0x30))&&size>=1)\r
+ // this is a bit hacky (device handlers might modify cycles)\r
+ if (tea==0x39||((0x10<=tea&&tea<0x30)&&size>=1))\r
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
#endif\r
\r
wram_1M_to_2M(Pico_mcd->word_ram2M);\r
PicoMemResetCD(d);\r
}\r
- else\r
- d |= dold&1;\r
// s68k can only set RET, writing 0 has no effect\r
- if (d&1) d &= ~2; // return word RAM to m68k in 2M mode\r
+ else if ((dold ^ d) & d & 1) { // RET being set\r
+ SekEndRunS68k(20+16+10+12+16); // see DMNA case\r
+ } else\r
+ d |= dold & 1;\r
+ if (d & 1)\r
+ d &= ~2; // DMNA clears\r
}\r
break;\r
}\r
#define SekCyclesLeftS68k \\r
((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles)\r
#define SekEndTimeslice(after) PicoCpuCM68k.cycles=after\r
+#define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after\r
#define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)\r
#define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)\r
#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }\r
#define SekCyclesLeftS68k \\r
((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter)\r
#define SekEndTimeslice(after) PicoCpuFM68k.io_cycle_counter=after\r
+#define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after\r
#define SekPc fm68k_get_pc(&PicoCpuFM68k)\r
#define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)\r
#define SekSetStop(x) { \\r
#define SekCyclesLeftS68k \\r
((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles)\r
#define SekEndTimeslice(after) SET_CYCLES(after)\r
+#define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after\r
#define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)\r
#define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)\r
#define SekSetStop(x) { \\r
SekEndTimeslice(after); \\r
}\r
\r
+#define SekEndRunS68k(after) { \\r
+ SekCycleCntS68k -= SekCyclesLeftS68k - (after); \\r
+ if (SekCycleCntS68k < 0) SekCycleCntS68k = 0; \\r
+ SekEndTimesliceS68k(after); \\r
+}\r
+\r
extern int SekCycleCntS68k;\r
extern int SekCycleAimS68k;\r
\r