cd sync improvements, part2

diff --git a/pico/cd/memory.c b/pico/cd/memory.c
index 743568e..82e6d6d 100644 (file)
--- a/pico/cd/memory.c
+++ b/pico/cd/memory.c
@@ -65,32 +65,23 @@ void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);
 void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r
 #endif\r
 \r
-static void remap_prg_window(void);\r
+static void remap_prg_window(int r3);\r
 static void remap_word_ram(int r3);\r
 \r
 // poller detection\r
 #define POLL_LIMIT 16\r
 #define POLL_CYCLES 124\r
-unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
 \r
-void m68k_comm_check(u32 a)\r
+u32 m68k_comm_check(u32 a, u32 d)\r
 {\r
-  pcd_sync_s68k(SekCyclesDone());\r
-  /*if (Pico_mcd->m.m68k_comm_dirty & (1 << a/2)) {\r
-    Pico_mcd->m.m68k_comm_dirty &= ~(1 << a/2);\r
-    Pico_mcd->m.m68k_poll_a = Pico_mcd->m.m68k_poll_cnt = 0;\r
-    return;\r
-  }\r
+  pcd_sync_s68k(SekCyclesDone(), 0);\r
   if (a != Pico_mcd->m.m68k_poll_a) {\r
     Pico_mcd->m.m68k_poll_a = a;\r
     Pico_mcd->m.m68k_poll_cnt = 0;\r
-    return;\r
+    return d;\r
   }\r
-  if (++Pico_mcd->m.m68k_poll_cnt > 5)\r
-    SekCyclesBurnRun(122);\r
-\r
-  elprintf(EL_CDPOLL, "m68k poll [%02x] %d %u", a,\r
-    Pico_mcd->m.m68k_poll_cnt, SekCyclesDone());*/\r
+  Pico_mcd->m.m68k_poll_cnt++;\r
+  return d;\r
 }\r
 \r
 #ifndef _ASM_CD_MEMORY_C\r
@@ -104,10 +95,9 @@ static u32 m68k_reg_read16(u32 a)
       d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
       goto end;\r
     case 2:\r
-      m68k_comm_check(a);\r
       d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
       elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
-      goto end;\r
+      goto end_comm;\r
     case 4:\r
       d = Pico_mcd->s68k_regs[4]<<8;\r
       goto end;\r
@@ -131,16 +121,17 @@ static u32 m68k_reg_read16(u32 a)
 \r
   if (a < 0x30) {\r
     // comm flag/cmd/status (0xE-0x2F)\r
-    m68k_comm_check(a);\r
     d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
-    goto end;\r
+    goto end_comm;\r
   }\r
 \r
   elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
 \r
 end:\r
-\r
   return d;\r
+\r
+end_comm:\r
+  return m68k_comm_check(a, d);\r
 }\r
 #endif\r
 \r
@@ -152,19 +143,24 @@ void m68k_reg_write8(u32 a, u32 d)
   u32 dold;\r
   a &= 0x3f;\r
 \r
-  Pico_mcd->m.m68k_poll_a = 0;\r
+  Pico_mcd->m.m68k_poll_a =\r
+  Pico_mcd->m.m68k_poll_cnt = 0;\r
 \r
   switch (a) {\r
     case 0:\r
       d &= 1;\r
-      if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r
+      if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {\r
+        elprintf(EL_INTS, "m68k: s68k irq 2");\r
+        pcd_sync_s68k(SekCyclesDone(), 0);\r
+        SekInterruptS68k(2);\r
+      }\r
       return;\r
     case 1:\r
       d &= 3;\r
           elprintf(EL_CDREGS, "d m.busreq %u %u", d, Pico_mcd->m.busreq);\r
       if (d == Pico_mcd->m.busreq)\r
         return;\r
-      pcd_sync_s68k(SekCyclesDone());\r
+      pcd_sync_s68k(SekCyclesDone(), 0);\r
 \r
       if ((Pico_mcd->m.busreq ^ d) & 1) {\r
         elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r
@@ -177,7 +173,7 @@ void m68k_reg_write8(u32 a, u32 d)
       }\r
       if ((Pico_mcd->m.busreq ^ d) & 2) {\r
         elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r
-        remap_prg_window();\r
+        remap_prg_window(Pico_mcd->s68k_regs[3]);\r
       }\r
       Pico_mcd->m.busreq = d;\r
       return;\r
@@ -194,24 +190,19 @@ void m68k_reg_write8(u32 a, u32 d)
       if (dold & 4) {   // 1M mode\r
         d ^= 2;         // writing 0 to DMNA actually sets it, 1 does nothing\r
       } else {\r
-       if ((d ^ dold) & d & 2) { // DMNA is being set\r
+        if ((d ^ dold) & d & 2) { // DMNA is being set\r
           dold &= ~1;   // return word RAM to s68k\r
           /* Silpheed hack: bset(w3), r3, btst, bne, r3 */\r
           SekEndRun(20+16+10+12+16);\r
         }\r
       }\r
-      Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f);\r
+      d = (d & 0xc2) | (dold & 0x1f);\r
       if ((d ^ dold) & 0xc0) {\r
-        elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
-        remap_prg_window();\r
-      }\r
-#ifdef USE_POLL_DETECT\r
-      if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
-        SekSetStopS68k(0); s68k_poll_adclk = 0;\r
-        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
+        elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",\r
+          (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
+        remap_prg_window(d);\r
       }\r
-#endif\r
-      return;\r
+      goto write_comm;\r
     case 6:\r
       Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
       return;\r
@@ -220,34 +211,30 @@ void m68k_reg_write8(u32 a, u32 d)
       elprintf(EL_CDREGS, "hint vector set to %04x%04x",\r
         ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r
       return;\r
-    case 0xf:\r
+    case 0x0f:\r
       d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
-    case 0xe:\r
-      if (d != Pico_mcd->s68k_regs[0xe]) {\r
-        pcd_sync_s68k(SekCyclesDone());\r
-        Pico_mcd->s68k_regs[0xe] = d;\r
-      }\r
-#ifdef USE_POLL_DETECT\r
-      if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
-        SekSetStopS68k(0); s68k_poll_adclk = 0;\r
-        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
-      }\r
-#endif\r
-      return;\r
+      a = 0x0e;\r
+    case 0x0e:\r
+      goto write_comm;\r
   }\r
 \r
-  if ((a&0xf0) == 0x10) {\r
-      Pico_mcd->s68k_regs[a] = d;\r
-#ifdef USE_POLL_DETECT\r
-      if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
-        SekSetStopS68k(0); s68k_poll_adclk = 0;\r
-        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
-      }\r
-#endif\r
-      return;\r
-  }\r
+  if ((a&0xf0) == 0x10)\r
+    goto write_comm;\r
 \r
   elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
+  return;\r
+\r
+write_comm:\r
+  if (d == Pico_mcd->s68k_regs[a])\r
+    return;\r
+\r
+  Pico_mcd->s68k_regs[a] = d;\r
+  pcd_sync_s68k(SekCyclesDone(), 0);\r
+  if (Pico_mcd->m.s68k_poll_a == a && Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r
+    SekSetStopS68k(0);\r
+    Pico_mcd->m.s68k_poll_a = 0;\r
+    elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
+  }\r
 }\r
 \r
 #ifndef _ASM_CD_MEMORY_C\r
@@ -256,24 +243,26 @@ static
 u32 s68k_poll_detect(u32 a, u32 d)\r
 {\r
 #ifdef USE_POLL_DETECT\r
-  // needed mostly for Cyclone, which doesn't always check it's cycle counter\r
-  if (SekIsStoppedS68k()) return d;\r
-  // polling detection\r
-  if (a == (s68k_poll_adclk&0xff)) {\r
-    unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
+  u32 cycles, cnt = 0;\r
+  if (SekIsStoppedS68k())\r
+    return d;\r
+\r
+  cycles = SekCyclesDoneS68k();\r
+  if (a == Pico_mcd->m.s68k_poll_a) {\r
+    u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;\r
     if (clkdiff <= POLL_CYCLES) {\r
-      s68k_poll_cnt++;\r
-      //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
-      if (s68k_poll_cnt > POLL_LIMIT) {\r
+      cnt = Pico_mcd->m.s68k_poll_cnt + 1;\r
+      //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);\r
+      if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r
         SekSetStopS68k(1);\r
-        elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r
+        elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x",\r
+          SekPcS68k, a);\r
       }\r
-      s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
-      return d;\r
     }\r
   }\r
-  s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
-  s68k_poll_cnt = 0;\r
+  Pico_mcd->m.s68k_poll_a = a;\r
+  Pico_mcd->m.s68k_poll_clk = cycles;\r
+  Pico_mcd->m.s68k_poll_cnt = cnt;\r
 #endif\r
   return d;\r
 }\r
@@ -384,7 +373,7 @@ void s68k_reg_write8(u32 a, u32 d)
         if (d & 1)\r
           d &= ~2;                       // DMNA clears\r
       }\r
-      break;\r
+      goto write_comm;\r
     }\r
     case 4:\r
       elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);\r
@@ -405,9 +394,12 @@ void s68k_reg_write8(u32 a, u32 d)
       // does this also reset internal 384 cycle counter?\r
       Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r
       return;\r
-    case 0xe:\r
+    case 0x0e:\r
+      d &= 0xff;\r
       d = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
-      break;\r
+      a = 0x0f;\r
+    case 0x0f:\r
+      goto write_comm;\r
     case 0x31: // 384 cycle int3 timer\r
       d &= 0xff;\r
       elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);\r
@@ -444,16 +436,23 @@ void s68k_reg_write8(u32 a, u32 d)
       return;\r
   }\r
 \r
+  if ((a&0x1f0) == 0x20)\r
+    goto write_comm;\r
+\r
   if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
   {\r
     elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
     return;\r
   }\r
 \r
-  if (a < 0x30)\r
-    Pico_mcd->m.m68k_comm_dirty |= (1 << a/2);\r
+  Pico_mcd->s68k_regs[a] = (u8) d;\r
+  return;\r
 \r
+write_comm:\r
   Pico_mcd->s68k_regs[a] = (u8) d;\r
+  if (Pico_mcd->m.m68k_poll_cnt)\r
+    SekEndRunS68k(0);\r
+  Pico_mcd->m.m68k_poll_cnt = 0;\r
 }\r
 \r
 // -----------------------------------------------------------------\r
@@ -611,20 +610,10 @@ static void PicoWriteM68k16_io(u32 a, u32 d)
 {\r
   if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r
     elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
-/* TODO FIXME?\r
-    if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
-      Pico_mcd->s68k_regs[0xe] = d >> 8;\r
-#ifdef USE_POLL_DETECT\r
-      if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
-        SekSetStopS68k(0); s68k_poll_adclk = 0;\r
-        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
-      }\r
-#endif\r
-      return;\r
-    }\r
-*/\r
+\r
     m68k_reg_write8(a,     d >> 8);\r
-    m68k_reg_write8(a + 1, d & 0xff);\r
+    if ((a & 0x3e) != 0x0e) // special case\r
+      m68k_reg_write8(a + 1, d & 0xff);\r
     return;\r
   }\r
 \r
@@ -965,11 +954,11 @@ static const void *s68k_dec_write16[2][4] = {
 \r
 // -----------------------------------------------------------------\r
 \r
-static void remap_prg_window(void)\r
+static void remap_prg_window(int r3)\r
 {\r
   // PRG RAM\r
   if (Pico_mcd->m.busreq & 2) {\r
-    void *bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];\r
+    void *bank = Pico_mcd->prg_ram_b[r3 >> 6];\r
     cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r
   }\r
   else {\r
@@ -1034,7 +1023,7 @@ void pcd_state_loaded_mem(void)
   if (r3 & 4) // 1M mode?\r
     wram_2M_to_1M(Pico_mcd->word_ram2M);\r
   remap_word_ram(r3);\r
-  remap_prg_window();\r
+  remap_prg_window(r3);\r
 \r
   // restore hint vector\r
   *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r
@@ -1144,9 +1133,6 @@ PICO_INTERNAL void PicoMemSetupCD(void)
 #ifdef EMU_M68K\r
   m68k_mem_setup_cd();\r
 #endif\r
-\r
-  // m68k_poll_addr = m68k_poll_cnt = 0;\r
-  s68k_poll_adclk = s68k_poll_cnt = 0;\r
 }\r
 \r
 \r

diff --git a/pico/cd/memory_arm.s b/pico/cd/memory_arm.s
index 598bcd7..2fc74ca 100644 (file)
--- a/pico/cd/memory_arm.s
+++ b/pico/cd/memory_arm.s
@@ -53,7 +53,6 @@
 .extern m68k_reg_write8
 .extern s68k_reg_read16
 .extern s68k_reg_write8
-.extern s68k_poll_adclk
 .extern s68k_poll_detect
 .extern gfx_cd_read
 .extern gfx_cd_write16
@@ -62,6 +61,7 @@
 .extern PicoRead16_io
 .extern PicoWrite8_io
 .extern PicoWrite16_io
+.extern m68k_comm_check
 
 
 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@@ -174,17 +174,16 @@ m_m68k_read8_r02:
     add     r1, r1, #0x110000
     ldrb    r0, [r1, #2]
     bx      lr
-m_m68k_read8_r03:
-    add     r1, r1, #0x110000
-    ldrb    r0, [r1, #3]
-    add     r1, r1, #0x002200
-    ldr     r1, [r1, #4]
-    and     r0, r0, #0xc7
-    tst     r1, #2                    @ DMNA pending?
-    bxeq    lr
-    bic     r0, r0, #1
-    orr     r0, r0, #2
-    bx      lr
+m_m68k_read8_r03:                     @ FIXME: sync with C
+    add     r2, r1, #0x110000
+    ldrb    r1, [r2, #3]
+    add     r2, r2, #0x002200
+    ldr     r2, [r2, #4]
+    and     r1, r1, #0xc7
+    tst     r2, #2                    @ DMNA pending?
+    bicne   r1, r1, #1
+    orrne   r1, r1, #2
+    b       m68k_comm_check
 m_m68k_read8_r04:
     add     r1, r1, #0x110000
     ldrb    r0, [r1, #4]
@@ -216,15 +215,12 @@ m_m68k_read8_r0d:
     mov     r0, r0, lsr #16
     bx      lr
 m_m68k_read8_hi:
-    push    {r0,r1,lr}
-    bl      m68k_comm_check
-    pop     {r0,r1,lr}
     cmp     r0, #0x30
     movge   r0, #0
     bxeq    lr
     add     r1, r1, #0x110000
-    ldrb    r0, [r1, r0]
-    bx      lr
+    ldrb    r1, [r1, r0]
+    b       m68k_comm_check
 
 
 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@@ -273,19 +269,18 @@ m_m68k_read16_r00:
     and     r0, r0, #0x04000000       @ we need irq2 mask state
     orr     r0, r1, r0, lsr #11
     bx      lr
-m_m68k_read16_r02:
-    add     r1, r1, #0x110000
-    ldrb    r0, [r1, #2]
-    ldrb    r2, [r1, #3]
-    add     r1, r1, #0x002200
-    ldr     r1, [r1, #4]
+m_m68k_read16_r02:                    @ FIXME: out of sync from C
+    add     r3, r1, #0x110000
+    ldrb    r1, [r3, #2]
+    ldrb    r2, [r3, #3]
+    add     r3, r3, #0x002200
+    ldr     r3, [r3, #4]
     and     r2, r2, #0xc7
-    orr     r0, r2, r0, lsl #8
-    tst     r1, #2                    @ DMNA pending?
-    bxeq    lr
-    bic     r0, r0, #1
-    orr     r0, r0, #2
-    bx      lr
+    orr     r1, r2, r1, lsl #8
+    tst     r3, #2                    @ DMNA pending?
+    bicne   r1, r1, #1
+    orrne   r1, r1, #2
+    b       m68k_comm_check
 m_m68k_read16_r04:
     add     r1, r1, #0x110000
     ldrb    r0, [r1, #4]
@@ -309,10 +304,10 @@ m_m68k_read16_hi:
     ldrlth  r1, [r1, r0]
     movge   r0, #0
     bxge    lr
-    mov     r0, r1, lsr #8
+    mov     r2, r1, lsr #8
     and     r1, r1, #0xff
-    orr     r0, r0, r1, lsl #8
-    bx      lr
+    orr     r1, r2, r1, lsl #8
+    b       m68k_comm_check
 
 
 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
@@ -380,22 +375,8 @@ m_m68k_write16_regs:
     b       m68k_reg_write8
 
 m_m68k_write16_regs_spec:               @ special case
-    ldr     r2, =(Pico+0x22200)
-    ldr     r3, =s68k_poll_adclk
-    mov     r0, #0x110000
-    ldr     r2, [r2]
-    add     r0, r0, #0x00000e
     mov     r1, r1, lsr #8
-    strb    r1, [r2, r0]                @ if (a == 0xe) s68k_regs[0x0e] = d >> 8;
-    ldr     r2, [r3]
-    mov     r1, #0
-    and     r2, r2, #0xfe
-    cmp     r2, #0x0e
-    bxne    lr
-    ldr     r0, =PicoCpuCS68k
-    str     r1, [r0, #0x58]             @ push s68k out of stopped state
-    str     r1, [r3]
-    bx      lr
+    b       m68k_reg_write8
 
 
 @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@

diff --git a/pico/cd/pico.c b/pico/cd/pico.c
index eabd2ea..539d157 100644 (file)
--- a/pico/cd/pico.c
+++ b/pico/cd/pico.c
@@ -219,19 +219,20 @@ static void pcd_run_events(unsigned int until)
       oldest, event_time_next);
 }
 
-void pcd_sync_s68k(unsigned int m68k_target)
+int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
 {
   #define now SekCycleCntS68k
   unsigned int s68k_target =
     (unsigned long long)m68k_target * m68k_cycle_mult >> 16;
   unsigned int target;
 
-  elprintf(EL_CD, "s68k sync to %u/%u", m68k_target, s68k_target);
+  elprintf(EL_CD, "s68k sync to %u, %u->%u",
+    m68k_target, now, s68k_target);
 
   if ((Pico_mcd->m.busreq & 3) != 1) { /* busreq/reset */
     SekCycleCntS68k = SekCycleAimS68k = s68k_target;
     pcd_run_events(m68k_target);
-    return;
+    return 0;
   }
 
   while (CYCLES_GT(s68k_target, now)) {
@@ -243,13 +244,36 @@ void pcd_sync_s68k(unsigned int m68k_target)
       target = event_time_next;
 
     SekRunS68k(target);
+    if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
+      break;
   }
+
+  return s68k_target - now;
   #undef now
 }
 
+static void SekSyncM68k(void);
+
+static void pcd_run_cpus(int m68k_cycles)
+{
+  SekCycleAim += m68k_cycles;
+  if (Pico_mcd->m.m68k_poll_cnt >= 16 && !SekShouldInterrupt()) {
+    int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
+    if (s68k_left <= 0) {
+      elprintf(EL_CDPOLL, "m68k poll [%02x] %d @%06x",
+        Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
+      SekCycleCnt = SekCycleAim;
+      return;
+    }
+    SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
+  }
+
+  SekSyncM68k();
+}
+
 #define PICO_CD
 #define CPUS_RUN(m68k_cycles) \
-  SekRunM68k(m68k_cycles)
+  pcd_run_cpus(m68k_cycles)
 
 #include "../pico_cmn.c"
 

diff --git a/pico/pico_cmn.c b/pico/pico_cmn.c
index 98dfa93..bdf48cf 100644 (file)
--- a/pico/pico_cmn.c
+++ b/pico/pico_cmn.c
@@ -22,13 +22,13 @@
   SekRunM68k(m68k_cycles)
 #endif
 
-static __inline void SekRunM68k(int cyc)
+// sync m68k to SekCycleAim
+static void SekSyncM68k(void)
 {
   int cyc_do;
   pprof_start(m68k);
   pevt_log_m68k_o(EVT_RUN_START);
 
-  SekCycleAim += cyc;
   while ((cyc_do = SekCycleAim - SekCycleCnt) > 0) {
     SekCycleCnt += cyc_do;
 
@@ -50,6 +50,12 @@ static __inline void SekRunM68k(int cyc)
   pprof_end(m68k);
 }
 
+static inline void SekRunM68k(int cyc)
+{
+  SekCycleAim += cyc;
+  SekSyncM68k();
+}
+
 static int PicoFrameHints(void)
 {
   struct PicoVideo *pv=&Pico.video;
@@ -142,7 +148,7 @@ static int PicoFrameHints(void)
       if (ym2612.dacen && PsndDacLine <= y)
         PsndDoDAC(y);
 #ifdef PICO_CD
-      pcd_sync_s68k(cycles);
+      pcd_sync_s68k(cycles, 0);
 #endif
 #ifdef PICO_32X
       p32x_sync_sh2s(cycles);
@@ -210,7 +216,7 @@ static int PicoFrameHints(void)
   }
 
 #ifdef PICO_CD
-  pcd_sync_s68k(cycles);
+  pcd_sync_s68k(cycles, 0);
 #endif
 #ifdef PICO_32X
   p32x_sync_sh2s(cycles);
@@ -262,7 +268,7 @@ static int PicoFrameHints(void)
     PsndDoDAC(lines-1);
 
 #ifdef PICO_CD
-  pcd_sync_s68k(cycles);
+  pcd_sync_s68k(cycles, 0);
 #endif
 #ifdef PICO_32X
   p32x_sync_sh2s(cycles);

diff --git a/pico/pico_int.h b/pico/pico_int.h
index c23705b..9b597d8 100644 (file)
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -49,7 +49,7 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
 #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }\r
 #define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1)\r
 #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)\r
-#define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
+#define SekShouldInterrupt() (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
 \r
 #define SekInterrupt(i) PicoCpuCM68k.irq=i\r
 #define SekIrqLevel     PicoCpuCM68k.irq\r
@@ -77,7 +77,7 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
 }\r
 #define SekIsStoppedM68k() (PicoCpuFM68k.execinfo&FM68K_HALTED)\r
 #define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)\r
-#define SekShouldInterrupt fm68k_would_interrupt()\r
+#define SekShouldInterrupt() fm68k_would_interrupt()\r
 \r
 #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq\r
 #define SekIrqLevel       PicoCpuFM68k.interrupts[0]\r
@@ -106,7 +106,7 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
 }\r
 #define SekIsStoppedM68k() (PicoCpuMM68k.stopped==STOP_LEVEL_STOP)\r
 #define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)\r
-#define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK)\r
+#define SekShouldInterrupt() (CPU_INT_LEVEL > FLAG_INT_MASK)\r
 \r
 #define SekInterrupt(irq) { \\r
        void *oldcontext = m68ki_cpu_p; \\r
@@ -389,10 +389,11 @@ struct mcd_misc
        unsigned char  s68k_pend_ints;\r
        unsigned int   state_flags;     // 04\r
        unsigned int   stopwatch_base_c;\r
-       unsigned int   m68k_comm_dirty;\r
        unsigned short m68k_poll_a;\r
        unsigned short m68k_poll_cnt;\r
-       unsigned int   pad;\r
+       unsigned short s68k_poll_a;\r
+       unsigned short s68k_poll_cnt;\r
+       unsigned int   s68k_poll_clk;\r
        unsigned char  bcram_reg;       // 18: battery-backed RAM cart register\r
        unsigned char  pad2;\r
        unsigned short pad3;\r
@@ -631,7 +632,7 @@ extern unsigned int pcd_event_times[PCD_EVENT_COUNT];
 void pcd_event_schedule(unsigned int now, enum pcd_event event, int after);\r
 void pcd_event_schedule_s68k(enum pcd_event event, int after);\r
 unsigned int pcd_cycles_m68k_to_s68k(unsigned int c);\r
-void pcd_sync_s68k(unsigned int m68k_target);\r
+int  pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync);\r
 void pcd_state_loaded(void);\r
 \r
 // pico/pico.c\r
@@ -935,9 +936,9 @@ void pevt_log(unsigned int cycles, enum evt_cpu c, enum evt e);
 void pevt_dump(void);\r
 \r
 #define pevt_log_m68k(e) \\r
-  pevt_log(SekCyclesDoneT(), EVT_M68K, e)\r
+  pevt_log(SekCyclesDone(), EVT_M68K, e)\r
 #define pevt_log_m68k_o(e) \\r
-  pevt_log(SekCyclesDoneT2(), EVT_M68K, e)\r
+  pevt_log(SekCyclesDone(), EVT_M68K, e)\r
 #define pevt_log_sh2(sh2, e) \\r
   pevt_log(sh2_cycles_done_m68k(sh2), EVT_MSH2 + (sh2)->is_slave, e)\r
 #define pevt_log_sh2_o(sh2, e) \\r

diff --git a/pico/videoport.c b/pico/videoport.c
index ec68e7f..42f55c8 100644 (file)
--- a/pico/videoport.c
+++ b/pico/videoport.c
@@ -423,7 +423,7 @@ PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d)
 update_irq:\r
 #ifndef EMU_CORE_DEBUG\r
         // update IRQ level\r
-        if (!SekShouldInterrupt) // hack\r
+        if (!SekShouldInterrupt()) // hack\r
         {\r
           int lines, pints, irq=0;\r
           lines = (pvid->reg[1] & 0x20) | (pvid->reg[0] & 0x10);\r