*(unsigned int *)(cpu+0x44)=CycloneGetSr(context);\r
*(unsigned int *)(cpu+0x48)=context->osp;\r
cpu[0x4c] = context->irq;\r
- cpu[0x4d] = context->stopped;\r
+ cpu[0x4d] = context->state_flags & 1;\r
#endif\r
\r
#ifdef EMU_M68K\r
context->membase=0;\r
context->pc = context->checkpc(*(unsigned int *)(cpu+0x40)); // Base pc\r
context->irq = cpu[0x4c];\r
- context->stopped = cpu[0x4d];\r
+ context->state_flags = 0;\r
+ if (cpu[0x4d])\r
+ context->state_flags |= 1;\r
#endif\r
\r
#ifdef EMU_M68K\r
extern unsigned int lastSSRamWrite; // used by serial SRAM code\r
\r
#ifdef _ASM_MEMORY_C\r
-u8 PicoRead8(u32 a);\r
-u16 PicoRead16(u32 a);\r
+u32 PicoRead8(u32 a);\r
+u32 PicoRead16(u32 a);\r
void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
void PicoWriteRomHW_in1 (u32 a,u32 d);\r
#endif\r
u32 ret=0;\r
#if defined(EMU_C68K)\r
pc-=PicoCpu.membase; // Get real pc\r
- pc&=0xfffffe;\r
- if (pc == 0)\r
+// pc&=0xfffffe;\r
+ pc&=~1;\r
+ if ((pc<<8) == 0)\r
return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off\r
\r
- PicoCpu.membase=PicoMemBase(pc);\r
+ PicoCpu.membase=PicoMemBase(pc&0x00ffffff);\r
+ PicoCpu.membase-=pc&0xff000000;\r
\r
ret = PicoCpu.membase+pc;\r
#elif defined(EMU_A68K)\r
// Read Rom and read Ram\r
\r
#ifndef _ASM_MEMORY_C\r
-u8 CPU_CALL PicoRead8(u32 a)\r
+u32 CPU_CALL PicoRead8(u32 a)\r
{\r
u32 d=0;\r
\r
lastread_d[lrp_cyc++&15] = (u8)d;\r
}\r
#endif\r
- return (u8)d;\r
+ return d;\r
}\r
\r
-u16 CPU_CALL PicoRead16(u32 a)\r
+u32 CPU_CALL PicoRead16(u32 a)\r
{\r
- u16 d=0;\r
+ u32 d=0;\r
\r
if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
\r
#if !(defined(EMU_C68K) && defined(EMU_M68K))\r
// sram\r
if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {\r
- d = (u16) SRAMRead(a);\r
+ d = SRAMRead(a);\r
goto end;\r
}\r
#endif\r
\r
if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
\r
- d = (u16)OtherRead16(a, 16);\r
+ d = OtherRead16(a, 16);\r
\r
end:\r
//if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)\r
#if 1
if (!d) {
// needed by buggy Terminator (Sega CD)
- extern int z80stopCycle;
int stop_before = SekCyclesDone() - z80stopCycle;
dprintf("stop before: %i", stop_before);
if (stop_before > 0 && stop_before <= 32) // Gens uses 16 here
void (*PicoWriteSound)(int len) = 0; // called once per frame at the best time to send sound buffer (PsndOut) to hardware\r
\r
struct PicoSRAM SRam;\r
-int z80startCycle = 0, z80stopCycle = 0; // in 68k cycles\r
+int z80startCycle, z80stopCycle; // in 68k cycles\r
//int z80ExtraCycles = 0;\r
int PicoPad[2]; // Joypads, format is SACB RLDU\r
int PicoMCD = 0; // mega CD status: scd_started, reset_pending\r
\r
if(!(PicoOpt&4) || Pico.m.z80Run == 0) { line_from_r = line_to_r; line_to_r = 0; }\r
\r
- if(z80startCycle != 0) {\r
+ if(z80startCycle != 0x01000000) {\r
line_from_r = vcounts[z80startCycle>>8]+1;\r
- z80startCycle = 0;\r
+ z80startCycle = 0x01000000;\r
}\r
- if(z80stopCycle != 0) {\r
+ if(z80stopCycle != 0x01000000) {\r
line_to_r = vcounts[z80stopCycle>>8]+1;\r
- z80stopCycle = 0;\r
+ z80stopCycle = 0x01000000;\r
}\r
\r
if(PicoOpt&1) {\r
// callback to output message from emu\r
void (*PicoMessage)(const char *msg)=NULL;\r
\r
-#if defined(__DEBUG_PRINT) || defined(WIN32)\r
+#if defined(__DEBUG_PRINT) || defined(__GP2X__)\r
// tmp debug: dump some stuff\r
#define bit(r, x) ((r>>x)&1)\r
void z80_debug(char *dstr);\r
-char *debugString()\r
+char *debugString(void)\r
{\r
#if 1\r
static char dstr[1024];\r
- unsigned char *reg=Pico.video.reg, r;\r
-\r
- // dump some info\r
- sprintf(dstr, "mode set 1: %02x\n", (r=reg[0]));\r
- sprintf(dstr, "%sdisplay_disable: %i, M3: %i, palette: %i, ?, hints: %i\n\n", dstr, bit(r,0), bit(r,1), bit(r,2), bit(r,4));\r
- sprintf(dstr, "%smode set 2: %02x\n", dstr, (r=reg[1]));\r
- sprintf(dstr, "%sSMS/genesis: %i, pal: %i, dma: %i, vints: %i, disp: %i, TMS9918: %i\n\n",dstr, bit(r,2), bit(r,3), bit(r,4), bit(r,5), bit(r,6), bit(r,7));\r
- sprintf(dstr, "%smode set 3: %02x\n", dstr, (r=reg[0xB]));\r
- sprintf(dstr, "%sLSCR: %i, HSCR: %i, 2cell vscroll: %i, IE2: %i\n\n", dstr, bit(r,0), bit(r,1), bit(r,2), bit(r,3));\r
- sprintf(dstr, "%smode set 4: %02x\n", dstr, (r=reg[0xC]));\r
- sprintf(dstr, "%sinterlace: %i%i; cells: %i; shadow: %i\n\n", dstr, bit(r,2), bit(r,1), (r&0x80) ? 40 : 32, bit(r,3));\r
- sprintf(dstr, "%sscroll size: w: %i; h: %i\n\n", dstr, reg[0x10]&3, (reg[0x10]&0x30)>>4);\r
- sprintf(dstr, "%sSRAM: det: %i; eeprom: %i\n", dstr, bit(Pico.m.sram_reg, 4), bit(Pico.m.sram_reg, 2));\r
- sprintf(dstr, "%sCPU state: PC: %06x cycles: %i\n", dstr, SekPc, SekCyclesDoneT());\r
+ struct PicoVideo *pv=&Pico.video;\r
+ unsigned char *reg=pv->reg, r;\r
+ char *dstrp;\r
+\r
+ dstrp = dstr;\r
+ sprintf(dstrp, "mode set 1: %02x\n", (r=reg[0])); dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "display_disable: %i, M3: %i, palette: %i, ?, hints: %i\n", bit(r,0), bit(r,1), bit(r,2), bit(r,4));\r
+ dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "mode set 2: %02x\n", (r=reg[1])); dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "SMS/gen: %i, pal: %i, dma: %i, vints: %i, disp: %i, TMS: %i\n", bit(r,2), bit(r,3), bit(r,4),\r
+ bit(r,5), bit(r,6), bit(r,7)); dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "mode set 3: %02x\n", (r=reg[0xB])); dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "LSCR: %i, HSCR: %i, 2cell vscroll: %i, IE2: %i\n", bit(r,0), bit(r,1), bit(r,2), bit(r,3)); dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "mode set 4: %02x\n", (r=reg[0xC])); dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "interlace: %i%i, cells: %i, shadow: %i\n", bit(r,2), bit(r,1), (r&0x80) ? 40 : 32, bit(r,3));\r
+ dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "scroll size: w: %i, h: %i SRAM: %i; eeprom: %i\n", reg[0x10]&3, (reg[0x10]&0x30)>>4,\r
+ bit(Pico.m.sram_reg, 4), bit(Pico.m.sram_reg, 2)); dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "pend int: v:%i, h:%i, vdp status: %04x\n", bit(pv->pending_ints,5), bit(pv->pending_ints,4), pv->status);\r
+ dstrp+=strlen(dstrp);\r
#ifdef EMU_C68K\r
- for(r=0; r < 8; r++)\r
- sprintf(dstr, "%sd%i=%08x, a%i=%08x\n", dstr, r, PicoCpu.d[r], r, PicoCpu.a[r]);\r
+ sprintf(dstrp, "M68k: PC: %06x, st_flg: %x, cycles: %u\n", SekPc, PicoCpu.state_flags, SekCyclesDoneT());\r
+ dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "d0=%08x, a0=%08x, osp=%08x, irql=%i\n", PicoCpu.d[0], PicoCpu.a[0], PicoCpu.osp, PicoCpu.irq); dstrp+=strlen(dstrp);\r
+ sprintf(dstrp, "d1=%08x, a1=%08x, sr=%04x\n", PicoCpu.d[1], PicoCpu.a[1], CycloneGetSr(&PicoCpu)); dstrp+=strlen(dstrp);\r
+ for(r=2; r < 8; r++) {\r
+ sprintf(dstrp, "d%i=%08x, a%i=%08x\n", r, PicoCpu.d[r], r, PicoCpu.a[r]); dstrp+=strlen(dstrp);\r
+ }\r
#endif\r
- z80_debug(dstr);\r
+ sprintf(dstrp, "z80Run: %i, pal: %i, frame#: %i\n", Pico.m.z80Run, Pico.m.pal, Pico.m.frame_count); dstrp+=strlen(dstrp);\r
+ z80_debug(dstrp); dstrp+=strlen(dstrp);\r
+ if (strlen(dstr) > sizeof(dstr))\r
+ printf("warning: debug buffer overflow (%i/%i)\n", strlen(dstr), sizeof(dstr));\r
\r
#else\r
struct PicoVideo *pvid=&Pico.video;\r
}\r
#define SekPc (PicoCpu.pc-PicoCpu.membase)\r
#define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)\r
-#define SekSetStop(x) { PicoCpu.stopped=x; if (x) PicoCpu.cycles=0; }\r
-#define SekSetStopS68k(x) { PicoCpuS68k.stopped=x; if (x) PicoCpuS68k.cycles=0; }\r
+#define SekSetStop(x) { PicoCpu.state_flags&=~1; if (x) { PicoCpu.state_flags|=1; PicoCpu.cycles=0; } }\r
+#define SekSetStopS68k(x) { PicoCpuS68k.state_flags&=~1; if (x) { PicoCpuS68k.state_flags|=1; PicoCpuS68k.cycles=0; } }\r
#endif\r
\r
#ifdef EMU_A68K\r
\r
#ifdef EMU_C68K\r
// interrupt acknowledgment\r
-static void SekIntAck(int level)\r
+static int SekIntAck(int level)\r
{\r
// try to emulate VDP's reaction to 68000 int ack\r
if (level == 4) Pico.video.pending_ints = 0;\r
else if(level == 6) Pico.video.pending_ints &= ~0x20;\r
PicoCpu.irq = 0;\r
+ return CYCLONE_INT_ACK_AUTOVECTOR;\r
}\r
\r
static void SekResetAck()\r
// see if we are not executing trash\r
if (pc < 0x200 || (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {\r
PicoCpu.cycles = 0;\r
- PicoCpu.stopped = 1;\r
+ PicoCpu.state_flags |= 1;\r
return 1;\r
}\r
#ifdef EMU_M68K // debugging cyclone\r
CPU_INT_LEVEL = 0;\r
return M68K_INT_ACK_AUTOVECTOR;\r
}\r
+\r
+static int SekTasCallback(void)\r
+{\r
+ return 0; // no writeback\r
+}\r
#endif\r
\r
\r
m68k_set_cpu_type(M68K_CPU_TYPE_68000);\r
m68k_init();\r
m68k_set_int_ack_callback(SekIntAckM68K);\r
+ m68k_set_tas_instr_callback(SekTasCallback);\r
m68k_pulse_reset(); // Init cpu emulator\r
m68k_set_context(oldcontext);\r
}\r
if (Pico.rom==NULL) return 1;\r
\r
#ifdef EMU_C68K\r
- PicoCpu.stopped=0;\r
+ PicoCpu.state_flags=0;\r
PicoCpu.osp=0;\r
PicoCpu.srh =0x27; // Supervisor mode\r
PicoCpu.flags=4; // Z set\r
\r
int SekInterrupt(int irq)\r
{\r
+#if defined(EMU_C68K) && defined(EMU_M68K)\r
+ {\r
+ extern unsigned int dbg_irq_level;\r
+ dbg_irq_level=irq;\r
+ return 0;\r
+ }\r
+#endif\r
#ifdef EMU_C68K\r
PicoCpu.irq=irq;\r
#endif\r
static unsigned int pppc, ops=0;\r
extern unsigned int lastread_a, lastread_d[16], lastwrite_cyc_d[16], lastwrite_mus_d[16];\r
extern int lrp_cyc, lrp_mus, lwp_cyc, lwp_mus;\r
-unsigned int old_regs[16], old_sr, ppop, have_illegal = 0;\r
+unsigned int old_regs[16], old_sr, ppop, have_illegal = 0, dbg_irq_level = 0;\r
\r
#undef dprintf\r
#define dprintf(f,...) printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__)\r
memcpy(old_regs, PicoCpu.d, 4*16);\r
old_sr = CycloneGetSr(&PicoCpu);\r
\r
- /*\r
- dprintf("---");\r
+#if 0\r
{\r
char buff[128];\r
dprintf("---");\r
m68k_disassemble(buff, pppc, M68K_CPU_TYPE_68000);\r
dprintf("PC: %06x: %04x: %s", pppc, ppop, buff);\r
+ //dprintf("A7: %08x", PicoCpu.a[7]);\r
+ }\r
+#endif\r
+\r
+ if (dbg_irq_level)\r
+ {\r
+ PicoCpu.irq=dbg_irq_level;\r
+ m68k_set_irq(dbg_irq_level);\r
+ dbg_irq_level=0;\r
}\r
- */\r
\r
PicoCpu.cycles=1;\r
CycloneRun(&PicoCpu);\r
\r
// compare PC\r
m68ki_cpu.pc&=~1;\r
- if( SekPc != (m68ki_cpu.pc&0xffffff) ) {\r
- dprintf("PC: %06x vs %06x", SekPc, m68ki_cpu.pc&0xffffff);\r
+ if( SekPc != (m68ki_cpu.pc/*&0xffffff*/) ) {\r
+ dprintf("PC: %06x vs %06x", SekPc, m68ki_cpu.pc/*&0xffffff*/);\r
err=1;\r
}\r
\r
}\r
\r
// stopped\r
- if((PicoCpu.stopped && !m68ki_cpu.stopped) || (!PicoCpu.stopped && m68ki_cpu.stopped)) {\r
- dprintf("stopped: %i vs %i", PicoCpu.stopped, m68ki_cpu.stopped);\r
+ if(((PicoCpu.state_flags&1) && !m68ki_cpu.stopped) || (!(PicoCpu.state_flags&1) && m68ki_cpu.stopped)) {\r
+ dprintf("stopped: %i vs %i", PicoCpu.state_flags&1, m68ki_cpu.stopped);\r
+ err=1;\r
+ }\r
+\r
+ // tracing\r
+ if(((PicoCpu.state_flags&2) && !m68ki_tracing) || (!(PicoCpu.state_flags&2) && m68ki_tracing)) {\r
+ dprintf("tracing: %i vs %i", PicoCpu.state_flags&2, m68ki_tracing);\r
err=1;\r
}\r
\r
if(err) dumpPCandExit();\r
\r
-/*\r
+#if 0\r
if (PicoCpu.a[7] < 0x00ff0000 || PicoCpu.a[7] >= 0x01000000)\r
{\r
PicoCpu.a[7] = m68ki_cpu.dar[15] = 0xff8000;\r
}\r
-*/\r
+#endif\r
#if 0\r
m68k_set_reg(M68K_REG_SR, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000)); // broken\r
CycloneSetSr(&PicoCpu, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000));\r
\r
//u8 PicoReadM68k8_(u32 a);\r
#ifdef _ASM_CD_MEMORY_C\r
-u8 PicoReadM68k8(u32 a);\r
+u32 PicoReadM68k8(u32 a);\r
#else\r
-static u8 PicoReadM68k8(u32 a)\r
+static u32 PicoReadM68k8(u32 a)\r
{\r
u32 d=0;\r
\r
#ifdef __debug_io\r
dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
#endif\r
- return (u8)d;\r
+ return d;\r
}\r
#endif\r
\r
\r
#ifdef _ASM_CD_MEMORY_C\r
-u16 PicoReadM68k16(u32 a);\r
+u32 PicoReadM68k16(u32 a);\r
#else\r
-static u16 PicoReadM68k16(u32 a)\r
+static u32 PicoReadM68k16(u32 a)\r
{\r
- u16 d=0;\r
+ u32 d=0;\r
\r
if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
\r
if ((a&0xffffc0)==0xa12000)\r
rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);\r
\r
- d = (u16)OtherRead16(a, 16);\r
+ d = OtherRead16(a, 16);\r
\r
if ((a&0xffffc0)==0xa12000)\r
rdprintf("ret = %04x", d);\r
// -----------------------------------------------------------------\r
\r
#ifdef _ASM_CD_MEMORY_C\r
-u8 PicoReadS68k8(u32 a);\r
+u32 PicoReadS68k8(u32 a);\r
#else\r
-static u8 PicoReadS68k8(u32 a)\r
+static u32 PicoReadS68k8(u32 a)\r
{\r
u32 d=0;\r
\r
#ifdef __debug_io2\r
dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);\r
#endif\r
- return (u8)d;\r
+ return d;\r
}\r
#endif\r
\r
\r
-//u16 PicoReadS68k16_(u32 a);\r
#ifdef _ASM_CD_MEMORY_C\r
-u16 PicoReadS68k16(u32 a);\r
+u32 PicoReadS68k16(u32 a);\r
#else\r
-static u16 PicoReadS68k16(u32 a)\r
+static u32 PicoReadS68k16(u32 a)\r
{\r
u32 d=0;\r
\r
ldr lr, =PicoCpuS68k
ldr r2, =CycloneEnd_M68k
ldr r3, =CycloneEnd_S68k
- str r2, [r7,#0x54]
- str r3, [lr,#0x54]
+ str r2, [r7,#0x98]
+ str r3, [lr,#0x98]
@ update aims
ldr r8, =SekCycleAim
ldr r7, =PicoCpu
ldr lr, =PicoCpuS68k
mov r0, #0
- str r0, [r7,#0x54] @ remove CycloneEnd handler
- str r0, [lr,#0x54]
+ str r0, [r7,#0x98] @ remove CycloneEnd handler
+ str r0, [lr,#0x98]
@ return
add sp, sp, #2*4
ldmfd sp!, {r4-r11,pc}
-
CycloneRunLocal:
;@ r0-3 = Temporary registers
ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base
cmp r0,#6 ;@ irq>6 ?
andle r1,r1,#7 ;@ Get interrupt mask
cmple r0,r1 ;@ irq<=6: Is irq<=mask ?
- ldrgt lr,[r7,#0x54] @ Interrupt will definitely use more cycles than our step,
- bgt CycloneDoInterrupt @ so make this function return directly to CycloneEnd_*
+ bgt CycloneDoInterrupt
NoIntsLocal:
- ;@ Check if our processor is in stopped state and jump to opcode handler if not
- ldr r0,[r7,#0x58]
+;@ Check if our processor is in special state
+;@ and jump to opcode handler if not
+ ldr r0,[r7,#0x58] ;@ state_flags
ldrh r8,[r4],#2 ;@ Fetch first opcode
- tst r0,r0 ;@ stopped?
+ tst r0,#0x03 ;@ special state?
andeq r9,r9,#0xf0000000
ldreq pc,[r6,r8,asl #2] ;@ Jump to opcode handler
- @ stopped
+CycloneSpecial2:
+ tst r0,#2 ;@ tracing?
+ bne CycloneDoTrace
+;@ stopped or halted
sub r4,r4,#2
- ldr r1,[r7,#0x54]
+ ldr r1,[r7,#0x98]
mov r5,#0
bx r1
#endif
#ifdef EMU_C68K
-// interrupt acknowledgment
-static void SekIntAckS68k(int level)
+// interrupt acknowledgement
+static int SekIntAckS68k(int level)
{
int level_new = new_irq_level(level);
dprintf("s68kACK %i -> %i", level, level_new);
PicoCpuS68k.irq = level_new;
+ return CYCLONE_INT_ACK_AUTOVECTOR;
}
static void SekResetAck()
if (Pico.rom==NULL) return 1;
#ifdef EMU_C68K
- PicoCpuS68k.stopped=0;
+ PicoCpuS68k.state_flags=0;
PicoCpuS68k.osp=0;
PicoCpuS68k.srh =0x27; // Supervisor mode
PicoCpuS68k.flags=4; // Z set
\r
void sound_reset()\r
{\r
- extern int z80stopCycle;\r
void *ym2612_regs;\r
\r
// also clear the internal registers+addr line\r
ym2612_regs = YM2612GetRegs();\r
memset(ym2612_regs, 0, 0x200+4);\r
- z80stopCycle = 0;\r
+ // setting these to 0 might confuse timing code,\r
+ // so better set to something like this instead\r
+ z80startCycle = z80stopCycle = 0x01000000;\r
\r
sound_rerate(0);\r
}\r
#endif\r
}\r
\r
-#if defined(__DEBUG_PRINT) || defined(WIN32)\r
+#if defined(__DEBUG_PRINT) || defined(__GP2X__)\r
void z80_debug(char *dstr)\r
{\r
#if defined(_USE_DRZ80)\r
- sprintf(dstr, "%sZ80 state: PC: %04x SP: %04x\n", dstr, drZ80.Z80PC-drZ80.Z80PC_BASE, drZ80.Z80SP-drZ80.Z80SP_BASE);\r
+ sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", drZ80.Z80PC-drZ80.Z80PC_BASE, drZ80.Z80SP-drZ80.Z80SP_BASE);\r
#endif\r
}\r
#endif\r
\r
# settings\r
#mz80 = 1\r
-debug_cyclone = 0\r
+#debug_cyclone = 1\r
asm_memory = 1\r
asm_render = 1\r
asm_ym2612 = 1\r
# build Cyclone\r
../../cpu/Cyclone/proj/Cyclone.s :\r
@echo building Cyclone...\r
- @make -C ../../cpu/Cyclone/proj\r
+ @make -C ../../cpu/Cyclone/proj CONFIG_FILE=config_pico.h\r
\r
../../cpu/musashi/m68kops.c :\r
@make -C ../../cpu/musashi\r
return ret;\r
}\r
\r
+// ------------ debug menu ------------\r
+\r
+char *debugString(void);\r
+\r
+static void draw_debug(void)\r
+{\r
+ char *p, *str = debugString();\r
+ int len, line;\r
+\r
+ gp2x_pd_clone_buffer2();\r
+\r
+ p = str;\r
+ for (line = 0; line < 24; line++)\r
+ {\r
+ while (*p && *p != '\n') p++;\r
+ len = p - str;\r
+ if (len > 55) len = 55;\r
+ gp2x_smalltext8_lim(1, line*10, str, len);\r
+ if (*p == 0) break;\r
+ p++; str = p;\r
+ }\r
+ gp2x_video_flip2();\r
+}\r
+\r
+static void debug_menu_loop(void)\r
+{\r
+ draw_debug();\r
+ wait_for_input(GP2X_B|GP2X_X);\r
+}\r
+\r
// ------------ patch/gg menu ------------\r
\r
static void draw_patchlist(int sel)\r
}\r
\r
\r
-void patches_menu_loop(void)\r
+static void patches_menu_loop(void)\r
{\r
int menu_sel = 0;\r
unsigned long inp = 0;\r
\r
static void menu_loop_root(void)\r
{\r
- int ret, menu_sel = 4, menu_sel_max = 8, menu_sel_min = 4;\r
+ static int menu_sel = 4;\r
+ int ret, menu_sel_max = 8, menu_sel_min = 4;\r
unsigned long inp = 0;\r
char curr_path[PATH_MAX], *selfname;\r
FILE *tstf;\r
getcwd(curr_path, PATH_MAX);\r
}\r
\r
- if (rom_data) menu_sel = menu_sel_min = 0;\r
+ if (rom_data) menu_sel_min = 0;\r
if (PicoPatches) menu_sel_max = 9;\r
\r
/* make sure action buttons are not pressed on entering menu */\r
for (;;)\r
{\r
draw_menu_root(menu_sel);\r
- inp = wait_for_input(GP2X_UP|GP2X_DOWN|GP2X_B|GP2X_X|GP2X_SELECT);\r
+ inp = wait_for_input(GP2X_UP|GP2X_DOWN|GP2X_B|GP2X_X|GP2X_SELECT|GP2X_L|GP2X_R);\r
if(inp & GP2X_UP ) { menu_sel--; if (menu_sel < menu_sel_min) menu_sel = menu_sel_max; }\r
if(inp & GP2X_DOWN) { menu_sel++; if (menu_sel > menu_sel_max) menu_sel = menu_sel_min; }\r
+ if((inp & (GP2X_L|GP2X_R)) == (GP2X_L|GP2X_R)) debug_menu_loop();\r
if(inp &(GP2X_SELECT|GP2X_X)){\r
if (rom_data) {\r
while (gp2x_joystick_read(1) & (GP2X_SELECT|GP2X_X)) usleep(50*1000); // wait until select is released\r
-#define VERSION "1.32"\r
+#define VERSION "1.33"\r
\r