.endm
-# make VDP word from address adr to d0
-# destroys d7
-.macro VRAM_ADDR_var adr
+.macro CRAM_ADDR reg adr
+ move.l #(((0xc000 + (\adr & 0x3fff)) << 16) + (\adr >> 14)),\reg
+.endm
+
+
+# make VDP word from address adr and store in d0
+.macro XRAM_ADDR_var adr
move.l \adr,d0
- move.l \adr,d7
- and.w #0x3fff,d0
- lsr.w #7,d7
- lsr.w #7,d7
- add.w #0x4000,d0
- lsl.l #7,d0
- lsl.l #7,d0
- lsl.l #2,d0
- or.l d7,d0
+ lsl.l #8,d0
+ lsl.l #8,d0
+ rol.l #2,d0
+ lsl.b #2,d0
+ lsr.l #2,d0
.endm
-.macro CRAM_ADDR reg adr
- move.l #(((0xc000 + (\adr & 0x3fff)) << 16) + (\adr >> 14)),\reg
+.macro VRAM_ADDR_var adr
+ XRAM_ADDR_var \adr
+ or.l #0x40000000,d0
.endm
-/* For indirect (variable) addresses */
-.macro CRAM_ADDR_var reg adr
- move.l \adr,d6
- move.l \adr,d7
- and.w #0x3fff,d6
- lsr.w #7,d7
- lsr.w #7,d7
- add.w #0xc000,d6
- lsl.l #7,d6
- lsl.l #7,d6
- lsl.l #2,d6
- or.l d7,d6
- move.l d6,\reg
+.macro CRAM_ADDR_var adr
+ XRAM_ADDR_var \adr
+ or.l #0xc0000000,d0
.endm
jsr init_gfx
/* Load color data */
- movea.l #0,a3
- movea.l #colors,a4
- moveq.l #(colors_end-colors)/2,d4
+ movea.l #0,a0
+ movea.l #colors,a1
+ moveq.l #(colors_end-colors)/2,d0
jsr load_colors
/* load patterns */
- movea.l #0,a3
- movea.l #font,a4
- move.l #128,d4
+ movea.l #0,a0
+ movea.l #font,a1
+ move.l #128,d0
jsr load_tiles
/* generate A layer map */
movea.l #0xe000,a6
move.l #28-1,d4
lmaploop0:
- movea.l a6,a3
+ movea.l a6,a0
jsr load_prepare
move.l #64/2-1,d3
-0: move.l #0x00000000,(a3)
+0: move.l #0x00000000,(a0)
dbra d3,0b
add.l #64*2,a6
dbra d4,lmaploop0
/* generate B layer map */
- movea.l #0xc000,a3
+ movea.l #0xc000,a0
jsr load_prepare
move.l #64*28/2-1,d3
-0: move.l #0x00000000,(a3)
+0: move.l #0x00000000,(a0)
dbra d3,0b
/* upload sprite data */
- movea.l #0xfc00,a3
+ movea.l #0xfc00,a0
jsr load_prepare
- movea.l #sprite_data,a0
+ movea.l #sprite_data,a1
move.l #(sprite_data_end-sprite_data)/2-1,d3
-0: move.l (a0)+,(a3)
+0: move.l (a1)+,(a0)
dbra d3,0b
jsr wait_vsync
rts
-
-#################################################
-# #
-# Load tile data from ROM #
-# #
-# Parameters: #
-# a3: VRAM base #
-# a4: pattern address #
-# d4: number of tiles to load #
-# Destroys a2,d0,d7... #
-# #
-#################################################
+# Load tile data from ROM
+# a0: VRAM base
+# a1: pattern address
+# d0: number of tiles to load
+# destroys d1
load_tiles:
- move.l #GFXCNTL,a2
- VRAM_ADDR_var a3
- move.l d0,(a2)
- lsl #3,d4
+ move.l d0,d1
+ VRAM_ADDR_var a0
+ move.l d0,(GFXCNTL).l
- move.l #GFXDATA,a3
- subq.l #1,d4
-_copy_tile_data:
- move.l (a4)+,(a3)
- dbra d4,_copy_tile_data
+ move.l #GFXDATA,a0
+ lsl.w #3,d1
+ subq.l #1,d1
+0:
+ move.l (a1)+,(a0)
+ dbra d1,0b
rts
# Prepare to write to VDP RAM @a3
-# a3: VRAM base
-# a3 set to VDP data port for convenience
-# destroys a2,d0,d7
+# sets a0 to VDP data port for convenience
+# a0: VRAM base
+# destroys d0
load_prepare:
- move.l #GFXCNTL,a2
- VRAM_ADDR_var a3
- move.l d0,(a2)
- move.l #GFXDATA,a3
-
+ VRAM_ADDR_var a0
+ move.l d0,(GFXCNTL).l
+ move.l #GFXDATA,a0
rts
-#################################################
-# #
-# Load color data from ROM #
-# #
-# Parameters: #
-# a3: CRAM base #
-# a4: color list address #
-# d4: number of colors to load #
-# #
-#################################################
+# Load color data from ROM
+# a0: CRAM base
+# a1: color list address
+# d0: number of colors to load
+# destroys d1
load_colors:
- move.l #GFXCNTL,a2
- CRAM_ADDR_var d0,a3
- move.l d0,(a2)
+ move.l d0,d1
+ CRAM_ADDR_var a0
+ move.l d0,(GFXCNTL).l
- move.l #GFXDATA,a3
- subq.w #1,d4
-_copy_color_data:
- move.w (a4)+,(a3)
- dbra d4,_copy_color_data
+ move.l #GFXDATA,a0
+ subq.w #1,d1
+0:
+ move.w (a1)+,(a0)
+ dbra d1,0b
rts
-#################################################
-##
-## print
-# a0 - string
-# d0 - x
-# d1 - y
+
+# print
+# a0 - string
+# d0 - x
+# d1 - y
+# destroys a1
print:
+ move.l a0,a1
lsl.w #6,d1
add.w d1,d0
- movea.l #0xe000,a6
lsl.w #1,d0
- add.w d0,a6
- moveq.l #0,d1
+ movea.l #0xe000,a0
+ add.w d0,a0
+ jsr load_prepare
+ moveq.l #0,d0
_print_loop:
- move.b (a0)+,d1
+ move.b (a1)+,d0
beq _print_end
- move.l a6,a3
- jsr load_prepare
- move.w d1,(a3)
- addq.l #2,a6
+ move.w d0,(a0)
jmp _print_loop
_print_end:
dc.l INT,INT,INT,INT,INT,INT,INT,INT\r
dc.l INT,INT,INT,INT,INT,INT,INT\r
.ascii "SEGA GENESIS "\r
- .ascii "notaz's Shadow / Hilight test "\r
- .ascii "NOTAZ'S SHADOW HILIGHT TEST "\r
+ .ascii "hex editor (c) notaz "\r
+ .ascii "HEX EDITOR (C) NOTAZ "\r
.ascii "GM 00000000-00"\r
.byte 0xa5,0xfb\r
.ascii "JD "\r
rte\r
\r
VBL:\r
- /* addq.l #1,vtimer */\r
- move.l #vtimer,a0\r
- addq.l #1,(a0)\r
+ addq.l #1,(vtimer).l\r
rte\r
\r
-*------------------------------------------------\r
-*\r
-* Get a random number. This routine\r
-* was found in TOS.\r
-*\r
-* Output\r
-* ------\r
-* d0 = random number\r
-*\r
-*------------------------------------------------\r
-\r
- .globl random\r
-\r
-random:\r
- move.l rand_num,%d0\r
- tst.l %d0\r
- bne .L1\r
- moveq #16,%d1\r
- lsl.l %d1,%d0\r
- or.l htimer,%d0\r
- move.l %d0,rand_num\r
-.L1:\r
- move.l #-1153374675,-(%sp)\r
- move.l rand_num,-(%sp)\r
- bsr lmul\r
- addq.w #8,%sp\r
- addq.l #1,%d0\r
- move.l %d0,rand_num\r
-\r
- lsr.l #8,%d0\r
- and.l #16777215,%d0\r
- rts\r
-\r
-\r
-*------------------------------------------------\r
-*\r
-* Copyright (c) 1988 by Sozobon, Limited. Author: Johann Ruegg\r
-*\r
-* Permission is granted to anyone to use this software for any purpose\r
-* on any computer system, and to redistribute it freely, with the\r
-* following restrictions:\r
-* 1) No charge may be made other than reasonable charges for reproduction.\r
-* 2) Modified versions must be clearly marked as such.\r
-* 3) The authors are not responsible for any harmful consequences\r
-* of using this software, even if they result from defects in it.\r
-*\r
-*------------------------------------------------\r
-\r
-ldiv:\r
- move.l 4(%a7),%d0\r
- bpl ld1\r
- neg.l %d0\r
-ld1:\r
- move.l 8(%a7),%d1\r
- bpl ld2\r
- neg.l %d1\r
- eor.b #0x80,4(%a7)\r
-ld2:\r
- bsr i_ldiv /* d0 = d0/d1 */\r
- tst.b 4(%a7)\r
- bpl ld3\r
- neg.l %d0\r
-ld3:\r
- rts\r
-\r
-lmul:\r
- move.l 4(%a7),%d0\r
- bpl lm1\r
- neg.l %d0\r
-lm1:\r
- move.l 8(%a7),%d1\r
- bpl lm2\r
- neg.l %d1\r
- eor.b #0x80,4(%a7)\r
-lm2:\r
- bsr i_lmul /* d0 = d0*d1 */\r
- tst.b 4(%a7)\r
- bpl lm3\r
- neg.l %d0\r
-lm3:\r
- rts\r
-\r
-lrem:\r
- move.l 4(%a7),%d0\r
- bpl lr1\r
- neg.l %d0\r
-lr1:\r
- move.l 8(%a7),%d1\r
- bpl lr2\r
- neg.l %d1\r
-lr2:\r
- bsr i_ldiv /* d1 = d0%d1 */\r
- move.l %d1,%d0\r
- tst.b 4(%a7)\r
- bpl lr3\r
- neg.l %d0\r
-lr3:\r
- rts\r
-\r
-ldivu:\r
- move.l 4(%a7),%d0\r
- move.l 8(%a7),%d1\r
- bsr i_ldiv\r
- rts\r
-\r
-lmulu:\r
- move.l 4(%a7),%d0\r
- move.l 8(%a7),%d1\r
- bsr i_lmul\r
- rts\r
-\r
-lremu:\r
- move.l 4(%a7),%d0\r
- move.l 8(%a7),%d1\r
- bsr i_ldiv\r
- move.l %d1,%d0\r
- rts\r
-*\r
-* A in d0, B in d1, return A*B in d0\r
-*\r
-i_lmul:\r
- move.l %d3,%a2 /* save d3 */\r
- move.w %d1,%d2\r
- mulu %d0,%d2 /* d2 = Al * Bl */\r
-\r
- move.l %d1,%d3\r
- swap %d3\r
- mulu %d0,%d3 /* d3 = Al * Bh */\r
-\r
- swap %d0\r
- mulu %d1,%d0 /* d0 = Ah * Bl */\r
-\r
- add.l %d3,%d0 /* d0 = (Ah*Bl + Al*Bh) */\r
- swap %d0\r
- clr.w %d0 /* d0 = (Ah*Bl + Al*Bh) << 16 */\r
-\r
- add.l %d2,%d0 /* d0 = A*B */\r
- move.l %a2,%d3 /* restore d3 */\r
- rts\r
-*\r
-*A in d0, B in d1, return A/B in d0, A%B in d1\r
-*\r
-i_ldiv:\r
- tst.l %d1\r
- bne nz1\r
-\r
-* divide by zero\r
-* divu #0,%d0 /* cause trap */\r
- move.l #0x80000000,%d0\r
- move.l %d0,%d1\r
- rts\r
-nz1:\r
- move.l %d3,%a2 /* save d3 */\r
- cmp.l %d1,%d0\r
- bhi norm\r
- beq is1\r
-* A<B, so ret 0, rem A\r
- move.l %d0,%d1\r
- clr.l %d0\r
- move.l %a2,%d3 /* restore d3 */\r
- rts\r
-* A==B, so ret 1, rem 0\r
-is1:\r
- moveq.l #1,%d0\r
- clr.l %d1\r
- move.l %a2,%d3 /* restore d3 */\r
- rts\r
-* A>B and B is not 0\r
-norm:\r
- cmp.l #1,%d1\r
- bne not1\r
-* B==1, so ret A, rem 0\r
- clr.l %d1\r
- move.l %a2,%d3 /* restore d3 */\r
- rts\r
-* check for A short (implies B short also)\r
-not1:\r
- cmp.l #0xffff,%d0\r
- bhi slow\r
-* A short and B short -- use 'divu'\r
- divu %d1,%d0 /* d0 = REM:ANS */\r
- swap %d0 /* d0 = ANS:REM */\r
- clr.l %d1\r
- move.w %d0,%d1 /* d1 = REM */\r
- clr.w %d0\r
- swap %d0\r
- move.l %a2,%d3 /* restore d3 */\r
- rts\r
-* check for B short\r
-slow:\r
- cmp.l #0xffff,%d1\r
- bhi slower\r
-* A long and B short -- use special stuff from gnu\r
- move.l %d0,%d2\r
- clr.w %d2\r
- swap %d2\r
- divu %d1,%d2 /* d2 = REM:ANS of Ahi/B */\r
- clr.l %d3\r
- move.w %d2,%d3 /* d3 = Ahi/B */\r
- swap %d3\r
-\r
- move.w %d0,%d2 /* d2 = REM << 16 + Alo */\r
- divu %d1,%d2 /* d2 = REM:ANS of stuff/B */\r
-\r
- move.l %d2,%d1\r
- clr.w %d1\r
- swap %d1 /* d1 = REM */\r
-\r
- clr.l %d0\r
- move.w %d2,%d0\r
- add.l %d3,%d0 /* d0 = ANS */\r
- move.l %a2,%d3 /* restore d3 */\r
- rts\r
-* A>B, B > 1\r
-slower:\r
- move.l #1,%d2\r
- clr.l %d3\r
-moreadj:\r
- cmp.l %d0,%d1\r
- bhs adj\r
- add.l %d2,%d2\r
- add.l %d1,%d1\r
- bpl moreadj\r
-* we shifted B until its >A or sign bit set\r
-* we shifted #1 (d2) along with it\r
-adj:\r
- cmp.l %d0,%d1\r
- bhi ltuns\r
- or.l %d2,%d3\r
- sub.l %d1,%d0\r
-ltuns:\r
- lsr.l #1,%d1\r
- lsr.l #1,%d2\r
- bne adj\r
-* d3=answer, d0=rem\r
- move.l %d0,%d1\r
- move.l %d3,%d0\r
- move.l %a2,%d3 /* restore d3 */\r
- rts\r
*---------------------------------------------------------- \r
*\r
* Z80 Sound Driver\r
notaz.gp2x.de / megadrive.git / commitdiff