#endif\r
\r
#ifndef INLINE\r
-#define INLINE static __inline\r
+#define INLINE __inline\r
#endif\r
\r
#ifndef M_PI\r
\r
\r
/* OPN Mode Register Write */\r
-INLINE void set_timers( int v )\r
+static INLINE void set_timers( int v )\r
{\r
/* b7 = CSM MODE */\r
/* b6 = 3 slot mode */\r
ym2612.OPN.ST.status &= ~1;\r
}\r
\r
-INLINE void recalc_volout(FM_SLOT *SLOT)\r
+static INLINE void recalc_volout(FM_SLOT *SLOT)\r
{\r
INT16 vol_out = SLOT->volume;\r
if ((SLOT->ssg&0x0c) == 0x0c)\r
SLOT->vol_out = vol_out + SLOT->tl;\r
}\r
\r
-INLINE void FM_KEYON(int c , int s )\r
+static INLINE void FM_KEYON(int c , int s )\r
{\r
FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s];\r
if( !SLOT->key )\r
}\r
}\r
\r
-INLINE void FM_KEYOFF(int c , int s )\r
+static INLINE void FM_KEYOFF(int c , int s )\r
{\r
FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s];\r
if( SLOT->key )\r
\r
\r
/* set detune & multiple */\r
-INLINE void set_det_mul(FM_CH *CH, FM_SLOT *SLOT, int v)\r
+static INLINE void set_det_mul(FM_CH *CH, FM_SLOT *SLOT, int v)\r
{\r
SLOT->mul = (v&0x0f)? (v&0x0f)*2 : 1;\r
SLOT->DT = ym2612.OPN.ST.dt_tab[(v>>4)&7];\r
}\r
\r
/* set total level */\r
-INLINE void set_tl(FM_SLOT *SLOT, int v)\r
+static INLINE void set_tl(FM_SLOT *SLOT, int v)\r
{\r
SLOT->tl = (v&0x7f)<<(ENV_BITS-7); /* 7bit TL */\r
if (SLOT->state > EG_REL)\r
}\r
\r
/* set attack rate & key scale */\r
-INLINE void set_ar_ksr(FM_CH *CH, FM_SLOT *SLOT, int v)\r
+static INLINE void set_ar_ksr(FM_CH *CH, FM_SLOT *SLOT, int v)\r
{\r
UINT8 old_KSR = SLOT->KSR;\r
int eg_sh_ar, eg_sel_ar;\r
}\r
\r
/* set decay rate */\r
-INLINE void set_dr(FM_SLOT *SLOT, int v)\r
+static INLINE void set_dr(FM_SLOT *SLOT, int v)\r
{\r
int eg_sh_d1r, eg_sel_d1r;\r
\r
}\r
\r
/* set sustain rate */\r
-INLINE void set_sr(FM_SLOT *SLOT, int v)\r
+static INLINE void set_sr(FM_SLOT *SLOT, int v)\r
{\r
int eg_sh_d2r, eg_sel_d2r;\r
\r
}\r
\r
/* set release rate */\r
-INLINE void set_sl_rr(FM_SLOT *SLOT, int v)\r
+static INLINE void set_sl_rr(FM_SLOT *SLOT, int v)\r
{\r
int eg_sh_rr, eg_sel_rr;\r
\r
\r
\r
\r
-INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm)\r
+static INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm)\r
{\r
int ret, sin = (phase>>16) + (pm>>1);\r
int neg = sin & 0x200;\r
return neg ? -ret : ret;\r
}\r
\r
-INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm)\r
+static INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm)\r
{\r
int ret, sin = (phase+pm)>>16;\r
int neg = sin & 0x200;\r
\r
#if !defined(_ASM_YM2612_C) || defined(EXTERNAL_YM2612)\r
/* advance LFO to next sample */\r
-INLINE int advance_lfo(int lfo_ampm, UINT32 lfo_cnt_old, UINT32 lfo_cnt)\r
+static INLINE int advance_lfo(int lfo_ampm, UINT32 lfo_cnt_old, UINT32 lfo_cnt)\r
{\r
UINT8 pos;\r
UINT8 prev_pos;\r
return lfo_ampm;\r
}\r
\r
-INLINE void update_eg_phase(FM_SLOT *SLOT, UINT32 eg_cnt, UINT32 ssg_en)\r
+static INLINE void update_eg_phase(FM_SLOT *SLOT, UINT32 eg_cnt, UINT32 ssg_en)\r
{\r
INT32 volume = SLOT->volume;\r
UINT32 pack = SLOT->eg_pack[SLOT->state - 1];\r
SLOT->volume = volume;\r
}\r
\r
-INLINE UINT32 update_ssg_eg_phase(FM_SLOT *SLOT, UINT32 phase)\r
+static INLINE UINT32 update_ssg_eg_phase(FM_SLOT *SLOT, UINT32 phase)\r
{\r
if (SLOT->ssg&0x01) {\r
if (SLOT->ssg&0x02) {\r
}\r
\r
/* update phase increment and envelope generator */\r
-INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT, int fc, int kc)\r
+static INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT, int fc, int kc)\r
{\r
int ksr, fdt;\r
\r
}\r
\r
/* update phase increment counters */\r
-INLINE void refresh_fc_eg_chan(FM_CH *CH)\r
+static INLINE void refresh_fc_eg_chan(FM_CH *CH)\r
{\r
if( CH->SLOT[SLOT1].Incr==-1){\r
int fc = CH->fc;\r
}\r
}\r
\r
-INLINE void refresh_fc_eg_chan_sl3(void)\r
+static INLINE void refresh_fc_eg_chan_sl3(void)\r
{\r
if( ym2612.CH[2].SLOT[SLOT1].Incr==-1)\r
{\r