\r
v &= 0xff; /* adjust to 8 bit bus */\r
\r
- switch( a&3){\r
+ switch( a & 3 ){\r
case 0: /* address port 0 */\r
+ case 2: /* address port 1 */\r
ym2612.OPN.ST.address = v;\r
- ym2612.addr_A1 = 0;\r
- ret=0;\r
+ ym2612.addr_A1 = (a & 2) >> 1;\r
+ ret = 0;\r
break;\r
\r
- case 1: /* data port 0 */\r
- if (ym2612.addr_A1 != 0) {\r
- ret=0;\r
- break; /* verified on real YM2608 */\r
- }\r
-\r
- addr = ym2612.OPN.ST.address;\r
+ case 1:\r
+ case 3: /* data port */\r
+ addr = ym2612.OPN.ST.address | ((int)ym2612.addr_A1 << 8);\r
\r
- switch( addr & 0xf0 )\r
+ switch( addr & 0x1f0 )\r
{\r
case 0x20: /* 0x20-0x2f Mode */\r
switch( addr )\r
else\r
{\r
ym2612.OPN.lfo_inc = 0;\r
+ ym2612.OPN.lfo_cnt = 0;\r
}\r
break;\r
#if 0 // handled elsewhere\r
ret = OPNWriteReg(addr,v);\r
}\r
break;\r
-\r
- case 2: /* address port 1 */\r
- ym2612.OPN.ST.address = v;\r
- ym2612.addr_A1 = 1;\r
- ret=0;\r
- break;\r
-\r
- case 3: /* data port 1 */\r
- if (ym2612.addr_A1 != 1) {\r
- ret=0;\r
- break; /* verified on real YM2608 */\r
- }\r
-\r
- addr = ym2612.OPN.ST.address | 0x100;\r
-\r
- ret = OPNWriteReg(addr, v);\r
- break;\r
}\r
\r
return ret;\r