#ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(16+(dst>>31)*2)
-} else RET(152+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(152+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(80)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(152+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(152+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(108)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(20+(dst>>31)*2)
-} else RET(156+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(84)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(156+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(112)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(20+(dst>>31)*2)
-} else RET(156+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(84)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(156+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(112)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(22+(dst>>31)*2)
-} else RET(158+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(158+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(86)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(158+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(158+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(114)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(24+(dst>>31)*2)
-} else RET(160+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(88)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(160+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(116)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(26+(dst>>31)*2)
-} else RET(162+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(162+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(90)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(162+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(162+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(118)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(24+(dst>>31)*2)
-} else RET(160+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(88)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(160+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(116)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(28+(dst>>31)*2)
-} else RET(164+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(164+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(92)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(164+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(164+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(120)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(24+(dst>>31)*2)
-} else RET(160+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(88)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(160+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(116)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(26+(dst>>31)*2)
-} else RET(162+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(162+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(90)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(162+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(162+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(118)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(20+(dst>>31)*2)
-} else RET(156+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(84)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(156+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(112)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(20+(dst>>31)*2)
-} else RET(156+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(84)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(156+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(112)
 #endif
 #ifdef USE_CYCLONE_TIMING_DIV
 if (q > 0xFFFF || q < -0x10000) {
        RET(22+(dst>>31)*2)
-} else RET(158+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+} else RET(158+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
        RET(86)
 #endif
                res = q | (r << 16);
        DREGu32((Opcode >> 9) & 7) = res;
 #ifdef USE_CYCLONE_TIMING_DIV
-RET(158+(dst>>31)*4+((src^dst)>>31)*2-BITCOUNT(res,abs(q))*2)
+RET(158+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2)
 #else
 RET(114)
 #endif