mrun = sh2_irl_irq(&msh2, mlvl, msh2.state & SH2_STATE_RUN);
if (mrun) {
p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES & ~SH2_STATE_SLEEP, m68k_cycles);
- p32x_sync_other_sh2(&msh2, m68k_cycles);
+ if (msh2.state & SH2_STATE_RUN)
+ sh2_end_run(&msh2, 0);
}
srun = sh2_irl_irq(&ssh2, slvl, ssh2.state & SH2_STATE_RUN);
if (srun) {
p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES & ~SH2_STATE_SLEEP, m68k_cycles);
- p32x_sync_other_sh2(&ssh2, m68k_cycles);
+ if (ssh2.state & SH2_STATE_RUN)
+ sh2_end_run(&ssh2, 0);
}
elprintf(EL_32X, "update_irls: m %d/%d, s %d/%d", mlvl, mrun, slvl, srun);
static void bank_map_handler(void)
{
- cpu68k_map_set(m68k_read8_map, 0x900000, 0x9fffff, PicoRead8_bank, 1);
- cpu68k_map_set(m68k_read16_map, 0x900000, 0x9fffff, PicoRead16_bank, 1);
+ cpu68k_map_read_funcs(0x900000, 0x9fffff, PicoRead8_bank, PicoRead16_bank, 0);
}
static void bank_switch_rom_68k(int b)
rs -= bank;
if (rs > 0x100000)
rs = 0x100000;
- cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
- cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
+ cpu68k_map_read_mem(0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
}
else {
bank = bank >> 19;
bank2 = carthw_ssf2_banks[bank + 0] << 19;
- cpu68k_map_set(m68k_read8_map, 0x900000, 0x97ffff, Pico.rom + bank2, 0);
- cpu68k_map_set(m68k_read16_map, 0x900000, 0x97ffff, Pico.rom + bank2, 0);
+ cpu68k_map_read_mem(0x900000, 0x97ffff, Pico.rom + bank2, 0);
bank2 = carthw_ssf2_banks[bank + 1] << 19;
- cpu68k_map_set(m68k_read8_map, 0x980000, 0x9fffff, Pico.rom + bank2, 0);
- cpu68k_map_set(m68k_read16_map, 0x980000, 0x9fffff, Pico.rom + bank2, 0);
+ cpu68k_map_read_mem(0x980000, 0x9fffff, Pico.rom + bank2, 0);
}
}
void Pico32xSwapDRAM(int b)
{
- cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
- cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
- cpu68k_map_set(m68k_read8_map, 0x860000, 0x87ffff, Pico32xMem->dram[b], 0);
- cpu68k_map_set(m68k_read16_map, 0x860000, 0x87ffff, Pico32xMem->dram[b], 0);
+ cpu68k_map_read_mem(0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
+ cpu68k_map_read_mem(0x860000, 0x87ffff, Pico32xMem->dram[b], 0);
cpu68k_map_set(m68k_write8_map, 0x840000, 0x87ffff,
b ? m68k_write8_dram1_ow : m68k_write8_dram0_ow, 1);
cpu68k_map_set(m68k_write16_map, 0x840000, 0x87ffff,