32x: fix savestates

diff --git a/cpu/sh2/sh2.c b/cpu/sh2/sh2.c
index d185b3f..5736908 100644 (file)
--- a/cpu/sh2/sh2.c
+++ b/cpu/sh2/sh2.c
@@ -118,6 +118,7 @@ void sh2_unpack(SH2 *sh2, const unsigned char *buff)
 
        sh2->pending_int_irq = p[0];
        sh2->pending_int_vector = p[1];
+       sh2->test_irq = 1;
 }
 
 #ifdef DRC_CMP

diff --git a/pico/32x/32x.c b/pico/32x/32x.c
index dbd3fa8..cec05e8 100644 (file)
--- a/pico/32x/32x.c
+++ b/pico/32x/32x.c
@@ -301,8 +301,10 @@ void sync_sh2s_normal(unsigned int m68k_target)
 
   elprintf(EL_32X, "sh2 sync to %u", m68k_target);
 
-  if (!(Pico32x.regs[0] & P32XS_nRES))
+  if (!(Pico32x.regs[0] & P32XS_nRES)) {
+    msh2.m68krcycles_done = ssh2.m68krcycles_done = m68k_target;
     return; // rare
+  }
 
   now = msh2.m68krcycles_done;
   if (CYCLES_GT(now, ssh2.m68krcycles_done))
@@ -416,4 +418,18 @@ void Pico32xSetClocks(int msh2_hz, int ssh2_hz)
   }
 }
 
+void Pico32xStateLoaded(int is_early)
+{
+  if (is_early) {
+    Pico32xMemStateLoaded();
+    return;
+  }
+
+  sh2s[0].m68krcycles_done = sh2s[1].m68krcycles_done = SekCycleCntT;
+  p32x_update_irls(0);
+  p32x_poll_event(3, 0);
+  p32x_timers_recalc();
+  run_events(SekCycleCntT);
+}
+
 // vim:shiftwidth=2:ts=2:expandtab

diff --git a/pico/32x/memory.c b/pico/32x/memory.c
index cb318c7..b0f7007 100644 (file)
--- a/pico/32x/memory.c
+++ b/pico/32x/memory.c
@@ -121,8 +121,8 @@ void p32x_poll_event(int cpu_mask, int is_vdp)
 
 // SH2 faking
 //#define FAKE_SH2
-int p32x_csum_faked;
 #ifdef FAKE_SH2
+static int p32x_csum_faked;
 static const u16 comm_fakevals[] = {
   0x4d5f, 0x4f4b, // M_OK
   0x535f, 0x4f4b, // S_OK
@@ -1612,16 +1612,12 @@ void PicoMemSetup32x(void)
 #endif
 }
 
-void Pico32xStateLoaded(void)
+void Pico32xMemStateLoaded(void)
 {
-  sh2s[0].m68krcycles_done = sh2s[1].m68krcycles_done = SekCycleCntT;
-  p32x_poll_event(3, 0);
-
   bank_switch(Pico32x.regs[4 / 2]);
   Pico32xSwapDRAM((Pico32x.vdp_regs[0x0a / 2] & P32XV_FS) ^ P32XV_FS);
-  Pico32x.dirty_pal = 1;
   memset(Pico32xMem->pwm, 0, sizeof(Pico32xMem->pwm));
-  p32x_timers_recalc();
+  Pico32x.dirty_pal = 1;
 #ifdef DRC_SH2
   sh2_drc_flush_all();
 #endif

diff --git a/pico/pico_int.h b/pico/pico_int.h
index 8fb4a49..420e82c 100644 (file)
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -735,6 +735,7 @@ void PicoReset32x(void);
 void Pico32xStartup(void);\r
 void PicoUnload32x(void);\r
 void PicoFrame32x(void);\r
+void Pico32xStateLoaded(int is_early);\r
 void p32x_sync_sh2s(unsigned int m68k_target);\r
 void p32x_update_irls(int nested_call);\r
 void p32x_reset_sh2s(void);\r
@@ -748,7 +749,7 @@ void PicoWrite8_32x(unsigned int a, unsigned int d);
 void PicoWrite16_32x(unsigned int a, unsigned int d);\r
 void PicoMemSetup32x(void);\r
 void Pico32xSwapDRAM(int b);\r
-void Pico32xStateLoaded(void);\r
+void Pico32xMemStateLoaded(void);\r
 void p32x_poll_event(int cpu_mask, int is_vdp);\r
 \r
 // 32x/draw.c\r

diff --git a/pico/state.c b/pico/state.c
index 761b64c..11eee6f 100644 (file)
--- a/pico/state.c
+++ b/pico/state.c
@@ -175,6 +175,8 @@ typedef enum {
   CHUNK_DRAM,\r
   CHUNK_32XPAL,\r
   CHUNK_32X_EVT,\r
+  CHUNK_32X_FIRST = CHUNK_MSH2,\r
+  CHUNK_32X_LAST = CHUNK_32X_EVT,\r
   //\r
   CHUNK_DEFAULT_COUNT,\r
   CHUNK_CARTHW_ = CHUNK_CARTHW,  // defined in PicoInt\r
@@ -411,8 +413,8 @@ static int state_load(void *file)
     if (len < 0 || len > 1024*512) R_ERROR_RETURN("bad length");\r
     if (CHUNK_S68K <= chunk && chunk <= CHUNK_MISC_CD && !(PicoAHW & PAHW_MCD))\r
       R_ERROR_RETURN("cd chunk in non CD state?");\r
-    if (CHUNK_MSH2 <= chunk && chunk <= CHUNK_32XPAL && !(PicoAHW & PAHW_32X))\r
-      R_ERROR_RETURN("32x chunk in non 32x state?");\r
+    if (CHUNK_32X_FIRST <= chunk && chunk <= CHUNK_32X_LAST && !(PicoAHW & PAHW_32X))\r
+      Pico32xStartup();\r
 \r
     switch (chunk)\r
     {\r
@@ -517,18 +519,22 @@ readend:
 \r
     if (!(Pico_mcd->s68k_regs[0x36] & 1) && (Pico_mcd->scd.Status_CDC & 1))\r
       cdda_start_play();\r
-\r
-    SekUnpackCpu(buff_s68k, 1);\r
   }\r
 \r
+  if (PicoAHW & PAHW_32X)\r
+    Pico32xStateLoaded(1);\r
+\r
   // must unpack 68k and z80 after banks are set up\r
   if (!(PicoAHW & PAHW_SMS))\r
     SekUnpackCpu(buff_m68k, 0);\r
+  if (PicoAHW & PAHW_MCD)\r
+    SekUnpackCpu(buff_s68k, 1);\r
 \r
   z80_unpack(buff_z80);\r
 \r
+  // due to dep from 68k cycles..\r
   if (PicoAHW & PAHW_32X)\r
-    Pico32xStateLoaded();\r
+    Pico32xStateLoaded(0);\r
 \r
   return 0;\r
 }\r