unsigned int osp; // [r7,#0x48] Other Stack Pointer (USP/SSP)\r
unsigned int xc; // [r7,#0x4c] Extend flag (bit29: ??X? _)\r
unsigned int prev_pc; // [r7,#0x50] Set to start address of currently executed opcode + 2 (if enabled in config.h)\r
- unsigned int reserved;// [r7,#0x54] Reserved for possible future use\r
+ unsigned int jumptab; // [r7,#0x54] Jump table pointer\r
int state_flags; // [r7,#0x58] bit: 0: stopped state, 1: trace state, 2: activity bit, 3: addr error, 4: fatal halt\r
int cycles; // [r7,#0x5c] Number of cycles to execute - 1. Updates to cycles left after CycloneRun()\r
int membase; // [r7,#0x60] Memory Base (ARM address minus 68000 address)\r
r6 : Pointer to Opcode Jump table\r
r7 : Pointer to Cpu Context\r
r8 : Current Opcode\r
- r9 : Flags (NZCV) in highest four bits\r
- (r10 : Temporary source value or Memory Base)\r
+ r10 : Flags (NZCV) in highest four bits\r
(r11 : Temporary register)\r
\r
Flags are mapped onto ARM flags whenever possible, which speeds up the processing of opcode.\r
+r9 is not used intentionally, because AAPCS defines it as "platform register", so it's\r
+reserved in some systems.\r
\r
\r
Thanks to...\r
\r
What's New\r
----------\r
+v0.0099 notaz\r
+ * Cyclone no longer uses r9, because AAPCS defines it as "platform register",\r
+ so it's reserved in some systems.\r
+\r
v0.0088 notaz\r
- Reduced amount of code in opcode handlers by ~23% by doing the following:\r
- Removed duplicate opcode handlers\r
\r
static FILE *AsmFile=NULL;\r
\r
-static int CycloneVer=0x0088; // Version number of library\r
+static int CycloneVer=0x0099; // Version number of library\r
int *CyJump=NULL; // Jump table\r
int ms=USE_MS_SYNTAX; // If non-zero, output in Microsoft ARMASM format\r
char *Narm[4]={ "b", "h","",""}; // Normal ARM Extensions for operand sizes 0,1,2\r
{\r
ot("ExceptionAddressError_%c_%s%s\n", rw, dataprg, ms?"":":");\r
ot(" ldr r1,[r7,#0x44]\n");\r
- ot(" mov r10,#0x%02x\n", iw);\r
+ ot(" mov r6,#0x%02x\n", iw);\r
ot(" mov r11,r0\n");\r
ot(" tst r1,#0x20\n");\r
- ot(" orrne r10,r10,#4\n");\r
+ ot(" orrne r6,r6,#4\n");\r
ot(" b ExceptionAddressError\n");\r
ot("\n");\r
}\r
if (ms) ot("CycloneRun\n");\r
else ot("CycloneRun:\n");\r
\r
- ot(" stmdb sp!,{r4-r11,lr}\n");\r
+ ot(" stmdb sp!,{r4-r8,r10,r11,lr}\n");\r
\r
ot(" mov r7,r0 ;@ r7 = Pointer to Cpu Context\n");\r
ot(" ;@ r0-3 = Temporary registers\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Flags (NZCV)\n");\r
ot(" ldr r6,=CycloneJumpTab ;@ r6 = Opcode Jump table\n");\r
ot(" ldr r5,[r7,#0x5c] ;@ r5 = Cycles\n");\r
ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");\r
ot(" ;@ r8 = Current Opcode\n");\r
ot(" ldr r1,[r7,#0x44] ;@ Get SR high T_S__III and irq level\n");\r
- ot(" mov r9,r9,lsl #28 ;@ r9 = Flags 0xf0000000, cpsr format\n");\r
- ot(" ;@ r10 = Source value / Memory Base\n");\r
+ ot(" mov r10,r10,lsl #28;@ r10 = Flags 0xf0000000, cpsr format\n");\r
+ ot(" ;@ r11 = Source value / Memory Base\n");\r
+ ot(" str r6,[r7,#0x54] ;@ make a copy to avoid literal pools\n");\r
ot("\n");\r
#if (CYCLONE_FOR_GENESIS == 2) || EMULATE_TRACE\r
ot(" mov r2,#0\n");\r
ot(";@ stopped or halted\n");\r
ot(" mov r5,#0\n");\r
ot(" str r5,[r7,#0x5C] ;@ eat all cycles\n");\r
- ot(" ldmia sp!,{r4-r11,pc} ;@ we are stopped, do nothing!\n");\r
+ ot(" ldmia sp!,{r4-r8,r10,r11,pc} ;@ we are stopped, do nothing!\n");\r
ot("\n");\r
ot("\n");\r
\r
ot("CycloneEndNoBack%s\n", ms?"":":");\r
#if (CYCLONE_FOR_GENESIS == 2) || EMULATE_TRACE\r
ot(" ldr r1,[r7,#0x98]\n");\r
- ot(" mov r9,r9,lsr #28\n");\r
+ ot(" mov r10,r10,lsr #28\n");\r
ot(" tst r1,r1\n");\r
ot(" bxne r1 ;@ jump to alternative CycloneEnd\n");\r
#else\r
- ot(" mov r9,r9,lsr #28\n");\r
+ ot(" mov r10,r10,lsr #28\n");\r
#endif\r
ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
- ot(" strb r9,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
- ot(" ldmia sp!,{r4-r11,pc}\n");\r
+ ot(" strb r10,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
+ ot(" ldmia sp!,{r4-r8,r10,r11,pc}\n");\r
ltorg();\r
ot("\n");\r
ot("\n");\r
ot(" movle r0,#0\n");\r
ot(" bxle lr ;@ no ints\n");\r
ot("\n");\r
- ot(" stmdb sp!,{r4,r5,r7-r11,lr}\n");\r
+ ot(" stmdb sp!,{r4,r5,r7,r8,r10,r11,lr}\n");\r
ot(" mov r7,r0\n");\r
ot(" mov r0,r2\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Flags (NZCV)\n");\r
ot(" mov r5,#0\n");\r
- ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");\r
- ot(" mov r9,r9,lsl #28 ;@ r9 = Flags 0xf0000000, cpsr format\n");\r
+ ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");\r
+ ot(" mov r10,r10,lsl #28 ;@ r10 = Flags 0xf0000000, cpsr format\n");\r
ot(" adr r2,CycloneFlushIrqEnd\n");\r
ot(" str r2,[r7,#0x98] ;@ set custom CycloneEnd\n");\r
ot(" b CycloneDoInterrupt\n");\r
ot("\n");\r
ot("CycloneFlushIrqEnd%s\n", ms?"":":");\r
ot(" rsb r0,r5,#0\n");\r
- ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");\r
- ot(" strb r9,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
- ot(" ldmia sp!,{r4,r5,r7-r11,lr}\n");\r
+ ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");\r
+ ot(" strb r10,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
+ ot(" ldmia sp!,{r4,r5,r7,r8,r10,r11,lr}\n");\r
ot(" bx lr\n");\r
ot("\n");\r
ot("\n");\r
ot(" orr r2,r2,#4 ;@ set activity bit: 'not processing instruction'\n");\r
#endif\r
ot(" str r2,[r7,#0x58]\n");\r
- ot(" ldrb r10,[r7,#0x44] ;@ Get old SR high\n");\r
+ ot(" ldrb r6,[r7,#0x44] ;@ Get old SR high, abuse r6\n");\r
ot(" strb r3,[r7,#0x44] ;@ Put new SR high\n");\r
ot("\n");\r
\r
// 3. Save the current processor context.\r
ot(" ldr r1,[r7,#0x60] ;@ Get Memory base\n");\r
ot(" ldr r11,[r7,#0x3c] ;@ Get A7\n");\r
- ot(" tst r10,#0x20\n");\r
+ ot(" tst r6,#0x20\n");\r
ot(";@ get our SP:\n");\r
ot(" ldreq r2,[r7,#0x48] ;@ ...or OSP as our stack pointer\n");\r
ot(" streq r11,[r7,#0x48]\n");\r
MemHandler(1,2);\r
ot(";@ Push old SR:\n");\r
ot(" ldr r0,[r7,#0x4c] ;@ X bit\n");\r
- ot(" mov r1,r9,lsr #28 ;@ ____NZCV\n");\r
+ ot(" mov r1,r10,lsr #28 ;@ ____NZCV\n");\r
ot(" eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");\r
ot(" tst r2,#1 ;@ 1 if C!=V\n");\r
ot(" eorne r1,r1,#3 ;@ ____NZVC\n");\r
ot(" and r0,r0,#0x20000000\n");\r
ot(" orr r1,r1,r0,lsr #25 ;@ ___XNZVC\n");\r
- ot(" orr r1,r1,r10,lsl #8 ;@ Include old SR high\n");\r
+ ot(" orr r1,r1,r6,lsl #8 ;@ Include old SR high\n");\r
ot(" sub r0,r11,#6 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(1,1,0,0); // already checked for address error by prev MemHandler\r
ot(";@ call IrqCallback if it is defined\n");\r
#if INT_ACK_NEEDS_STUFF\r
ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
- ot(" mov r1,r9,lsr #28\n");\r
+ ot(" mov r1,r10,lsr #28\n");\r
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
#endif\r
#endif\r
ot(" mov r0,r0,lsl #2 ;@ get vector address\n");\r
ot("\n");\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");\r
ot(";@ Read IRQ Vector:\n");\r
MemHandler(0,2,0,0);\r
ot(" tst r0,r0 ;@ uninitialized int vector?\n");\r
ot(" ldreq pc,[r7,#0x70] ;@ Call read32(r0) handler\n");\r
#if USE_CHECKPC_CALLBACK\r
ot(" add lr,pc,#4\n");\r
- ot(" add r0,r0,r10 ;@ r0 = Memory Base + New PC\n");\r
+ ot(" add r0,r0,r11 ;@ r0 = Memory Base + New PC\n");\r
ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
#if EMULATE_ADDRESS_ERRORS_JUMP\r
ot(" mov r4,r0\n");\r
ot(" bic r4,r0,#1\n");\r
#endif\r
#else\r
- ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");\r
+ ot(" add r4,r0,r11 ;@ r4 = Memory Base + New PC\n");\r
#if EMULATE_ADDRESS_ERRORS_JUMP\r
ot(" bic r4,r4,#1\n");\r
#endif\r
ot(" tst r4,#1\n");\r
ot(" bne ExceptionAddressError_r_prg_r4\n");\r
#endif\r
+ ot(" ldr r6,[r7,#0x54]\n");\r
ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
ot(" subs r5,r5,#44 ;@ Subtract cycles\n");\r
ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
ot(" orr r8,r8,r0,lsl #24 ;@ abuse r8\n");\r
\r
// 1. Make a temporary copy of the status register and set the status register for exception processing.\r
- ot(" ldr r10,[r7,#0x44] ;@ Get old SR high\n");\r
+ ot(" ldr r6,[r7,#0x44] ;@ Get old SR high, abuse r6\n");\r
ot(" ldr r2,[r7,#0x58] ;@ state flags\n");\r
- ot(" and r3,r10,#0x27 ;@ clear trace and unused flags\n");\r
+ ot(" and r3,r6,#0x27 ;@ clear trace and unused flags\n");\r
ot(" orr r3,r3,#0x20 ;@ set supervisor mode\n");\r
ot(" bic r2,r2,#3 ;@ clear stopped and trace states\n");\r
ot(" str r2,[r7,#0x58]\n");\r
\r
// 3. Save the current processor context.\r
ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");\r
- ot(" tst r10,#0x20\n");\r
+ ot(" tst r6,#0x20\n");\r
ot(";@ get our SP:\n");\r
ot(" ldreq r2,[r7,#0x48] ;@ ...or OSP as our stack pointer\n");\r
ot(" streq r0,[r7,#0x48]\n");\r
MemHandler(1,2);\r
ot(";@ Push old SR:\n");\r
ot(" ldr r0,[r7,#0x4c] ;@ X bit\n");\r
- ot(" mov r1,r9,lsr #28 ;@ ____NZCV\n");\r
+ ot(" mov r1,r10,lsr #28 ;@ ____NZCV\n");\r
ot(" eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");\r
ot(" tst r2,#1 ;@ 1 if C!=V\n");\r
ot(" eorne r1,r1,#3 ;@ ____NZVC\n");\r
ot(" and r0,r0,#0x20000000\n");\r
ot(" orr r1,r1,r0,lsr #25 ;@ ___XNZVC\n");\r
ot(" ldr r0,[r7,#0x3c] ;@ A7\n");\r
- ot(" orr r1,r1,r10,lsl #8 ;@ Include SR high\n");\r
+ ot(" orr r1,r1,r6,lsl #8 ;@ Include SR high\n");\r
ot(" sub r0,r0,#2 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(1,1,0,0);\r
ot(" tst r4,#1\n");\r
ot(" bne ExceptionAddressError_r_prg_r4\n");\r
#endif\r
+ ot(" ldr r6,[r7,#0x54]\n");\r
ot(" bx r11 ;@ Return\n");\r
ot("\n");\r
\r
ot("ExceptionAddressError_r_prg_r4%s\n", ms?"":":");\r
ot(" ldr r1,[r7,#0x44]\n");\r
ot(" ldr r3,[r7,#0x60] ;@ Get Memory base\n");\r
- ot(" mov r10,#0x12\n");\r
+ ot(" mov r6,#0x12\n");\r
ot(" sub r11,r4,r3\n");\r
ot(" tst r1,#0x20\n");\r
- ot(" orrne r10,r10,#4\n");\r
+ ot(" orrne r6,r6,#4\n");\r
ot("\n");\r
\r
ot("ExceptionAddressError%s\n", ms?"":":");\r
- ot(";@ r10 - info word (without instruction/not bit), r11 - faulting address\n");\r
+ ot(";@ r6 - info word (without instruction/not bit), r11 - faulting address\n");\r
\r
// 1. Make a temporary copy of the status register and set the status register for exception processing.\r
ot(" ldrb r0,[r7,#0x44] ;@ Get old SR high\n");\r
ot(" strb r3,[r7,#0x44] ;@ Put new SR high\n");\r
ot(" bic r2,r2,#3 ;@ clear stopped and trace states\n");\r
ot(" tst r2,#4\n");\r
- ot(" orrne r10,r10,#8 ;@ complete info word\n");\r
+ ot(" orrne r6,r6,#8 ;@ complete info word\n");\r
ot(" orr r2,r2,#4 ;@ set activity bit: 'not processing instruction'\n");\r
#if EMULATE_HALT\r
ot(" tst r2,#8\n");\r
#else\r
ot(" str r2,[r7,#0x58]\n");\r
#endif\r
- ot(" and r9,r9,#0xf0000000\n");\r
- ot(" orr r9,r9,r0,lsl #4 ;@ some preparations for SR push\n");\r
+ ot(" and r10,r10,#0xf0000000\n");\r
+ ot(" orr r10,r10,r0,lsl #4 ;@ some preparations for SR push\n");\r
ot("\n");\r
\r
// 3. Save the current processor context + additional information.\r
ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");\r
- ot(" tst r9,#0x200\n");\r
+ ot(" tst r10,#0x200\n");\r
ot(";@ get our SP:\n");\r
ot(" ldreq r2,[r7,#0x48] ;@ ...or OSP as our stack pointer\n");\r
ot(" streq r0,[r7,#0x48]\n");\r
// SR\r
ot(";@ Push old SR:\n");\r
ot(" ldr r0,[r7,#0x4c] ;@ X bit\n");\r
- ot(" mov r1,r9,ror #28 ;@ ____NZCV\n");\r
+ ot(" mov r1,r10,ror #28 ;@ ____NZCV\n");\r
ot(" eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");\r
ot(" tst r2,#1 ;@ 1 if C!=V\n");\r
ot(" eorne r1,r1,#3 ;@ ____NZVC\n");\r
ot(" and r0,r0,#0x20000000\n");\r
ot(" orr r1,r1,r0,lsr #25 ;@ ___XNZVC\n");\r
ot(" ldr r0,[r7,#0x3c] ;@ A7\n");\r
- ot(" and r9,r9,#0xf0000000\n");\r
+ ot(" and r10,r10,#0xf0000000\n");\r
ot(" sub r0,r0,#2 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(1,1,0,0);\r
// information word\r
ot(";@ Push info word:\n");\r
ot(" ldr r0,[r7,#0x3c] ;@ A7\n");\r
- ot(" mov r1,r10\n");\r
+ ot(" mov r1,r6\n");\r
ot(" sub r0,r0,#2 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(1,1,0,0);\r
#endif\r
\r
// 4. Resume execution.\r
+ ot(" ldr r6,[r7,#0x54]\n");\r
ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
ot(" subs r5,r5,#50 ;@ Subtract cycles\n");\r
ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
ot(" ldr r2,[r7,#0x58]\n");\r
ot(" ldr r0,[r7,#0x9c] ;@ restore cycles\n");\r
ot(" ldr r1,[r7,#0xa0] ;@ old CycloneEnd handler\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
ot(" add r5,r0,r5\n");\r
ot(" str r1,[r7,#0x98]\n");\r
ot(";@ still tracing?\n"); // exception might have happend\r
func=0x68+type*0xc+(size<<2); // Find correct offset\r
\r
#if MEMHANDLERS_NEED_FLAGS\r
- ot(" mov r3,r9,lsr #28\n");\r
+ ot(" mov r3,r10,lsr #28\n");\r
ot(" strb r3,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
#endif\r
FlushPC();\r
ot(" handler\n");\r
\r
#if MEMHANDLERS_CHANGE_FLAGS\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
#endif\r
#if MEMHANDLERS_CHANGE_PC\r
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
#endif\r
#if USE_UNRECOGNIZED_CALLBACK\r
ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
- ot(" mov r1,r9,lsr #28\n");\r
+ ot(" mov r1,r10,lsr #28\n");\r
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");\r
ot(" tst r11,r11\n");\r
ot(" movne lr,pc\n");\r
ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");\r
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
ot(" tst r0,r0\n");\r
ot(" moveq r0,#4\n");\r
ot(" bleq Exception\n");\r
ot(" sub r4,r4,#2\n");\r
#if USE_AFLINE_CALLBACK\r
ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
- ot(" mov r1,r9,lsr #28\n");\r
+ ot(" mov r1,r10,lsr #28\n");\r
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");\r
ot(" tst r11,r11\n");\r
ot(" movne lr,pc\n");\r
ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");\r
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
ot(" tst r0,r0\n");\r
ot(" moveq r0,#0x0a\n");\r
ot(" bleq Exception\n");\r
ot(" sub r4,r4,#2\n");\r
#if USE_AFLINE_CALLBACK\r
ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
- ot(" mov r1,r9,lsr #28\n");\r
+ ot(" mov r1,r10,lsr #28\n");\r
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");\r
ot(" tst r11,r11\n");\r
ot(" movne lr,pc\n");\r
ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");\r
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
ot(" tst r0,r0\n");\r
ot(" moveq r0,#0x0b\n");\r
ot(" bleq Exception\n");\r
// Get flags, trashes r2\r
int OpGetFlags(int subtract,int xbit,int specialz)\r
{\r
- if (specialz) ot(" orr r2,r9,#0xb0000000 ;@ for old Z\n");\r
+ if (specialz) ot(" orr r2,r10,#0xb0000000 ;@ for old Z\n");\r
\r
- ot(" mrs r9,cpsr ;@ r9=flags\n");\r
+ ot(" mrs r10,cpsr ;@ r10=flags\n");\r
\r
- if (specialz) ot(" andeq r9,r9,r2 ;@ fix Z\n");\r
+ if (specialz) ot(" andeq r10,r10,r2 ;@ fix Z\n");\r
\r
- if (subtract) ot(" eor r9,r9,#0x20000000 ;@ Invert carry\n");\r
+ if (subtract) ot(" eor r10,r10,#0x20000000 ;@ Invert carry\n");\r
\r
if (xbit)\r
{\r
- ot(" str r9,[r7,#0x4c] ;@ Save X bit\n");\r
+ ot(" str r10,[r7,#0x4c] ;@ Save X bit\n");\r
}\r
return 0;\r
}\r
\r
if (size>0 && (ea&0x38)==0x08) size=2; // addq.w #n,An is also 32-bit\r
\r
- EaCalcReadNoSE(10,0,ea,size,0x003f);\r
+ EaCalcReadNoSE(11,0,ea,size,0x003f);\r
\r
shift=32-(8<<size);\r
\r
if ((ea&0x38)!=0x08) OpGetFlags(type,1);\r
ot("\n");\r
\r
- EaWrite(10, 1, ea,size,0x003f,1);\r
+ EaWrite(11, 1, ea,size,0x003f,1);\r
\r
OpEnd(ea);\r
\r
\r
OpStart(op,ea); Cycles=4;\r
\r
- EaCalcReadNoSE(dir?10:-1,0,ea,size,0x003f);\r
+ EaCalcReadNoSE(dir?11:-1,0,ea,size,0x003f);\r
\r
- EaCalcReadNoSE(dir?-1:10,1,rea,size,0x0e00);\r
+ EaCalcReadNoSE(dir?-1:11,1,rea,size,0x0e00);\r
\r
ot(";@ Do arithmetic:\n");\r
if (type==0) strop = "orr";\r
\r
ot(";@ Save result:\n");\r
if (size<2) ot(" mov r1,r1,asr #%d\n",size?16:24);\r
- if (dir) EaWrite(10, 1, ea,size,0x003f,0,0);\r
- else EaWrite(10, 1,rea,size,0x0e00,0,0);\r
+ if (dir) EaWrite(11, 1, ea,size,0x003f,0,0);\r
+ else EaWrite(11, 1,rea,size,0x0e00,0,0);\r
\r
if(rea==ea) {\r
if(ea<8) Cycles=(size>=2)?8:4; else Cycles+=(size>=2)?26:14;\r
\r
EaCalcReadNoSE(-1,0,ea,1,0x003f);\r
\r
- EaCalc(10,0x0e00,rea, 2);\r
- EaRead(10, 2,rea, 2,0x0e00);\r
+ EaCalc(11,0x0e00,rea, 2);\r
+ EaRead(11, 2,rea, 2,0x0e00);\r
\r
ot(" movs r1,r0,asl #16\n");\r
\r
if (type==0) // div\r
{\r
// the manual says C is always cleared, but neither Musashi nor FAME do that\r
- //ot(" bic r9,r9,#0x20000000 ;@ always clear C\n");\r
+ //ot(" bic r10,r10,#0x20000000 ;@ always clear C\n");\r
ot(" beq divzero%.4x ;@ division by zero\n",op);\r
ot("\n");\r
\r
if (sign)\r
{\r
- ot(" mov r11,#0 ;@ r11 = 1 or 2 if the result is negative\n");\r
+ ot(" mov r12,#0 ;@ r12 = 1 or 2 if the result is negative\n");\r
ot(" tst r2,r2\n");\r
- ot(" orrmi r11,r11,#2\n");\r
+ ot(" orrmi r12,r12,#2\n");\r
ot(" rsbmi r2,r2,#0 ;@ Make r2 positive\n");\r
ot("\n");\r
ot(" movs r0,r1,asr #16\n");\r
- ot(" orrmi r11,r11,#1\n");\r
+ ot(" orrmi r12,r12,#1\n");\r
ot(" rsbmi r0,r0,#0 ;@ Make r0 positive\n");\r
ot("\n");\r
ot(";@ detect the nasty 0x80000000 / -1 situation\n");\r
if (sign)\r
{\r
// sign correction\r
- ot(" and r1,r11,#1\n");\r
- ot(" teq r1,r11,lsr #1\n");\r
+ ot(" and r1,r12,#1\n");\r
+ ot(" teq r1,r12,lsr #1\n");\r
ot(" rsbne r3,r3,#0 ;@ negate if quotient is negative\n");\r
- ot(" tst r11,#2\n");\r
+ ot(" tst r12,#2\n");\r
ot(" rsbne r2,r2,#0 ;@ negate the remainder if divident was negative\n");\r
ot("\n");\r
\r
// signed overflow check\r
ot(" mov r1,r3,asl #16\n");\r
ot(" cmp r3,r1,asr #16 ;@ signed overflow?\n");\r
- ot(" orrne r9,r9,#0x10000000 ;@ set overflow flag\n");\r
+ ot(" orrne r10,r10,#0x10000000 ;@ set overflow flag\n");\r
ot(" bne endofop%.4x ;@ overflow!\n",op);\r
ot("\n");\r
ot("wrendofop%.4x%s\n",op,ms?"":":");\r
{\r
// overflow check\r
ot(" movs r1,r3,lsr #16 ;@ check for overflow condition\n");\r
- ot(" orrne r9,r9,#0x10000000 ;@ set overflow flag\n");\r
+ ot(" orrne r10,r10,#0x10000000 ;@ set overflow flag\n");\r
ot(" bne endofop%.4x ;@ overflow!\n",op);\r
ot("\n");\r
}\r
}\r
ot("\n");\r
\r
- EaWrite(10, 1,rea, 2,0x0e00,1);\r
+ EaWrite(11, 1,rea, 2,0x0e00,1);\r
\r
if (type==0) ot("endofop%.4x%s\n",op,ms?"":":");\r
OpEnd(ea);\r
{\r
ot(";@ Get src/dest EA vals\n");\r
EaCalc (0,0x000f, sea,0,1);\r
- EaRead (0, 10, sea,0,0x000f,1);\r
+ EaRead (0, 6, sea,0,0x000f,1);\r
EaCalcReadNoSE(11,0,dea,0,0x0e00);\r
}\r
else\r
{\r
ot(";@ Get src/dest reg vals\n");\r
- EaCalcReadNoSE(-1,10,sea,0,0x0007);\r
+ EaCalcReadNoSE(-1,6,sea,0,0x0007);\r
EaCalcReadNoSE(11,0,dea,0,0x0e00);\r
- ot(" mov r10,r10,asl #24\n");\r
+ ot(" mov r6,r6,asl #24\n");\r
}\r
ot(" mov r1,r0,asl #24\n\n");\r
\r
- ot(" bic r9,r9,#0xb1000000 ;@ clear all flags except old Z\n");\r
+ ot(" bic r10,r10,#0xb1000000 ;@ clear all flags except old Z\n");\r
\r
if (type)\r
{\r
ot(" mov r3,#0x00f00000\n");\r
ot(" and r2,r3,r1,lsr #4\n");\r
ot(" tst r0,#0x20000000\n");\r
- ot(" and r0,r3,r10,lsr #4\n");\r
+ ot(" and r0,r3,r6,lsr #4\n");\r
ot(" add r0,r0,r2\n");\r
ot(" addne r0,r0,#0x00100000\n");\r
// ot(" tst r0,#0x00800000\n");\r
-// ot(" orreq r9,r9,#0x01000000 ;@ Undefined V behavior\n");\r
+// ot(" orreq r10,r10,#0x01000000 ;@ Undefined V behavior\n");\r
ot(" cmp r0,#0x00900000\n");\r
ot(" addhi r0,r0,#0x00600000 ;@ Decimal adjust units\n");\r
\r
ot(" mov r2,r1,lsr #28\n");\r
ot(" add r0,r0,r2,lsl #24\n");\r
- ot(" mov r2,r10,lsr #28\n");\r
+ ot(" mov r2,r6,lsr #28\n");\r
ot(" add r0,r0,r2,lsl #24\n");\r
ot(" cmp r0,#0x09900000\n");\r
- ot(" orrhi r9,r9,#0x20000000 ;@ C\n");\r
+ ot(" orrhi r10,r10,#0x20000000 ;@ C\n");\r
ot(" subhi r0,r0,#0x0a000000\n");\r
-// ot(" and r3,r9,r0,lsr #3 ;@ Undefined V behavior part II\n");\r
-// ot(" orr r9,r9,r3,lsl #4 ;@ V\n");\r
+// ot(" and r3,r10,r0,lsr #3 ;@ Undefined V behavior part II\n");\r
+// ot(" orr r10,r10,r3,lsl #4 ;@ V\n");\r
ot(" movs r0,r0,lsl #4\n");\r
- ot(" orrmi r9,r9,#0x90000000 ;@ Undefined N+V behavior\n"); // this is what Musashi really does\r
- ot(" bicne r9,r9,#0x40000000 ;@ Z flag\n");\r
+ ot(" orrmi r10,r10,#0x90000000 ;@ Undefined N+V behavior\n"); // this is what Musashi really does\r
+ ot(" bicne r10,r10,#0x40000000 ;@ Z flag\n");\r
}\r
else\r
{\r
ot(" ldr r0,[r7,#0x4c] ;@ Get X bit\n");\r
ot(" mov r3,#0x00f00000\n");\r
- ot(" and r2,r3,r10,lsr #4\n");\r
+ ot(" and r2,r3,r6,lsr #4\n");\r
ot(" tst r0,#0x20000000\n");\r
ot(" and r0,r3,r1,lsr #4\n");\r
ot(" sub r0,r0,r2\n");\r
ot(" subne r0,r0,#0x00100000\n");\r
// ot(" tst r0,#0x00800000\n");\r
-// ot(" orreq r9,r9,#0x01000000 ;@ Undefined V behavior\n");\r
+// ot(" orreq r10,r10,#0x01000000 ;@ Undefined V behavior\n");\r
ot(" cmp r0,#0x00900000\n");\r
ot(" subhi r0,r0,#0x00600000 ;@ Decimal adjust units\n");\r
\r
ot(" mov r2,r1,lsr #28\n");\r
ot(" add r0,r0,r2,lsl #24\n");\r
- ot(" mov r2,r10,lsr #28\n");\r
+ ot(" mov r2,r6,lsr #28\n");\r
ot(" sub r0,r0,r2,lsl #24\n");\r
ot(" cmp r0,#0x09900000\n");\r
- ot(" orrhi r9,r9,#0xa0000000 ;@ N and C\n");\r
+ ot(" orrhi r10,r10,#0xa0000000 ;@ N and C\n");\r
ot(" addhi r0,r0,#0x0a000000\n");\r
-// ot(" and r3,r9,r0,lsr #3 ;@ Undefined V behavior part II\n");\r
-// ot(" orr r9,r9,r3,lsl #4 ;@ V\n");\r
+// ot(" and r3,r10,r0,lsr #3 ;@ Undefined V behavior part II\n");\r
+// ot(" orr r10,r10,r3,lsl #4 ;@ V\n");\r
ot(" movs r0,r0,lsl #4\n");\r
-// ot(" orrmi r9,r9,#0x80000000 ;@ Undefined N behavior\n");\r
- ot(" bicne r9,r9,#0x40000000 ;@ Z flag\n");\r
+// ot(" orrmi r10,r10,#0x80000000 ;@ Undefined N behavior\n");\r
+ ot(" bicne r10,r10,#0x40000000 ;@ Z flag\n");\r
}\r
\r
- ot(" str r9,[r7,#0x4c] ;@ Save X bit\n");\r
+ ot(" str r10,[r7,#0x4c] ;@ Save X bit\n");\r
ot("\n");\r
\r
EaWrite(11, 0, dea,0,0x0e00,1);\r
+\r
+ ot(" ldr r6,[r7,#0x54]\n");\r
OpEnd(sea,dea);\r
\r
return 0;\r
OpStart(op,ea); Cycles=6;\r
if(ea >= 8) Cycles+=2;\r
\r
- EaCalcReadNoSE(10,0,ea,0,0x003f);\r
+ EaCalcReadNoSE(6,0,ea,0,0x003f);\r
\r
// this is rewrite of Musashi's code\r
ot(" ldr r2,[r7,#0x4c]\n");\r
- ot(" bic r9,r9,#0xb0000000 ;@ clear all flags, except Z\n");\r
+ ot(" bic r10,r10,#0xb0000000 ;@ clear all flags, except Z\n");\r
ot(" mov r0,r0,asl #24\n");\r
ot(" and r2,r2,#0x20000000\n");\r
ot(" add r2,r0,r2,lsr #5 ;@ add X\n");\r
ot(" addeq r11,r11,#0x10000000\n");\r
ot(" and r3,r3,r11,lsr #31 ;@ Undefined V behavior part II\n",op);\r
ot(" movs r1,r11,asr #24\n");\r
- ot(" bicne r9,r9,#0x40000000 ;@ Z\n");\r
- ot(" orr r9,r9,r3,lsl #28 ;@ save V\n",op);\r
- ot(" orr r9,r9,#0x20000000 ;@ C\n");\r
+ ot(" bicne r10,r10,#0x40000000 ;@ Z\n");\r
+ ot(" orr r10,r10,r3,lsl #28 ;@ save V\n",op);\r
+ ot(" orr r10,r10,#0x20000000 ;@ C\n");\r
ot("\n");\r
\r
- EaWrite(10, 1, ea,0,0x3f,0,0);\r
+ EaWrite(6, 1, ea,0,0x3f,0,0);\r
\r
ot("finish%.4x%s\n",op,ms?"":":");\r
ot(" tst r11,r11\n");\r
- ot(" orrmi r9,r9,#0x80000000 ;@ N\n");\r
- ot(" str r9,[r7,#0x4c] ;@ Save X\n");\r
+ ot(" orrmi r10,r10,#0x80000000 ;@ N\n");\r
+ ot(" str r10,[r7,#0x4c] ;@ Save X\n");\r
ot("\n");\r
\r
+ ot(" ldr r6,[r7,#0x54]\n");\r
OpEnd(ea);\r
\r
return 0;\r
//if (type == 1)\r
{\r
EaCalcReadNoSE(-1,0,sea,size,0x003f);\r
- EaCalcReadNoSE(type!=1?10:-1,11,dea,2,0x0e00);\r
+ EaCalcReadNoSE(type!=1?11:-1,1,dea,2,0x0e00);\r
}\r
#if 0\r
else\r
{\r
- EaCalcReadNoSE(type!=1?10:-1,11,dea,2,0x0e00);\r
+ EaCalcReadNoSE(type!=1?11:-1,1,dea,2,0x0e00);\r
EaCalcReadNoSE(-1,0,sea,size,0x003f);\r
}\r
#endif\r
if (size<2) ot(" mov r0,r0,asl #%d\n\n",size?16:24);\r
if (size<2) asr=(char *)(size?",asr #16":",asr #24");\r
\r
- if (type==0) ot(" sub r11,r11,r0%s\n",asr);\r
- if (type==1) ot(" cmp r11,r0%s ;@ Defines NZCV\n",asr);\r
+ if (type==0) ot(" sub r1,r1,r0%s\n",asr);\r
+ if (type==1) ot(" cmp r1,r0%s ;@ Defines NZCV\n",asr);\r
if (type==1) OpGetFlags(1,0); // Get Cmp flags\r
- if (type==2) ot(" add r11,r11,r0%s\n",asr);\r
+ if (type==2) ot(" add r1,r1,r0%s\n",asr);\r
ot("\n");\r
- \r
- if (type!=1) EaWrite(10, 11, dea,2,0x0e00);\r
+\r
+ if (type!=1) EaWrite(11, 1, dea,2,0x0e00);\r
\r
OpEnd(sea);\r
\r
if (EaCanRead(sea,size)==0) return 1;\r
if (EaCanWrite(dea)==0) return 1;\r
\r
- if(mem) { sea+=0x20; dea+=0x20; }\r
+ if (mem) { sea+=0x20; dea+=0x20; }\r
\r
use=op&~0x0e07; // Use same opcode for Dn\r
if (size==0&&sea==0x27) use|=0x0007; // ___x.b -(a7)\r
{\r
ot(";@ Get src/dest EA vals\n");\r
EaCalc (0,0x000f, sea,size,1);\r
- EaRead (0, 11, sea,size,0x000f,1);\r
- EaCalcReadNoSE(10,0,dea,size,0x0e00);\r
+ EaRead (0, 6, sea,size,0x000f,1);\r
+ EaCalcReadNoSE(11,0,dea,size,0x0e00);\r
}\r
else\r
{\r
ot(";@ Get src/dest reg vals\n");\r
- EaCalcReadNoSE(-1,11,sea,size,0x0007);\r
- EaCalcReadNoSE(10,0,dea,size,0x0e00);\r
- if (size<2) ot(" mov r11,r11,asl #%d\n\n",size?16:24);\r
+ EaCalcReadNoSE(-1,6,sea,size,0x0007);\r
+ EaCalcReadNoSE(11,0,dea,size,0x0e00);\r
+ if (size<2) ot(" mov r6,r6,asl #%d\n\n",size?16:24);\r
}\r
\r
if (size<2) asl=(char *)(size?",asl #16":",asl #24");\r
{\r
ot(";@ Make sure the carry bit will tip the balance:\n");\r
ot(" mvn r2,#0\n");\r
- ot(" orr r11,r11,r2,lsr #%i\n",(size==0)?8:16);\r
+ ot(" orr r6,r6,r2,lsr #%i\n",(size==0)?8:16);\r
ot("\n");\r
}\r
\r
- if (type==0) ot(" rscs r1,r11,r0%s\n",asl);\r
- if (type==1) ot(" adcs r1,r11,r0%s\n",asl);\r
- ot(" orr r3,r9,#0xb0000000 ;@ for old Z\n");\r
+ if (type==0) ot(" rscs r1,r6,r0%s\n",asl);\r
+ if (type==1) ot(" adcs r1,r6,r0%s\n",asl);\r
+ ot(" orr r3,r10,#0xb0000000 ;@ for old Z\n");\r
OpGetFlags(type==0,1,0); // subtract\r
if (size<2) {\r
ot(" movs r2,r1,lsr #%i\n", size?16:24);\r
- ot(" orreq r9,r9,#0x40000000 ;@ add potentially missed Z\n");\r
+ ot(" orreq r10,r10,#0x40000000 ;@ add potentially missed Z\n");\r
}\r
- ot(" andeq r9,r9,r3 ;@ fix Z\n");\r
+ ot(" andeq r10,r10,r3 ;@ fix Z\n");\r
ot("\n");\r
\r
ot(";@ Save result:\n");\r
- EaWrite(10, 1, dea,size,0x0e00,1);\r
+ EaWrite(11, 1, dea,size,0x0e00,1);\r
\r
+ ot(" ldr r6,[r7,#0x54]\n");\r
OpEnd(sea,dea);\r
\r
return 0;\r
if(size>=2) Cycles+=2;\r
}\r
\r
- ot(";@ Get EA into r10 and value into r0:\n");\r
- EaCalcReadNoSE(eor?10:-1,0,ea,size,0x003f);\r
+ ot(";@ Get EA into r11 and value into r0:\n");\r
+ EaCalcReadNoSE(eor?11:-1,0,ea,size,0x003f);\r
\r
ot(";@ Get register operand into r1:\n");\r
EaCalcReadNoSE(-1,1,rea,size,0x0e00);\r
OpGetFlags(eor==0,0); // Cmp like subtract\r
ot("\n");\r
\r
- if (eor) EaWrite(10, 1,ea,size,0x003f,1);\r
+ if (eor) EaWrite(11, 1,ea,size,0x003f,1);\r
\r
OpEnd(ea);\r
return 0;\r
\r
OpStart(op,sea); Cycles=4;\r
\r
- ot(";@ Get src operand into r10:\n");\r
+ ot(";@ Get src operand into r11:\n");\r
EaCalc (0,0x0007, sea,size,1);\r
- EaRead (0, 10, sea,size,0x0007,1);\r
+ EaRead (0, 11, sea,size,0x0007,1);\r
\r
ot(";@ Get dst operand into r0:\n");\r
EaCalcReadNoSE(-1,0,dea,size,0x0e00);\r
\r
if (size<2) asl=(char *)(size?",asl #16":",asl #24");\r
\r
- ot(" rsbs r0,r10,r0%s\n",asl);\r
+ ot(" rsbs r0,r11,r0%s\n",asl);\r
OpGetFlags(1,0); // Cmp like subtract\r
ot("\n");\r
\r
\r
OpStart(op,ea); Cycles=10;\r
\r
- ot(";@ Get EA into r10 and value into r0:\n");\r
+ ot(";@ Get value into r0:\n");\r
EaCalcReadNoSE(-1,0,ea,size,0x003f);\r
\r
ot(";@ Get register operand into r1:\n");\r
if (size<2) ot(" mov r1,r1,asl #%d\n\n",size?16:24);\r
\r
ot(";@ get flags, including undocumented ones\n");\r
- ot(" and r3,r9,#0x80000000\n");\r
+ ot(" and r3,r10,#0x80000000\n");\r
ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");\r
OpGetFlags(0,0);\r
\r
ot(" bmi chktrap%.4x\n",op);\r
\r
ot(";@ Do arithmetic:\n");\r
- ot(" bic r9,r9,#0x80000000 ;@ N\n");\r
+ ot(" bic r10,r10,#0x80000000 ;@ N\n");\r
ot(" cmp r1,r0\n");\r
ot(" bgt chktrap%.4x\n",op);\r
\r
ot(";@ old N remains\n");\r
- ot(" orr r9,r9,r3\n");\r
+ ot(" orr r10,r10,r3\n");\r
OpEnd(ea);\r
\r
ot("chktrap%.4x%s ;@ CHK exception:\n",op,ms?"":":");\r
OpRegToFlags(high);\r
}\r
\r
-// Pop PC - assumes r10=Memory Base - trashes r0-r3\r
+// Pop PC - assumes r11=Memory Base - trashes r0-r3\r
static void PopPc()\r
{\r
ot(";@ Pop PC:\n");\r
ot(" add r1,r0,#4 ;@ Postincrement A7\n");\r
ot(" str r1,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(0,2);\r
- ot(" add r0,r0,r10 ;@ Memory Base+PC\n");\r
+ ot(" add r0,r0,r11 ;@ Memory Base+PC\n");\r
ot("\n");\r
CheckPc();\r
#if EMULATE_ADDRESS_ERRORS_JUMP\r
\r
if(reg!=7) {\r
ot(";@ Get An\n");\r
- EaCalc(10, 7, 8, 2, 1);\r
- EaRead(10, 1, 8, 2, 7, 1);\r
+ EaCalc(11, 7, 8, 2, 1);\r
+ EaRead(11, 1, 8, 2, 7, 1);\r
}\r
\r
ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");\r
ot(" sub r0,r0,#4 ;@ A7-=4\n");\r
- ot(" mov r11,r0\n");\r
+ ot(" mov r8,r0 ;@ abuse r8\n");\r
if(reg==7) ot(" mov r1,r0\n");\r
ot("\n");\r
\r
\r
ot(";@ Save to An\n");\r
if(reg!=7)\r
- EaWrite(10,11, 8, 2, 7, 1);\r
+ EaWrite(11,8, 8, 2, 7, 1);\r
\r
ot(";@ Get offset:\n");\r
- EaCalc(0,0,0x3c,1);\r
+ EaCalc(0,0,0x3c,1); // abused r8 is ok because of imm EA\r
EaRead(0,0,0x3c,1,0);\r
\r
- ot(" add r11,r11,r0 ;@ Add offset to A7\n");\r
- ot(" str r11,[r7,#0x3c]\n");\r
+ ot(" add r8,r8,r0 ;@ Add offset to A7\n");\r
+ ot(" str r8,[r7,#0x3c]\n");\r
ot("\n");\r
\r
Cycles=16;\r
OpStart(op,0x10);\r
\r
ot(";@ Get An\n");\r
- EaCalc(10, 0xf, 8, 2, 1);\r
- EaRead(10, 0, 8, 2, 0xf, 1);\r
+ EaCalc(11, 0xf, 8, 2, 1);\r
+ EaRead(11, 0, 8, 2, 0xf, 1);\r
\r
- ot(" add r11,r0,#4 ;@ A7+=4\n");\r
+ ot(" add r8,r0,#4 ;@ A7+=4, abuse r8\n");\r
ot("\n");\r
ot(";@ Pop An from stack:\n");\r
MemHandler(0,2);\r
ot("\n");\r
- ot(" str r11,[r7,#0x3c] ;@ Save A7\n");\r
+ ot(" str r8,[r7,#0x3c] ;@ Save A7\n");\r
ot("\n");\r
ot(";@ An = value from stack:\n");\r
- EaWrite(10, 0, 8, 2, 7, 1);\r
+ EaWrite(11, 0, 8, 2, 7, 1);\r
\r
Cycles=12;\r
OpEnd(0x10);\r
case 3: // rte\r
OpStart(op,0x10,0,0,1); Cycles=20;\r
PopSr(1);\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");\r
PopPc();\r
ot(" ldr r1,[r7,#0x44] ;@ reload SR high\n");\r
SuperChange(op,1);\r
\r
case 5: // rts\r
OpStart(op,0x10); Cycles=16;\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");\r
PopPc();\r
#if EMULATE_ADDRESS_ERRORS_JUMP\r
ot(" tst r4,#1 ;@ address error?\n");\r
\r
case 6: // trapv\r
OpStart(op,0x10,0,1); Cycles=4;\r
- ot(" tst r9,#0x10000000\n");\r
+ ot(" tst r10,#0x10000000\n");\r
ot(" subne r5,r5,#%i\n",34);\r
ot(" movne r0,#7 ;@ TRAPV exception\n");\r
ot(" blne Exception\n");\r
case 7: // rtr\r
OpStart(op,0x10); Cycles=20;\r
PopSr(0);\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");\r
PopPc();\r
#if EMULATE_ADDRESS_ERRORS_JUMP\r
ot(" tst r4,#1 ;@ address error?\n");\r
\r
OpStart(op,(op&0x40)?0:0x10);\r
\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");\r
ot("\n");\r
- EaCalc(11,0x003f,sea,0);\r
+ EaCalc(12,0x003f,sea,0);\r
\r
- ot(";@ Jump - Get new PC from r11\n");\r
- ot(" add r0,r11,r10 ;@ Memory Base + New PC\n");\r
+ ot(";@ Jump - Get new PC from r12\n");\r
+ ot(" add r0,r12,r11 ;@ Memory Base + New PC\n");\r
ot("\n");\r
CheckPc();\r
if (!(op&0x40))\r
{\r
ot(" ldr r2,[r7,#0x3c]\n");\r
- ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");\r
+ ot(" sub r1,r4,r11 ;@ r1 = Old PC\n");\r
}\r
#if EMULATE_ADDRESS_ERRORS_JUMP\r
// jsr prefetches next instruction before pushing old PC,\r
case 1: // F\r
break;\r
case 2: // hi\r
- ot(" tst r9,#0x60000000 ;@ hi: !C && !Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ hi: !C && !Z\n");\r
ot(" beq DbraTrue\n\n");\r
break;\r
case 3: // ls\r
- ot(" tst r9,#0x60000000 ;@ ls: C || Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ ls: C || Z\n");\r
ot(" bne DbraTrue\n\n");\r
break;\r
default:\r
ot(";@ Is the condition true?\n");\r
- ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");\r
+ ot(" msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");\r
ot(";@ If so, don't dbra\n");\r
ot(" b%s DbraTrue\n\n",Cond[cc]);\r
break;\r
OpStart(op,size?0x10:0);\r
Cycles=10; // Assume branch taken\r
\r
- if (cc==1) ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
-\r
switch (cc)\r
{\r
case 0: // T\r
case 1: // F\r
break;\r
case 2: // hi\r
- ot(" tst r9,#0x60000000 ;@ hi: !C && !Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ hi: !C && !Z\n");\r
ot(" bne BccDontBranch%i\n\n",8<<size);\r
break;\r
case 3: // ls\r
- ot(" tst r9,#0x60000000 ;@ ls: C || Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ ls: C || Z\n");\r
ot(" beq BccDontBranch%i\n\n",8<<size);\r
break;\r
default:\r
ot(";@ Is the condition true?\n");\r
- ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");\r
+ ot(" msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");\r
ot(" b%s BccDontBranch%i\n\n",Cond[cc^1],8<<size);\r
break;\r
}\r
if (cc==1)\r
{\r
ot(";@ Bsr - remember old PC\n");\r
+ ot(" ldr r12,[r7,#0x60] ;@ Get Memory base\n");\r
ot(" ldr r2,[r7,#0x3c]\n");\r
- ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");\r
+ ot(" sub r1,r4,r12 ;@ r1 = Old PC\n");\r
if (size) ot(" add r1,r1,#%d\n",1<<size);\r
ot("\n");\r
ot(";@ Push r1 onto stack\n");\r
if(size>=2) Cycles+=2;\r
}\r
\r
- EaCalcReadNoSE(-1,10,sea,0,0x0e00);\r
+ EaCalcReadNoSE(-1,11,sea,0,0x0e00);\r
\r
- EaCalcReadNoSE((type>0)?11:-1,0,tea,size,0x003f);\r
+ EaCalcReadNoSE((type>0)?8:-1,0,tea,size,0x003f);\r
\r
- if (tea>=0x10)\r
- ot(" and r10,r10,#7 ;@ mem - do mod 8\n"); // size always 0\r
- else ot(" and r10,r10,#31 ;@ reg - do mod 32\n"); // size always 2\r
+ if (tea>=0x11)\r
+ ot(" and r11,r11,#7 ;@ mem - do mod 8\n"); // size always 0\r
+ else ot(" and r11,r11,#31 ;@ reg - do mod 32\n"); // size always 2\r
ot("\n");\r
\r
ot(" mov r1,#1\n");\r
- ot(" tst r0,r1,lsl r10 ;@ Do arithmetic\n");\r
- ot(" bicne r9,r9,#0x40000000\n");\r
- ot(" orreq r9,r9,#0x40000000 ;@ Get Z flag\n");\r
+ ot(" tst r0,r1,lsl r11 ;@ Do arithmetic\n");\r
+ ot(" bicne r10,r10,#0x40000000\n");\r
+ ot(" orreq r10,r10,#0x40000000 ;@ Get Z flag\n");\r
ot("\n");\r
\r
if (type>0)\r
{\r
- if (type==1) ot(" eor r1,r0,r1,lsl r10 ;@ Toggle bit\n");\r
- if (type==2) ot(" bic r1,r0,r1,lsl r10 ;@ Clear bit\n");\r
- if (type==3) ot(" orr r1,r0,r1,lsl r10 ;@ Set bit\n");\r
+ if (type==1) ot(" eor r1,r0,r1,lsl r11 ;@ Toggle bit\n");\r
+ if (type==2) ot(" bic r1,r0,r1,lsl r11 ;@ Clear bit\n");\r
+ if (type==3) ot(" orr r1,r0,r1,lsl r11 ;@ Set bit\n");\r
ot("\n");\r
- EaWrite(11, 1,tea,size,0x003f,0,0);\r
+ EaWrite(8,1,tea,size,0x003f,0,0);\r
}\r
OpEnd(tea);\r
\r
\r
ot("\n");\r
EaCalcReadNoSE(-1,0,sea,0,0);\r
- ot(" mov r10,#1\n");\r
- ot(" bic r9,r9,#0x40000000 ;@ Blank Z flag\n");\r
- if (tea>=0x10)\r
+ ot(" mov r11,#1\n");\r
+ ot(" bic r10,r10,#0x40000000 ;@ Blank Z flag\n");\r
+ if (tea>=0x11)\r
ot(" and r0,r0,#7 ;@ mem - do mod 8\n"); // size always 0\r
else ot(" and r0,r0,#0x1F ;@ reg - do mod 32\n"); // size always 2\r
- ot(" mov r10,r10,lsl r0 ;@ Make bit mask\n");\r
+ ot(" mov r11,r11,lsl r0 ;@ Make bit mask\n");\r
ot("\n");\r
\r
if(type==1||type==3) {\r
if(size>=2) Cycles+=2;\r
}\r
\r
- EaCalcReadNoSE((type>0)?11:-1,0,tea,size,0x003f);\r
- ot(" tst r0,r10 ;@ Do arithmetic\n");\r
- ot(" orreq r9,r9,#0x40000000 ;@ Get Z flag\n");\r
+ EaCalcReadNoSE((type>0)?8:-1,0,tea,size,0x003f);\r
+ ot(" tst r0,r11 ;@ Do arithmetic\n");\r
+ ot(" orreq r10,r10,#0x40000000 ;@ Get Z flag\n");\r
ot("\n");\r
\r
if (type>0)\r
{\r
- if (type==1) ot(" eor r1,r0,r10 ;@ Toggle bit\n");\r
- if (type==2) ot(" bic r1,r0,r10 ;@ Clear bit\n");\r
- if (type==3) ot(" orr r1,r0,r10 ;@ Set bit\n");\r
+ if (type==1) ot(" eor r1,r0,r11 ;@ Toggle bit\n");\r
+ if (type==2) ot(" bic r1,r0,r11 ;@ Clear bit\n");\r
+ if (type==3) ot(" orr r1,r0,r11 ;@ Set bit\n");\r
ot("\n");\r
- EaWrite(11, 1,tea,size,0x003f,0,0);\r
+ EaWrite(8, 1,tea,size,0x003f,0,0);\r
}\r
\r
OpEnd(sea,tea);\r
OpStart(op,ea); Cycles=size<2?4:6;\r
if(ea >= 0x10) Cycles*=2;\r
\r
- EaCalc (10,0x003f,ea,size,0,0);\r
+ EaCalc (11,0x003f,ea,size,0,0);\r
\r
- if (type!=1) EaRead (10,0,ea,size,0x003f,0,0); // Don't need to read for 'clr' (or do we, for a dummy read?)\r
+ if (type!=1) EaRead (11,0,ea,size,0x003f,0,0); // Don't need to read for 'clr' (or do we, for a dummy read?)\r
if (type==1) ot("\n");\r
\r
if (type==0)\r
GetXBit(1);\r
if(size!=2) ot(" mov r0,r0,asl #%i\n",size?16:24);\r
ot(" rscs r1,r0,#0 ;@ do arithmetic\n");\r
- ot(" orr r3,r9,#0xb0000000 ;@ for old Z\n");\r
+ ot(" orr r3,r10,#0xb0000000 ;@ for old Z\n");\r
OpGetFlags(1,1,0);\r
if(size!=2) {\r
ot(" movs r1,r1,asr #%i\n",size?16:24);\r
- ot(" orreq r9,r9,#0x40000000 ;@ possily missed Z\n");\r
+ ot(" orreq r10,r10,#0x40000000 ;@ possily missed Z\n");\r
}\r
- ot(" andeq r9,r9,r3 ;@ fix Z\n");\r
+ ot(" andeq r10,r10,r3 ;@ fix Z\n");\r
ot("\n");\r
}\r
\r
{\r
ot(";@ Clear:\n");\r
ot(" mov r1,#0\n");\r
- ot(" mov r9,#0x40000000 ;@ NZCV=0100\n");\r
+ ot(" mov r10,#0x40000000 ;@ NZCV=0100\n");\r
ot("\n");\r
}\r
\r
}\r
\r
if (type==1) eawrite_check_addrerr=1;\r
- EaWrite(10, 1,ea,size,0x003f,0,0);\r
+ EaWrite(11, 1,ea,size,0x003f,0,0);\r
\r
OpEnd(ea);\r
\r
\r
OpStart(op); Cycles=4;\r
\r
- EaCalc (10,0x0007,ea,2,1);\r
- EaRead (10, 0,ea,2,0x0007,1);\r
+ EaCalc (11,0x0007,ea,2,1);\r
+ EaRead (11, 0,ea,2,0x0007,1);\r
\r
ot(" mov r1,r0,ror #16\n");\r
ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");\r
OpGetFlags(0,0);\r
\r
- EaWrite(10, 1,8,2,0x0007,1);\r
+ EaWrite(11, 1,8,2,0x0007,1);\r
\r
OpEnd();\r
\r
EaRead ( 0, 0,sea,size,0x003f,1);\r
\r
ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n");\r
- ot(" mrs r9,cpsr ;@ r9=flags\n");\r
+ ot(" mrs r10,cpsr ;@ r10=flags\n");\r
ot("\n");\r
\r
OpEnd(sea);\r
\r
OpStart(op); Cycles=4;\r
\r
- EaCalc (10,0x0007,ea,size+1,0,0);\r
- EaRead (10, 0,ea,size+1,0x0007,0,0);\r
+ EaCalc (11,0x0007,ea,size+1,0,0);\r
+ EaRead (11, 0,ea,size+1,0x0007,0,0);\r
\r
ot(" mov r0,r0,asl #%d\n",shift);\r
ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n");\r
- ot(" mrs r9,cpsr ;@ r9=flags\n");\r
+ ot(" mrs r10,cpsr ;@ r10=flags\n");\r
ot(" mov r1,r0,asr #%d\n",shift);\r
ot("\n");\r
\r
- EaWrite(10, 1,ea,size+1,0x0007,0,0);\r
+ EaWrite(11, 1,ea,size+1,0x0007,0,0);\r
\r
OpEnd();\r
return 0;\r
case 1: // F\r
break;\r
case 2: // hi\r
- ot(" tst r9,#0x60000000 ;@ hi: !C && !Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ hi: !C && !Z\n");\r
ot(" mvneq r1,r1\n");\r
if (ea<8) ot(" subeq r5,r5,#2 ;@ Extra cycles\n");\r
break;\r
case 3: // ls\r
- ot(" tst r9,#0x60000000 ;@ ls: C || Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ ls: C || Z\n");\r
ot(" mvnne r1,r1\n");\r
if (ea<8) ot(" subne r5,r5,#2 ;@ Extra cycles\n");\r
break;\r
default:\r
ot(";@ Is the condition true?\n");\r
- ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");\r
+ ot(" msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");\r
ot(" mvn%s r1,r1\n",cond[cc]);\r
if (ea<8) ot(" sub%s r5,r5,#2 ;@ Extra cycles\n",cond[cc]);\r
break;\r
OpGetFlags(0,0);\r
if (usereg) { // store X only if count is not 0\r
ot(" cmp %s,#0 ;@ shifting by 0?\n",pct);\r
- ot(" biceq r9,r9,#0x20000000 ;@ if so, clear carry\n");\r
- ot(" strne r9,[r7,#0x4c] ;@ else Save X bit\n");\r
+ ot(" biceq r10,r10,#0x20000000 ;@ if so, clear carry\n");\r
+ ot(" strne r10,[r7,#0x4c] ;@ else Save X bit\n");\r
} else {\r
// count will never be 0 if we use immediate\r
- ot(" str r9,[r7,#0x4c] ;@ Save X bit\n");\r
+ ot(" str r10,[r7,#0x4c] ;@ Save X bit\n");\r
}\r
ot("\n");\r
\r
ot(";@ restore after right shift:\n");\r
ot(" movs r0,r0,lsl #%d\n",32-(8<<size));\r
if (type)\r
- ot(" orrmi r9,r9,#0x80000000 ;@ Potentially missed N flag\n");\r
+ ot(" orrmi r10,r10,#0x80000000 ;@ Potentially missed N flag\n");\r
ot("\n");\r
}\r
\r
ot(" cmpne r3,r1,asr %s\n", pct);\r
ot(" eoreq r1,r0,r3\n"); // above check doesn't catch (-1)<<(32+), so we need this\r
ot(" tsteq r1,#0x80000000\n");\r
- ot(" orrne r9,r9,#0x10000000\n");\r
+ ot(" orrne r10,r10,#0x10000000\n");\r
ot("\n");\r
}\r
}\r
int wide=8<<size;\r
\r
// Roxr\r
- if(count == 1) {\r
+ if(count == 1)\r
+ {\r
if(dir==0) {\r
if(size!=2) {\r
ot(" orr r0,r0,r0,lsr #%i\n", size?16:24);\r
OpGetFlags(0,1);\r
ot(" tst r3,#0x20000000\n");\r
ot(" orrne r0,r0,#0x%x\n", 1<<(32-wide));\r
- ot(" bicne r9,r9,#0x40000000 ;@ clear Z in case it got there\n");\r
+ ot(" bicne r10,r10,#0x40000000 ;@ clear Z in case it got there\n");\r
}\r
- ot(" bic r9,r9,#0x10000000 ;@ make suve V is clear\n");\r
+ ot(" bic r10,r10,#0x10000000 ;@ make suve V is clear\n");\r
return 0;\r
}\r
\r
if (shift) ot(" movs r0,r0,lsl #%d ;@ Shift up and get correct NC flags\n",shift);\r
OpGetFlags(0,!usereg);\r
if (usereg) { // store X only if count is not 0\r
- ot(" str r9,[r7,#0x4c] ;@ if not 0, Save X bit\n");\r
+ ot(" str r10,[r7,#0x4c] ;@ if not 0, Save X bit\n");\r
ot(" b nozerox%.4x\n",op);\r
ot("norotx_%.4x%s\n",op,ms?"":":");\r
ot(" ldr r2,[r7,#0x4c]\n");\r
ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n");\r
OpGetFlags(0,0);\r
ot(" and r2,r2,#0x20000000\n");\r
- ot(" orr r9,r9,r2 ;@ C = old_X\n");\r
+ ot(" orr r10,r10,r2 ;@ C = old_X\n");\r
ot("nozerox%.4x%s\n",op,ms?"":":");\r
}\r
\r
OpGetFlags(0,0);\r
if (dir)\r
{\r
- ot(" bic r9,r9,#0x30000000 ;@ clear CV\n");\r
+ ot(" bic r10,r10,#0x30000000 ;@ clear CV\n");\r
ot(";@ Get carry bit from bit 0:\n");\r
if (usereg)\r
{\r
}\r
else\r
ot(" tst r0,#1\n");\r
- ot(" orrne r9,r9,#0x20000000\n");\r
+ ot(" orrne r10,r10,#0x20000000\n");\r
}\r
ot("\n");\r
\r
\r
OpStart(op,ea,0,count<0); Cycles=size<2?6:8;\r
\r
- EaCalc(10,0x0007, ea,size,1);\r
- EaRead(10, 0, ea,size,0x0007,1);\r
+ EaCalc(11,0x0007, ea,size,1);\r
+ EaRead(11, 0, ea,size,0x0007,1);\r
\r
EmitAsr(op,type,dir,count, size,usereg);\r
\r
- EaWrite(10, 0, ea,size,0x0007,1);\r
+ EaWrite(11, 0, ea,size,0x0007,1);\r
\r
opend_op_changes_cycles = (count<0);\r
OpEnd(ea,0);\r
\r
OpStart(op,ea); Cycles=6; // EmitAsr() will add 2\r
\r
- EaCalc (10,0x003f,ea,size,1);\r
- EaRead (10, 0,ea,size,0x003f,1);\r
+ EaCalc (11,0x003f,ea,size,1);\r
+ EaRead (11, 0,ea,size,0x003f,1);\r
\r
EmitAsr(op,type,dir,1,size,0);\r
\r
- EaWrite(10, 0,ea,size,0x003f,1);\r
+ EaWrite(11, 0,ea,size,0x003f,1);\r
\r
OpEnd(ea);\r
return 0;\r
Cycles=4;\r
if(ea>=8) Cycles+=10;\r
\r
- EaCalc (10,0x003f,ea,0,1);\r
- EaRead (10, 1,ea,0,0x003f,1);\r
+ EaCalc (11,0x003f,ea,0,1);\r
+ EaRead (11, 1,ea,0,0x003f,1);\r
\r
ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");\r
OpGetFlags(0,0);\r
#endif\r
ot(" orr r1,r1,#0x80000000 ;@ set bit7\n");\r
\r
- EaWrite(10, 1,ea,0,0x003f,1);\r
+ EaWrite(11, 1,ea,0,0x003f,1);\r
#if CYCLONE_FOR_GENESIS\r
}\r
#endif\r
void OpFlagsToReg(int high)\r
{\r
ot(" ldr r0,[r7,#0x4c] ;@ X bit\n");\r
- ot(" mov r1,r9,lsr #28 ;@ ____NZCV\n");\r
+ ot(" mov r1,r10,lsr #28 ;@ ____NZCV\n");\r
ot(" eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");\r
ot(" tst r2,#1 ;@ 1 if C!=V\n");\r
ot(" eorne r1,r1,#3 ;@ ____NZVC\n");\r
ot(" tst r1,#1 ;@ 1 if C!=V\n");\r
ot(" eorne r0,r0,#3 ;@ ___XNZCV\n");\r
ot(" str r2,[r7,#0x4c] ;@ Store X bit\n");\r
- ot(" mov r9,r0,lsl #28 ;@ r9=NZCV...\n");\r
+ ot(" mov r10,r0,lsl #28 ;@ r10=NZCV...\n");\r
\r
if (high)\r
{\r
if (movea==0)\r
{\r
ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");\r
- ot(" mrs r9,cpsr ;@ r9=NZCV flags\n");\r
+ ot(" mrs r10,cpsr ;@ r10=NZCV flags\n");\r
ot("\n");\r
}\r
\r
eawrite_check_addrerr=1;\r
#if SPLIT_MOVEL_PD\r
if ((tea&0x38)==0x20 && size==2) { // -(An)\r
- EaCalc (10,0x0e00,tea,size,0,0);\r
+ EaCalc (8,0x0e00,tea,size,0,0);\r
ot(" mov r11,r1\n");\r
- ot(" add r0,r10,#2\n");\r
+ ot(" add r0,r8,#2\n");\r
EaWrite(0, 1,tea,1,0x0e00,0,0);\r
- EaWrite(10, 11,tea,1,0x0e00,1);\r
+ EaWrite(8, 11,tea,1,0x0e00,1);\r
}\r
else\r
#endif\r
\r
// note: old srh is already in r11 (done by OpStart)\r
if (type==0) {\r
- ot(" orr r9,r9,r0,lsl #28\n");\r
+ ot(" orr r10,r10,r0,lsl #28\n");\r
ot(" orr r2,r2,r0,lsl #25 ;@ X bit\n");\r
if (size!=0) {\r
ot(" orr r1,r11,r0,lsr #8\n");\r
}\r
}\r
if (type==1) {\r
- ot(" and r9,r9,r0,lsl #28\n");\r
+ ot(" and r10,r10,r0,lsl #28\n");\r
ot(" and r2,r2,r0,lsl #25 ;@ X bit\n");\r
if (size!=0)\r
ot(" and r1,r11,r0,lsr #8\n");\r
}\r
if (type==5) {\r
- ot(" eor r9,r9,r0,lsl #28\n");\r
+ ot(" eor r10,r10,r0,lsl #28\n");\r
ot(" eor r2,r2,r0,lsl #25 ;@ X bit\n");\r
if (size!=0) {\r
ot(" eor r1,r11,r0,lsr #8\n");\r
\r
OpStart(op,ea);\r
\r
- ot(" ldr r10,[r7,#0x3c]\n");\r
+ ot(" ldr r11,[r7,#0x3c]\n");\r
EaCalc (1,0x003f, ea,0);\r
ot("\n");\r
- ot(" sub r0,r10,#4 ;@ Predecrement A7\n");\r
+ ot(" sub r0,r11,#4 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
ot("\n");\r
MemHandler(1,2); // Write 32-bit\r
\r
OpStart(op,ea,0,1);\r
\r
+#if !MEMHANDLERS_NEED_PREV_PC\r
+ // must save PC, need a spare register\r
+ ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
+#endif\r
+#if !MEMHANDLERS_NEED_CYCLES\r
+ ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
+#endif\r
ot(" ldrh r11,[r4],#2 ;@ r11=register mask\n");\r
\r
- ot(";@ r10=Register Index*4:\n");\r
- if (decr) ot(" mov r10,#0x40 ;@ order reversed for -(An)\n");\r
- else ot(" mov r10,#-4\n");\r
+ ot(";@ r4=Register Index*4:\n");\r
+ if (decr) ot(" mov r4,#0x40 ;@ order reversed for -(An)\n");\r
+ else ot(" mov r4,#-4\n");\r
\r
ot("\n");\r
ot(";@ Get the address into r6:\n");\r
\r
ot("\n");\r
ot("Movemloop%.4x%s\n",op, ms?"":":");\r
- ot(" add r10,r10,#%d ;@ r10=Next Register\n",decr?-4:4);\r
+ ot(" add r4,r4,#%d ;@ r4=Next Register\n",decr?-4:4);\r
ot(" movs r11,r11,lsr #1\n");\r
ot(" bcc Movemloop%.4x\n",op);\r
ot("\n");\r
ot(" ;@ Copy memory to register:\n",1<<size);\r
earead_check_addrerr=0; // already checked\r
EaRead (6,0,ea,size,0x003f);\r
- ot(" str r0,[r7,r10] ;@ Save value into Dn/An\n");\r
+ ot(" str r0,[r7,r4] ;@ Save value into Dn/An\n");\r
}\r
else\r
{\r
ot(" ;@ Copy register to memory:\n",1<<size);\r
- ot(" ldr r1,[r7,r10] ;@ Load value from Dn/An\n");\r
+ ot(" ldr r1,[r7,r4] ;@ Load value from Dn/An\n");\r
#if SPLIT_MOVEL_PD\r
if (decr && size==2) { // -(An)\r
ot(" add r0,r6,#2\n");\r
EaWrite(0,1,ea,1,0x003f,0,0);\r
- ot(" ldr r1,[r7,r10] ;@ Load value from Dn/An\n");\r
+ ot(" ldr r1,[r7,r4] ;@ Load value from Dn/An\n");\r
ot(" mov r0,r6\n");\r
EaWrite(0,1,ea,1,0x003f,1);\r
}\r
}\r
\r
ot("NoRegs%.4x%s\n",op, ms?"":":");\r
- ot(" ldr r6,=CycloneJumpTab ;@ restore Opcode Jump table\n");\r
+ ot(" ldr r4,[r7,#0x40]\n");\r
+ ot(" ldr r6,[r7,#0x54] ;@ restore Opcode Jump table\n");\r
ot("\n");\r
\r
if(dir) { // er\r
\r
opend_op_changes_cycles = 1;\r
OpEnd(ea);\r
- ltorg();\r
ot("\n");\r
\r
return 0;\r
ot(" movs r0,r8,asl #24\n");\r
ot(" and r1,r8,#0x0e00\n");\r
ot(" mov r0,r0,asr #24 ;@ Sign extended Quick value\n");\r
- ot(" mrs r9,cpsr ;@ r9=NZ flags\n");\r
+ ot(" mrs r10,cpsr ;@ r10=NZ flags\n");\r
ot(" str r0,[r7,r1,lsr #7] ;@ Store into Dn\n");\r
ot("\n");\r
\r
\r
OpStart(op); Cycles=6;\r
\r
- ot(" and r10,r8,#0x0e00 ;@ Find T register\n");\r
- ot(" and r11,r8,#0x000f ;@ Find S register\n");\r
- if (type==0x48) ot(" orr r10,r10,#0x1000 ;@ T is an address register\n");\r
+ ot(" and r2,r8,#0x0e00 ;@ Find T register\n");\r
+ ot(" and r3,r8,#0x000f ;@ Find S register\n");\r
+ if (type==0x48) ot(" orr r2,r2,#0x1000 ;@ T is an address register\n");\r
ot("\n");\r
- ot(" ldr r0,[r7,r10,lsr #7] ;@ Get T\n");\r
- ot(" ldr r1,[r7,r11,lsl #2] ;@ Get S\n");\r
+ ot(" ldr r0,[r7,r2,lsr #7] ;@ Get T\n");\r
+ ot(" ldr r1,[r7,r3,lsl #2] ;@ Get S\n");\r
ot("\n");\r
- ot(" str r0,[r7,r11,lsl #2] ;@ T->S\n");\r
- ot(" str r1,[r7,r10,lsr #7] ;@ S->T\n"); \r
+ ot(" str r0,[r7,r3,lsl #2] ;@ T->S\n");\r
+ ot(" str r1,[r7,r2,lsr #7] ;@ S->T\n"); \r
ot("\n");\r
\r
OpEnd();\r
\r
OpStart(op,ea);\r
\r
- if(dir) { // reg to mem\r
+ if(dir) // reg to mem\r
+ {\r
EaCalcReadNoSE(-1,11,rea,size,0x0e00);\r
\r
- EaCalc(10,0x000f,ea,size);\r
+ EaCalc(8,0x000f,ea,size);\r
if(size==2) { // if operand is long\r
ot(" mov r1,r11,lsr #24 ;@ first byte\n");\r
- EaWrite(10,1,ea,0,0x000f); // store first byte\r
- ot(" add r0,r10,#%i\n",(aadd+=2));\r
+ EaWrite(8,1,ea,0,0x000f); // store first byte\r
+ ot(" add r0,r8,#%i\n",(aadd+=2));\r
ot(" mov r1,r11,lsr #16 ;@ second byte\n");\r
EaWrite(0,1,ea,0,0x000f); // store second byte\r
- ot(" add r0,r10,#%i\n",(aadd+=2));\r
+ ot(" add r0,r8,#%i\n",(aadd+=2));\r
} else {\r
- ot(" mov r0,r10\n");\r
+ ot(" mov r0,r8\n");\r
}\r
ot(" mov r1,r11,lsr #8 ;@ first or third byte\n");\r
EaWrite(0,1,ea,0,0x000f);\r
- ot(" add r0,r10,#%i\n",(aadd+=2));\r
+ ot(" add r0,r8,#%i\n",(aadd+=2));\r
ot(" and r1,r11,#0xff\n");\r
EaWrite(0,1,ea,0,0x000f);\r
- } else { // mem to reg\r
- EaCalc(10,0x000f,ea,size,1);\r
- EaRead(10,11,ea,0,0x000f,1); // read first byte\r
- ot(" add r0,r10,#2\n");\r
+ }\r
+ else // mem to reg\r
+ {\r
+ EaCalc(6,0x000f,ea,size,1);\r
+ EaRead(6,11,ea,0,0x000f,1); // read first byte\r
+ ot(" add r0,r6,#2\n");\r
EaRead(0,1,ea,0,0x000f,1); // read second byte\r
if(size==2) { // if operand is long\r
ot(" orr r11,r11,r1,lsr #8 ;@ second byte\n");\r
- ot(" add r0,r10,#4\n");\r
+ ot(" add r0,r6,#4\n");\r
EaRead(0,1,ea,0,0x000f,1);\r
ot(" orr r11,r11,r1,lsr #16 ;@ third byte\n");\r
- ot(" add r0,r10,#6\n");\r
+ ot(" add r0,r6,#6\n");\r
EaRead(0,1,ea,0,0x000f,1);\r
ot(" orr r1,r11,r1,lsr #24 ;@ fourth byte\n");\r
} else {\r
ot(" orr r1,r11,r1,lsr #8 ;@ second byte\n");\r
}\r
// store the result\r
- EaCalc(11,0x0e00,rea,size,1); // reg number -> r11\r
- EaWrite(11,1,rea,size,0x0e00,1);\r
+ EaCalc(0,0x0e00,rea,size,1);\r
+ EaWrite(0,1,rea,size,0x0e00,1);\r
+ ot(" ldr r6,[r7,#0x54]\n");\r
}\r
\r
Cycles=(size==2)?24:16;\r
Cycles = 132;\r
#if USE_RESET_CALLBACK\r
ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
- ot(" mov r1,r9,lsr #28\n");\r
+ ot(" mov r1,r10,lsr #28\n");\r
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
ot(" ldr r11,[r7,#0x90] ;@ ResetCallback\n");\r
ot(" tst r11,r11\n");\r
ot(" movne lr,pc\n");\r
ot(" bxne r11 ;@ call ResetCallback if it is defined\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");\r
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
ot("\n");\r
#endif\r
}\r
notaz.gp2x.de / picodrive.git / commitdiff