// -----------------------------------------------------------------\r
\r
\r
-#ifndef _ASM_CD_MEMORY_C\r
-void PicoMemResetCD(int r3)\r
-{\r
-}\r
-#endif\r
-\r
#ifndef _ASM_CD_MEMORY_C\r
static u32 m68k_reg_read16(u32 a)\r
{\r
//dprintf("s68k_regs w%2i: [%02x] %02x @ %06x", realsize, a, d, SekPcS68k);\r
\r
// TODO: review against Gens\r
+ // Warning: d might have upper bits set\r
switch (a) {\r
case 2:\r
return; // only m68k can change WP\r
PicoMemResetCD(d);\r
#endif\r
}\r
+#ifdef _ASM_CD_MEMORY_C\r
+ if ((d ^ dold) & 0x1d)\r
+ PicoMemResetCDdecode(d);\r
+#endif\r
if (!(dold & 4)) {\r
dprintf("wram mode 2M->1M");\r
wram_2M_to_1M(Pico_mcd->word_ram2M);\r
return;\r
case 0x31:\r
dprintf("s68k set int3 timer: %02x", d);\r
- Pico_mcd->m.timer_int3 = d << 16;\r
+ Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
break;\r
case 0x33: // IRQ mask\r
dprintf("s68k irq mask: %02x", d);\r
\r
// -----------------------------------------------------------------\r
\r
+//void PicoWriteS68k8_(u32 a,u8 d);\r
+//void PicoWriteS68k8__(u32 a,u8 d);\r
#ifdef _ASM_CD_MEMORY_C\r
void PicoWriteS68k8(u32 a,u8 d);\r
#else\r
#endif\r
\r
a&=0xffffff;\r
+#if 0\r
+ PicoWriteS68k8_(a, d);\r
+/* if ((a&0xfc0000)!=0x080000) {\r
+ PicoWriteS68k8_(a, d);\r
+ return;\r
+ }\r
+ printf("r3: %02x\n", Pico_mcd->s68k_regs[3]);\r
+ PicoWriteS68k8__(a,d);*/\r
+ return;\r
+#endif\r
\r
// prg RAM\r
if (a < 0x80000) {\r
a &= 0x1ff;\r
rdprintf("s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
if (a >= 0x58 && a < 0x68)\r
- gfx_cd_write(a&~1, (d<<8)|d);\r
+ gfx_cd_write16(a&~1, (d<<8)|d);\r
else s68k_reg_write8(a,d);\r
return;\r
}\r
a &= 0x1fe;\r
rdprintf("s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
if (a >= 0x58 && a < 0x68)\r
- gfx_cd_write(a, d);\r
+ gfx_cd_write16(a, d);\r
else {\r
if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
Pico_mcd->s68k_regs[0xf] = d;\r
a &= 0x1fe;\r
rdprintf("s68k_regs w32: [%02x] %08x @ %06x", a, d, SekPcS68k);\r
if (a >= 0x58 && a < 0x68) {\r
- gfx_cd_write(a, d>>16);\r
- gfx_cd_write(a+2, d&0xffff);\r
+ gfx_cd_write16(a, d>>16);\r
+ gfx_cd_write16(a+2, d&0xffff);\r
} else {\r
s68k_reg_write8(a, d>>24);\r
s68k_reg_write8(a+1,(d>>16)&0xff);\r
.endm
-@ the jumptables themselves
+@ the jumptables themselves.
m_m68k_read8_table: mk_m68k_jump_table read 8
m_m68k_read16_table: mk_m68k_jump_table read 16
m_m68k_read32_table: mk_m68k_jump_table read 32
m_s68k_write16_table: mk_s68k_jump_table write 16
m_s68k_write32_table: mk_s68k_jump_table write 32
+m_s68k_decode_write_table:
+ .long m_s68k_write8_2M_decode_b0_m0
+ .long m_s68k_write16_2M_decode_b0_m0
+ .long m_s68k_write32_2M_decode_b0_m0
+ .long m_s68k_write8_2M_decode_b0_m1
+ .long m_s68k_write16_2M_decode_b0_m1
+ .long m_s68k_write32_2M_decode_b0_m1
+ .long m_s68k_write8_2M_decode_b0_m2
+ .long m_s68k_write16_2M_decode_b0_m2
+ .long m_s68k_write32_2M_decode_b0_m2
+ .long m_s68k_write8_2M_decode_b1_m0
+ .long m_s68k_write16_2M_decode_b1_m0
+ .long m_s68k_write32_2M_decode_b1_m0
+ .long m_s68k_write8_2M_decode_b1_m1
+ .long m_s68k_write16_2M_decode_b1_m1
+ .long m_s68k_write32_2M_decode_b1_m1
+ .long m_s68k_write8_2M_decode_b1_m2
+ .long m_s68k_write16_2M_decode_b1_m2
+ .long m_s68k_write32_2M_decode_b1_m2
+
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
.align 4
.global PicoMemResetCD
+.global PicoMemResetCDdecode
.global PicoReadM68k8
.global PicoReadM68k16
.global PicoReadM68k32
ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b0
str r2, [r1, #16*4]
str r3, [r1, #17*4]
- ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1
ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b1
+.ifeqs "\on", "read"
+ ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1
str r2, [r12,#4*4]
str r2, [r12,#5*4]
+.endif
str r3, [r12,#6*4]
b 9f @ pmr_8_done
ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b1
str r2, [r1, #16*4]
str r3, [r1, #17*4]
- ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0
ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b0
+.ifeqs "\on", "read"
+ ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0
str r2, [r12,#4*4]
str r2, [r12,#5*4]
+.endif
str r3, [r12,#6*4]
9: @ pmr_8_done:
bx lr
+PicoMemResetCDdecode: @r3
+ ldr r1, =m_s68k_write8_table
+ ldr r3, =m_s68k_decode_write_table
+ and r2, r0, #0x18
+ mov r2, r2, lsr #3
+ cmp r2, #3
+ moveq r2, #2 @ mode3 is same as mode2?
+ tst r0, #1
+ addeq r2, r2, #3 @ bank1 (r2=0..5)
+ add r2, r2, r2, lsl #1 @ *= 3
+ add r2, r3, r2, lsl #2
+ ldmia r2, {r0,r3,r12}
+ str r0, [r1, #4*4]
+ str r0, [r1, #5*4]
+ str r3, [r1, #4*4+8*4]
+ str r3, [r1, #5*4+8*4]
+ str r12,[r1, #4*4+8*4*2]
+ str r12,[r1, #5*4+8*4*2]
+ bx lr
+
+
.pool
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
bx lr
.endm
+.macro m_s68k_write8_2M_decode map_addr
+ ldr r2, =(Pico+0x22200)
+ eor r0, r0, #2
+ ldr r2, [r2]
+ movs r0, r0, lsr #1 @ +4-6 <<16
+ add r2, r2, #\map_addr @ map to our address
+.endm
+
+.macro m_s68k_write8_2M_decode_m0 map_addr @ mode off
+ m_s68k_write8_2M_decode \map_addr
+ ldrb r0, [r2, r0]!
+ and r1, r1, #0x0f
+ movcc r1, r1, lsl #4
+ andcc r3, r0, #0x0f
+ andcs r3, r0, #0xf0
+ orr r3, r3, r1
+ cmp r0, r3 @ avoid writing if result is same
+ strneb r3, [r2]
+ bx lr
+.endm
+
+.macro m_s68k_write8_2M_decode_m1 map_addr @ mode underwrite
+ ands r1, r1, #0x0f
+ bxeq lr
+ m_s68k_write8_2M_decode \map_addr
+ ldrb r0, [r2, r0]!
+ movcc r1, r1, lsl #4
+ andcc r3, r0, #0x0f
+ andcs r3, r0, #0xf0
+ tst r3, r3
+ bxeq lr
+ orr r3, r3, r1
+ cmp r0, r3
+ strneb r3, [r2]
+ bx lr
+.endm
+
+.macro m_s68k_write8_2M_decode_m2 map_addr @ mode overwrite
+ ands r1, r1, #0x0f
+ bxeq lr
+ m_s68k_write8_2M_decode_m0 \map_addr @ same as in off mode
+.endm
+
+
m_s68k_write8_prg: @ 0x000000 - 0x07ffff
m_s68k_write8_wordram_2M: @ 0x080000 - 0x0bffff
m_s68k_write8_ram 0x020000
-m_s68k_write8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
-m_s68k_write8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
- bx lr @ TODO
+m_s68k_write8_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
+ m_s68k_write8_2M_decode_m0 0x080000
+
+m_s68k_write8_2M_decode_b0_m1:
+ m_s68k_write8_2M_decode_m1 0x080000
+
+m_s68k_write8_2M_decode_b0_m2:
+ m_s68k_write8_2M_decode_m2 0x080000
+
+m_s68k_write8_2M_decode_b1_m0:
+ m_s68k_write8_2M_decode_m0 0x0a0000
+
+m_s68k_write8_2M_decode_b1_m1:
+ m_s68k_write8_2M_decode_m1 0x0a0000
+
+m_s68k_write8_2M_decode_b1_m2:
+ m_s68k_write8_2M_decode_m2 0x0a0000
m_s68k_write8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
bx lr
.endm
+.macro m_s68k_write16_2M_decode map_addr
+ ldr r2, =(Pico+0x22200)
+ eor r0, r0, #2
+ ldr r2, [r2]
+ mov r0, r0, lsr #1 @ +4-6 <<16
+ add r2, r2, #\map_addr @ map to our address
+.endm
+
+.macro m_s68k_write16_2M_decode_m0 map_addr @ mode off
+ m_s68k_write16_2M_decode \map_addr
+ bic r1, r1, #0xf0
+ orr r1, r1, r1, lsr #4
+ strb r1, [r2, r0]
+ bx lr
+.endm
+
+.macro m_s68k_write16_2M_decode_m1 map_addr @ mode underwrite
+ bics r1, r1, #0xf000
+ bicnes r1, r1, #0x00f0
+ bxeq lr
+ orr r1, r1, r1, lsr #4
+ m_s68k_write16_2M_decode \map_addr
+ ldrb r0, [r2, r0]!
+ and r3, r1, #0x0f
+ and r1, r1, #0xf0
+ tst r0, #0x0f
+ orreq r0, r0, r3
+ tst r0, #0xf0
+ orreq r0, r0, r1
+ strb r0, [r2]
+ bx lr
+.endm
+
+.macro m_s68k_write16_2M_decode_m2 map_addr @ mode overwrite
+ bics r1, r1, #0xf000
+ bicnes r1, r1, #0x00f0
+ bxeq lr
+ orr r1, r1, r1, lsr #4
+ m_s68k_write16_2M_decode \map_addr
+ ldrb r0, [r2, r0]!
+ ands r3, r1, #0x0f
+ andne r0, r0, #0xf0
+ orrne r0, r0, r3
+ ands r1, r1, #0xf0
+ andne r0, r0, #0x0f
+ orrne r0, r0, r1
+ strb r0, [r2]
+ bx lr
+.endm
+
+
m_s68k_write16_prg: @ 0x000000 - 0x07ffff
m_s68k_write16_wordram_2M: @ 0x080000 - 0x0bffff
m_s68k_write16_ram 0x020000
-m_s68k_write16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
-m_s68k_write16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
- bx lr @ TODO
+m_s68k_write16_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
+ m_s68k_write16_2M_decode_m0 0x080000
+
+m_s68k_write16_2M_decode_b0_m1:
+ m_s68k_write16_2M_decode_m1 0x080000
+
+m_s68k_write16_2M_decode_b0_m2:
+ m_s68k_write16_2M_decode_m2 0x080000
+
+m_s68k_write16_2M_decode_b1_m0:
+ m_s68k_write16_2M_decode_m0 0x0a0000
+
+m_s68k_write16_2M_decode_b1_m1:
+ m_s68k_write16_2M_decode_m1 0x0a0000
+
+m_s68k_write16_2M_decode_b1_m2:
+ m_s68k_write16_2M_decode_m2 0x0a0000
m_s68k_write16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
ldr r2, [r2]
add r0, r0, #0x00000f
strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d;
- bxeq lr
+ bx lr
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
bx lr
.endm
+.macro m_s68k_write32_2M_decode map_addr
+ ldr r2, =(Pico+0x22200)
+ eor r0, r0, #2
+ ldr r2, [r2]
+ mov r0, r0, lsr #1 @ +4-6 <<16
+ add r2, r2, #\map_addr @ map to our address
+.endm
+
+.macro m_s68k_write32_2M_decode_m0 map_addr @ mode off
+ m_s68k_write32_2M_decode \map_addr
+ bic r1, r1, #0x000000f0
+ bic r1, r1, #0x00f00000
+ orr r1, r1, r1, lsr #4
+ mov r3, r1, lsr #16
+ strb r3, [r2, r0]!
+ tst r0, #1
+ strneb r1, [r2, #-1]
+ streqb r1, [r2, #3]
+ bx lr
+.endm
+
+.macro m_s68k_write32_2M_decode_m1 map_addr @ mode underwrite
+ bics r1, r1, #0x000000f0
+ bicnes r1, r1, #0x0000f000
+ bicnes r1, r1, #0x00f00000
+ bicnes r1, r1, #0xf0000000
+ bxeq lr
+ orr r1, r1, r1, lsr #4
+ m_s68k_write32_2M_decode \map_addr
+ ldrb r3, [r2, r0]!
+ tst r0, #1
+ ldrneb r0, [r2, #-1]
+ ldreqb r0, [r2, #3]
+ and r12,r1, #0x0000000f
+ orr r0, r0, r3, lsl #16
+ orrne r0, r0, #0x80000000 @ remember addr lsb bit
+ tst r0, #0x0000000f
+ orreq r0, r0, r12
+ tst r0, #0x000000f0
+ andeq r12,r1, #0x000000f0
+ orreq r0, r0, r12
+ tst r0, #0x000f0000
+ andeq r12,r1, #0x000f0000
+ orreq r0, r0, r12
+ tst r0, #0x00f00000
+ andeq r12,r1, #0x00f00000
+ orreq r0, r0, r12
+ tst r0, #0x80000000
+ strneb r0, [r2, #-1]
+ streqb r0, [r2, #3]
+ mov r0, r0, lsr #16
+ strb r0, [r2]
+ bx lr
+.endm
+
+.macro m_s68k_write32_2M_decode_m2 map_addr @ mode overwrite
+ bics r1, r1, #0x000000f0
+ bicnes r1, r1, #0x0000f000
+ bicnes r1, r1, #0x00f00000
+ bicnes r1, r1, #0xf0000000
+ bxeq lr
+ orr r1, r1, r1, lsr #4
+ m_s68k_write32_2M_decode \map_addr
+ ldrb r3, [r2, r0]!
+ tst r0, #1
+ ldrneb r0, [r2, #-1]
+ ldreqb r0, [r2, #3]
+ orrne r1, r1, #0x80000000 @ remember addr lsb bit
+ orr r0, r0, r3, lsl #16
+ tst r1, #0x0000000f
+ andeq r12,r0, #0x0000000f
+ orreq r1, r1, r12
+ tst r1, #0x000000f0
+ andeq r12,r0, #0x000000f0
+ orreq r1, r1, r12
+ tst r1, #0x000f0000
+ andeq r12,r0, #0x000f0000
+ orreq r1, r1, r12
+ tst r1, #0x00f00000
+ andeq r12,r0, #0x00f00000
+ orreq r1, r1, r12
+ cmp r0, r1
+ bxeq lr
+ tst r1, #0x80000000
+ strneb r1, [r2, #-1]
+ streqb r1, [r2, #3]
+ mov r1, r1, lsr #16
+ strb r1, [r2]
+ bx lr
+.endm
+
+
m_s68k_write32_prg: @ 0x000000 - 0x07ffff
m_s68k_write32_wordram_2M: @ 0x080000 - 0x0bffff
m_s68k_write32_ram 0x020000
-m_s68k_write32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
-m_s68k_write32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
- bx lr @ TODO
+m_s68k_write32_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
+ m_s68k_write32_2M_decode_m0 0x080000
+
+m_s68k_write32_2M_decode_b0_m1:
+ m_s68k_write32_2M_decode_m1 0x080000
+
+m_s68k_write32_2M_decode_b0_m2:
+ m_s68k_write32_2M_decode_m2 0x080000
+
+m_s68k_write32_2M_decode_b1_m0:
+ m_s68k_write32_2M_decode_m0 0x0a0000
+
+m_s68k_write32_2M_decode_b1_m1:
+ m_s68k_write32_2M_decode_m1 0x0a0000
+
+m_s68k_write32_2M_decode_b1_m2:
+ m_s68k_write32_2M_decode_m2 0x0a0000
m_s68k_write32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)