core, another fix for z80 reset

diff --git a/cpu/DrZ80/drz80.S b/cpu/DrZ80/drz80.S
index 37e6e88..f047664 100644 (file)
--- a/cpu/DrZ80/drz80.S
+++ b/cpu/DrZ80/drz80.S
@@ -827,6 +827,7 @@ z80_xmap_rebase_sp:
        mov r0,z80sp\r
        readmem16\r
        add z80sp,z80sp,#2\r
+       bic z80sp,z80sp,#1<<16\r
 .endif\r
 .endm\r
 \r
@@ -856,7 +857,7 @@ z80_xmap_rebase_sp:
 .else\r
     mov r0,\reg\r
        subs z80sp,z80sp,#2\r
-       @ addcc z80sp,z80sp,#1<<16\r
+       addcc z80sp,z80sp,#1<<16\r
        mov r1,z80sp\r
        writemem16\r
 .endif\r
@@ -874,7 +875,7 @@ z80_xmap_rebase_sp:
 .else\r
        mov r0,\reg,lsr #16\r
        subs z80sp,z80sp,#2\r
-       @ addcc z80sp,z80sp,#1<<16\r
+       addcc z80sp,z80sp,#1<<16\r
        mov r1,z80sp\r
        writemem16\r
 .endif\r
@@ -1506,7 +1507,7 @@ DoInterrupt_mode0:
        strb r0,[z80sp,#-1]!\r
 .else\r
        subs z80sp,z80sp,#2\r
-       @ addcc z80sp,z80sp,#1<<16\r
+       addcc z80sp,z80sp,#1<<16\r
        mov r1,z80sp\r
        writemem16\r
        ldr r2,[cpucontext, #z80irqvector]\r
@@ -4732,6 +4733,9 @@ opcode_3_2:
 ;@INC SP\r
 opcode_3_3:\r
        add z80sp,z80sp,#1\r
+.if !FAST_Z80SP\r
+       bic z80sp,z80sp,#1<<16\r
+.endif\r
        fetch 6\r
 ;@INC (HL)\r
 opcode_3_4:\r
@@ -4782,7 +4786,10 @@ opcode_3_A:
        fetch 13\r
 ;@DEC SP\r
 opcode_3_B:\r
-       sub z80sp,z80sp,#1\r
+       subs z80sp,z80sp,#1\r
+.if !FAST_Z80SP\r
+       addcc z80sp,z80sp,#1<<16\r
+.endif\r
        fetch 6\r
 ;@INC A\r
 opcode_3_C:\r
@@ -5745,6 +5752,7 @@ opcode_F_1:
        mov r0,z80sp\r
        readmem16\r
        add z80sp,z80sp,#2\r
+       bic z80sp,z80sp,#1<<16\r
        and z80a,r0,#0xFF00\r
        mov z80a,z80a,lsl#16\r
        and z80f,r0,#0xFF\r
@@ -7638,6 +7646,7 @@ opcode_DD_E1:
        readmem16\r
        ldmfd sp!,{r2,z80xx}\r
        add z80sp,z80sp,#2\r
+       bic z80sp,z80sp,#1<<16\r
 .endif\r
        strh r0,[z80xx,#2]\r
        fetch 14\r

diff --git a/cpu/cz80/cz80.c b/cpu/cz80/cz80.c
index 9035601..888478e 100644 (file)
--- a/cpu/cz80/cz80.c
+++ b/cpu/cz80/cz80.c
@@ -212,8 +212,6 @@ void Cz80_Reset(cz80_struc *CPU)
 {\r
        // I, R, CPU and interrupts logic is reset, registers are untouched\r
        memset(&CPU->R, 0, (FPTR)&CPU->BasePC - (FPTR)&CPU->R);\r
-       Cz80_Set_Reg(CPU, CZ80_FA, 0xffff);\r
-       Cz80_Set_Reg(CPU, CZ80_SP, 0xffff);\r
        Cz80_Set_Reg(CPU, CZ80_PC, 0);\r
 }\r
 \r

diff --git a/pico/z80if.c b/pico/z80if.c
index 35710cb..4df40da 100644 (file)
--- a/pico/z80if.c
+++ b/pico/z80if.c
@@ -112,14 +112,7 @@ void z80_reset(void)
   drZ80.Z80IF = 0;
   drZ80.z80irqvector = 0xff0000; // RST 38h
   drZ80.Z80PC_BASE = drZ80.Z80PC = z80_read_map[0] << 1;
-  drZ80.Z80SP = 0xffff;
-  drZ80.Z80F = 0xff;
-  drZ80.Z80A = 0xff << 24;
   // others not changed, undefined on cold boot
-/*
-  drZ80.Z80IX = 0xFFFF << 16;
-  drZ80.Z80IY = 0xFFFF << 16;
-*/
 #ifdef FAST_Z80SP
   // drZ80 is locked in single bank
   drz80_sp_base = (PicoIn.AHW & PAHW_SMS) ? 0xc000 : 0x0000;