memset(&Pico.m,0,sizeof(Pico.m));\r
memset(&Pico.t,0,sizeof(Pico.t));\r
\r
- Pico.video.pending_ints=0;\r
z80_reset();\r
\r
// my MD1 VA6 console has this in IO\r
PicoMem.ioports[1] = PicoMem.ioports[2] = PicoMem.ioports[3] = 0xff;\r
\r
- // default VDP register values (based on Fusion)\r
- Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
- Pico.video.reg[0xc] = 0x81;\r
- Pico.video.reg[0xf] = 0x02;\r
- PicoVideoFIFOMode(0, 1);\r
-\r
if (PicoIn.AHW & PAHW_MCD)\r
PicoPowerMCD();\r
\r
// s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
SekSetRealTAS(PicoIn.AHW & PAHW_MCD);\r
\r
- Pico.m.dirtyPal = 1;\r
-\r
Pico.m.z80_bank68k = 0;\r
Pico.m.z80_reset = 1;\r
\r
PicoDetectRegion();\r
- Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
- Pico.video.hint_irq = (PicoIn.AHW & PAHW_PICO ? 5 : 4);\r
+\r
+ PicoVideoReset();\r
\r
PsndReset(); // pal must be known here\r
\r
// create an empty "dma" to cause 68k exec start at random frame location\r
Pico.t.m68c_line_start = Pico.t.m68c_aim;\r
- PicoDrawBgcDMA(NULL, 0, 0, 0, 0);\r
PicoVideoFIFOWrite(rand() & 0x1fff, 0, 0, PVS_CPURD);\r
\r
SekFinishIdleDet();\r
void PicoVideoFIFOMode(int active, int h40);\r
int PicoVideoFIFOWrite(int count, int byte_p, unsigned sr_mask, unsigned sr_flags);\r
void PicoVideoInit(void);\r
+void PicoVideoReset(void);\r
void PicoVideoSync(int skip);\r
void PicoVideoSave(void);\r
void PicoVideoLoad(void);\r
default:\r
return;\r
}\r
- SATaddr = ((pvid->reg[5]&0x7f) << 9) | ((pvid->reg[6]&0x20) << 11);\r
- SATmask = ~0x1ff;\r
- if (pvid->reg[12]&1)\r
- SATaddr &= ~0x200, SATmask &= ~0x200; // H40, zero lowest SAT bit\r
- //elprintf(EL_STATUS, "spritep moved to %04x", SATaddr);\r
+ if (Pico.est.rendstatus & PDRAW_DIRTY_SPRITES) {\r
+ SATaddr = ((pvid->reg[5]&0x7f) << 9) | ((pvid->reg[6]&0x20) << 11);\r
+ SATmask = ~0x1ff;\r
+ if (pvid->reg[12]&1)\r
+ SATaddr &= ~0x200, SATmask &= ~0x200; // H40, zero lowest SAT bit\r
+ //elprintf(EL_STATUS, "spritep moved to %04x", SATaddr);\r
+ }\r
return;\r
\r
update_irq:\r
return d;\r
}\r
\r
+void PicoVideoReset(void)\r
+{\r
+ Pico.video.hint_irq = (PicoIn.AHW & PAHW_PICO ? 5 : 4);\r
+ Pico.video.pending_ints=0;\r
+\r
+ // default VDP register values (based on Fusion)\r
+ Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
+ Pico.video.reg[0xc] = 0x81;\r
+ Pico.video.reg[0xf] = 0x02;\r
+ SATaddr = 0x0000;\r
+ SATmask = ~0x1ff;\r
+\r
+ memset(VdpSATCache, 0, sizeof(VdpSATCache));\r
+ memset(&VdpFIFO, 0, sizeof(VdpFIFO));\r
+ Pico.m.dirtyPal = 1;\r
+\r
+ Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
+\r
+ PicoDrawBgcDMA(NULL, 0, 0, 0, 0);\r
+ PicoVideoFIFOMode(0, 1);\r
+}\r
+\r
void PicoVideoCacheSAT(int load)\r
{\r
struct PicoVideo *pv = &Pico.video;\r