core z80, improve save/load (cycles)

diff --git a/pico/state.c b/pico/state.c
index bd801b1..957c43c 100644 (file)
--- a/pico/state.c
+++ b/pico/state.c
@@ -599,8 +599,6 @@ readend:
 \r
   z80_unpack(buff_z80);\r
 \r
-  // due to dep from 68k cycles..\r
-  Pico.t.m68c_frame_start = Pico.t.m68c_aim;\r
   if (PicoIn.AHW & PAHW_32X)\r
     Pico32xStateLoaded(0);\r
   if (PicoIn.AHW & PAHW_MCD)\r

diff --git a/pico/z80if.c b/pico/z80if.c
index 558607c..b8f1320 100644 (file)
--- a/pico/z80if.c
+++ b/pico/z80if.c
@@ -157,7 +157,8 @@ struct z80_state {
   u8 im;            // irq mode
   u8 irq_pending;   // irq line level, 1 if active
   u8 irq_vector[3]; // up to 3 byte vector for irq mode0 handling
-  u8 reserved[8];
+  u16 cyc;
+  u8 reserved[6];
 };
 
 void z80_pack(void *data)
@@ -165,6 +166,7 @@ void z80_pack(void *data)
   struct z80_state *s = data;
   memset(data, 0, Z80_STATE_SIZE);
   memcpy(s->magic, "Z80a", 4);
+  s->cyc = Pico.t.z80c_cnt;
 #if defined(_USE_DRZ80)
   #define DRR8(n)   (drZ80.Z80##n >> 24)
   #define DRR16(n)  (drZ80.Z80##n >> 16)
@@ -222,6 +224,7 @@ int z80_unpack(const void *data)
     elprintf(EL_STATUS, "legacy z80 state - ignored");
     return 0;
   }
+  Pico.t.z80c_cnt = s->cyc;
 
 #if defined(_USE_DRZ80)
   #define DRW8(n, v)       drZ80.Z80##n = (u32)(v) << 24