}
// Run scanline:
+ line_base_cycles = SekCyclesDone();
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
CPUS_RUN(CYCLES_M68K_LINE);
// there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
// also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
// also delay between last H-int and V-int (Golden Axe 3)
+ line_base_cycles = SekCyclesDone();
CPUS_RUN(CYCLES_M68K_VINT_LAG);
if (pv->reg[1]&0x20) {
PAD_DELAY();
// Run scanline:
+ line_base_cycles = SekCyclesDone();
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
CPUS_RUN(CYCLES_M68K_LINE);
#include "pico_int.h"\r
#include "cd/gfx_cd.h"\r
\r
+int line_base_cycles;\r
extern const unsigned char hcounts_32[];\r
extern const unsigned char hcounts_40[];\r
\r
return;\r
}\r
\r
- if (num == 1 && !(d&0x40) && SekCyclesLeft > 390) blank_on = 1;\r
+ if (num == 1 && !(d&0x40) && SekCyclesDone() - line_base_cycles <= 488-390)\r
+ blank_on = 1;\r
DrawSync(blank_on);\r
pvid->reg[num]=(unsigned char)d;\r
switch (num)\r
unsigned int d;\r
d=pv->status;\r
//if (PicoOpt&POPT_ALT_RENDERER) d|=0x0020; // sprite collision (Shadow of the Beast)\r
- if (SekCyclesLeft < 84+4) d|=0x0004; // H-Blank (Sonic3 vs)\r
+ if (SekCyclesDone() - line_base_cycles >= 488-88)\r
+ d|=0x0004; // H-Blank (Sonic3 vs)\r
\r
d |= ((pv->reg[1]&0x40)^0x40) >> 3; // set V-Blank if display is disabled\r
d |= (pv->pending_ints&0x20)<<2; // V-int pending?\r
if ((a&0x1c)==0x08)\r
{\r
unsigned int d;\r
- int lineCycles;\r
\r
- lineCycles = (488-SekCyclesLeft)&0x1ff;\r
+ d = (SekCyclesDone() - line_base_cycles) & 0x1ff; // FIXME\r
if (Pico.video.reg[12]&1)\r
- d = hcounts_40[lineCycles];\r
- else d = hcounts_32[lineCycles];\r
+ d = hcounts_40[d];\r
+ else d = hcounts_32[d];\r
\r
elprintf(EL_HVCNT, "hv: %02x %02x (%i) @ %06x", d, Pico.video.v_counter, SekCyclesDone(), SekPc);\r
return d | (Pico.video.v_counter << 8);\r
//if (PicoOpt&POPT_ALT_RENDERER) d|=0x0020; // sprite collision (Shadow of the Beast)\r
d |= ((Pico.video.reg[1]&0x40)^0x40) >> 3; // set V-Blank if display is disabled\r
d |= (Pico.video.pending_ints&0x20)<<2; // V-int pending?\r
- if (SekCyclesLeft < 84+4) d |= 4; // H-Blank\r
+ if (SekCyclesDone() - line_base_cycles >= 488-88) d |= 4; // H-Blank\r
Pico.video.pending = 0;\r
elprintf(EL_SR, "SR read (l): %02x @ %06x", d, SekPc);\r
return d;\r
elprintf(EL_HVCNT, "vcounter: %02x (%i) @ %06x", Pico.video.v_counter, SekCyclesDone(), SekPc);\r
return Pico.video.v_counter;\r
case 9:\r
- d = (488-SekCyclesLeft)&0x1ff;\r
+ d = (SekCyclesDone() - line_base_cycles) & 0x1ff; // FIXME\r
if (Pico.video.reg[12]&1)\r
d = hcounts_40[d];\r
else d = hcounts_32[d];\r