Pico_mcd->m.m68k_poll_cnt = 0;
#ifdef USE_POLL_DETECT
- if (Pico_mcd->m.m68k_poll_cnt >= 16) {
+ if (Pico_mcd->m.m68k_poll_cnt >= 32) {
int s68k_left;
// main CPU is polling, (wake and) run sub only
if (SekIsStoppedS68k())
static void remap_word_ram(u32 r3);\r
\r
// poller detection\r
-#define POLL_LIMIT 16\r
+#define POLL_LIMIT 32\r
#define POLL_CYCLES 64\r
\r
void m68k_comm_check(u32 a)\r
{\r
- pcd_sync_s68k(SekCyclesDone(), 0);\r
+ u32 cycles = SekCyclesDone();\r
+ u32 clkdiff = cycles - Pico_mcd->m.m68k_poll_clk;\r
+ pcd_sync_s68k(cycles, 0);\r
if (a >= 0x0e && !Pico_mcd->m.need_sync) {\r
// there are cases when slave updates comm and only switches RAM\r
// over after that (mcd1b), so there must be a resync..\r
SekEndRun(64);\r
Pico_mcd->m.need_sync = 1;\r
}\r
- if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a) {\r
+ Pico_mcd->m.m68k_poll_clk = cycles;\r
+ if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a || clkdiff > POLL_CYCLES) {\r
Pico_mcd->m.m68k_poll_a = a;\r
Pico_mcd->m.m68k_poll_cnt = 0;\r
SekNotPolling = 0;\r
unsigned char dmna_ret_2m;\r
unsigned char need_sync;\r
unsigned char pad3;\r
- int pad4[9];\r
+ unsigned int m68k_poll_clk;\r
+ int pad4[8];\r
};\r
\r
typedef struct\r