p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0);
}
+void p32x_schedule_hint(SH2 *sh2, int m68k_cycles)
+{
+ // rather rough, 32x hint is useless in practice
+ int after;
+
+ if (!((Pico32x.sh2irq_mask[0] | Pico32x.sh2irq_mask[1]) & 4))
+ return; // nobody cares
+ // note: when Pico.m.scanline is 224, SH2s might
+ // still be at scanline 93 (or so)
+ if (!(Pico32x.sh2_regs[0] & 0x80) && Pico.m.scanline > 224)
+ return;
+
+ after = (Pico32x.sh2_regs[4 / 2] + 1) * 488;
+ if (sh2 != NULL)
+ p32x_event_schedule_sh2(sh2, P32X_EVENT_HINT, after);
+ else
+ p32x_event_schedule(m68k_cycles, P32X_EVENT_HINT, after);
+}
+
// compare cycles, handling overflows
// check if a > b
#define CYCLES_GT(a, b) \
p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, now);
}
+static void hint_event(unsigned int now)
+{
+ Pico32x.sh2irqs |= P32XI_HINT;
+ p32x_update_irls(NULL, now);
+ p32x_schedule_hint(NULL, now);
+}
+
typedef void (event_cb)(unsigned int now);
unsigned int event_times[P32X_EVENT_COUNT];
static event_cb *event_cbs[] = {
[P32X_EVENT_PWM] = p32x_pwm_irq_event,
[P32X_EVENT_FILLEND] = fillend_event,
+ [P32X_EVENT_HINT] = hint_event,
};
// schedule event at some time 'after', in m68k clocks
void PicoFrame32x(void)
{
+ Pico.m.scanline = 0;
+
Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
+ if (!(Pico32x.sh2_regs[0] & 0x80))
+ p32x_schedule_hint(NULL, SekCyclesDoneT2());
p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0);
p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0);
Pico32x.regs[0] |= (d << 8) & P32XS_FM;
return;
case 1: // HEN/irq masks
- if ((d ^ Pico32x.sh2_regs[0]) & 0x80)
- elprintf(EL_ANOMALY|EL_32X, "HEN");
- Pico32x.sh2irq_mask[sh2->is_slave] = d & 0x8f;
+ Pico32x.sh2irq_mask[sh2->is_slave] = d & 0x0f;
Pico32x.sh2_regs[0] &= ~0x80;
Pico32x.sh2_regs[0] |= d & 0x80;
if (d & 1)
p32x_pwm_schedule_sh2(sh2);
+ if (d & 4)
+ p32x_schedule_hint(sh2, 0);
p32x_update_irls(sh2, 0);
return;
case 5: // H count
enum p32x_event {\r
P32X_EVENT_PWM,\r
P32X_EVENT_FILLEND,\r
+ P32X_EVENT_HINT,\r
P32X_EVENT_COUNT,\r
};\r
extern unsigned int event_times[P32X_EVENT_COUNT];\r
void p32x_reset_sh2s(void);\r
void p32x_event_schedule(unsigned int now, enum p32x_event event, int after);\r
void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after);\r
+void p32x_schedule_hint(SH2 *sh2, int m68k_cycles);\r
\r
// 32x/memory.c\r
struct Pico32xMem *Pico32xMem;\r