sh2 drc, fixes for cache handling on arm and mips cpus

diff --git a/cpu/drc/emit_arm.c b/cpu/drc/emit_arm.c
index c354acb..9a89ab3 100644 (file)
--- a/cpu/drc/emit_arm.c
+++ b/cpu/drc/emit_arm.c
@@ -1247,7 +1247,7 @@ static inline void emith_pool_adjust(int tcache_offs, int move_offs)
 } while (0)
 
 #define host_instructions_updated(base, end, force) \
-       do { if (force) __builtin___clear_cache(base, end); } while (0)
+       do { if (force) emith_update_add(base, end); } while (0)
 
 #define host_arg2reg(rd, arg) \
        rd = arg

diff --git a/cpu/drc/emit_mips.c b/cpu/drc/emit_mips.c
index 51509ea..ed7c178 100644 (file)
--- a/cpu/drc/emit_mips.c
+++ b/cpu/drc/emit_mips.c
@@ -1573,11 +1573,10 @@ static NOINLINE void host_instructions_updated(void *base, void *end, int force)
 {
        int step, tmp;
        asm volatile(
-       "       bal     0f;" // needed to allow for jr.hb
-       "       b       3f;"
-
-       "0:     rdhwr   %2, $1;"
-       "       beqz    %2, 2f;"
+       "       rdhwr   %2, $1;"
+       "       bal     0f;"                    // needed to allow for jr.hb:
+       "0:     addiu   $ra, $ra, 3f-0b;"       //   set ra to insn after jr.hb
+       "       beqz    %2, 3f;"
 
        "1:     synci   0(%0);"
        "       sltu    %3, %0, %1;"

diff --git a/cpu/sh2/compiler.c b/cpu/sh2/compiler.c
index beb6709..fbabbd9 100644 (file)
--- a/cpu/sh2/compiler.c
+++ b/cpu/sh2/compiler.c
@@ -816,13 +816,13 @@ static void dr_block_link(struct block_entry *be, struct block_link *bl, int emi
         emith_jump_patch(jump, bl->blx, &jump);
         emith_jump_at(bl->blx, be->tcache_ptr);
         host_instructions_updated(bl->blx, bl->blx + emith_jump_at_size(),
-            ((uintptr_t)bl->blx & 0x0f) + emith_jump_at_size()-1 > 0x0f);
+            ((uintptr_t)bl->blx & 0x1f) + emith_jump_at_size()-1 > 0x1f);
       }
     } else {
       printf("unknown BL type %d\n", bl->type);
       exit(1);
     }
-    host_instructions_updated(jump, jump + jsz, ((uintptr_t)jump & 0x0f) + jsz-1 > 0x0f);
+    host_instructions_updated(jump, jump + jsz, ((uintptr_t)jump & 0x1f) + jsz-1 > 0x1f);
   }
 
   // move bl to block_entry