pprof_end_sub(m68k);\r
}\r
Pico.t.z80_busdelay &= 0xff; // also resets bus request\r
- Pico.video.status &= ~PVS_Z80WAIT;\r
YM2612ResetChip();\r
timers_reset();\r
}\r
static void access_68k_bus(int delay) // bus delay as Q8\r
{\r
// TODO: if the 68K is in DMA wait, Z80 has to wait until DMA ends\r
- if (Pico.video.status & (PVS_CPUWR|PVS_CPURD)) {\r
- z80_subCLeft(z80_cyclesLeft); // rather rough on both condition and action\r
- // TODO the next line will cause audio lag in Overdrive 2 demo?\r
- //Pico.video.status |= PVS_Z80WAIT;\r
- }\r
\r
// 68k bus access delay for z80. The fractional part needs to be accumulated\r
// until an additional cycle is full. That is then added to the integer part.\r
int cycles = PicoVideoFIFOHint();
SekCyclesBurn(cycles); // prolong cpu HOLD if necessary
- if (pv->status & PVS_Z80WAIT) {
- Pico.t.z80c_cnt += cycles_68k_to_z80(cycles);
- if (!(pv->status & (PVS_CPUWR|PVS_CPURD)))
- pv->status &= ~PVS_Z80WAIT;
- }
-
// XXX how to handle Z80 bus cycle stealing during DMA correctly?
if ((Pico.t.z80_buscycles -= cycles) < 0)
Pico.t.z80_buscycles = 0;
#define PVS_DMAFILL (1 << 20) // DMA fill is waiting for fill data\r
#define PVS_DMABG (1 << 21) // background DMA operation is running\r
#define PVS_FIFORUN (1 << 22) // FIFO is processing\r
-#define PVS_Z80WAIT (1 << 23) // Z80 blocked by VDP DMA\r
\r
struct PicoVideo\r
{\r