// hle'd blocks
ssp_block_table[0x800/2] = (void *) ssp_hle_800;
ssp_block_table[0x902/2] = (void *) ssp_hle_902;
- ssp_block_table_iram[ 7 * SSP_BLOCKTAB_IRAM_ENTS + 0x030/2] = (void *) ssp_hle_07_030;
- ssp_block_table_iram[ 7 * SSP_BLOCKTAB_IRAM_ENTS + 0x036/2] = (void *) ssp_hle_07_036;
- ssp_block_table_iram[ 7 * SSP_BLOCKTAB_IRAM_ENTS + 0x6d6/2] = (void *) ssp_hle_07_6d6;
- ssp_block_table_iram[11 * SSP_BLOCKTAB_IRAM_ENTS + 0x12c/2] = (void *) ssp_hle_11_12c;
- ssp_block_table_iram[11 * SSP_BLOCKTAB_IRAM_ENTS + 0x384/2] = (void *) ssp_hle_11_384;
- ssp_block_table_iram[11 * SSP_BLOCKTAB_IRAM_ENTS + 0x38a/2] = (void *) ssp_hle_11_38a;
+ ssp_block_table_iram[ 7 * SSP_BLOCKTAB_IRAM_ONE + 0x030/2] = (void *) ssp_hle_07_030;
+ ssp_block_table_iram[ 7 * SSP_BLOCKTAB_IRAM_ONE + 0x036/2] = (void *) ssp_hle_07_036;
+ ssp_block_table_iram[ 7 * SSP_BLOCKTAB_IRAM_ONE + 0x6d6/2] = (void *) ssp_hle_07_6d6;
+ ssp_block_table_iram[11 * SSP_BLOCKTAB_IRAM_ONE + 0x12c/2] = (void *) ssp_hle_11_12c;
+ ssp_block_table_iram[11 * SSP_BLOCKTAB_IRAM_ONE + 0x384/2] = (void *) ssp_hle_11_384;
+ ssp_block_table_iram[11 * SSP_BLOCKTAB_IRAM_ONE + 0x38a/2] = (void *) ssp_hle_11_38a;
#endif
return 0;
#include "../../pico_int.h"
#include "../../memory.h"
-/*
- // "cell arrange" 1: 390000-39ffff
- else if ((a & 0xff0000) == 0x390000) {
- // this is rewritten 68k code
- unsigned int a1 = a >> 1;
- a1 = (a1 & 0x7001) | ((a1 & 0x3e) << 6) | ((a1 & 0xfc0) >> 5);
- d = ((u16 *)svp->dram)[a1];
- }
+// for wait loop det
+static void PicoWrite16_dram(u32 a, u32 d)
+{
+ a &= ~0xfe0000;
- // "cell arrange" 2: 3a0000-3affff
- else if ((a & 0xff0000) == 0x3a0000) {
- // this is rewritten 68k code
- unsigned int a1 = a >> 1;
- a1 = (a1 & 0x7801) | ((a1 & 0x1e) << 6) | ((a1 & 0x7e0) >> 4);
- d = ((u16 *)svp->dram)[a1];
+ if (d != 0) {
+ if (a == 0xfe06) // 30fe06
+ svp->ssp1601.emu_status &= ~SSP_WAIT_30FE06;
+ else if (a == 0xfe08)
+ svp->ssp1601.emu_status &= ~SSP_WAIT_30FE08;
}
-*/
+
+ ((u16 *)svp->dram)[a / 2] = d;
+}
+
+// "cell arrange" 1: 390000-39ffff
+static u32 PicoRead16_svpca1(u32 a)
+{
+ // this is 68k code rewritten
+ u32 a1 = a >> 1;
+ a1 = (a1 & 0x7001) | ((a1 & 0x3e) << 6) | ((a1 & 0xfc0) >> 5);
+ return ((u16 *)svp->dram)[a1];
+}
+
+// "cell arrange" 2: 3a0000-3affff
+static u32 PicoRead16_svpca2(u32 a)
+{
+ u32 a1 = a >> 1;
+ a1 = (a1 & 0x7801) | ((a1 & 0x1e) << 6) | ((a1 & 0x7e0) >> 4);
+ return ((u16 *)svp->dram)[a1];
+}
// IO/control area (0xa10000 - 0xa1ffff)
static u32 PicoRead16_svpr(u32 a)
u32 d = 0;
// regs
- if ((a & 0xfffff0) == 0xa15000) {
+ if ((a & ~0x0f) == 0xa15000) {
switch (a & 0xf) {
case 0:
case 2:
return PicoRead16_io(a);
}
+// used in VR test mode
+static u32 PicoRead8_svpr(u32 a)
+{
+ u32 d;
+
+ if ((a & ~0x0f) != 0xa15000)
+ return PicoRead8_io(a);
+
+ d = PicoRead16_svpr(a & ~1);
+ if (!(a & 1))
+ d >>= 8;
+ return d;
+}
+
static void PicoWrite16_svpr(u32 a, u32 d)
{
elprintf(EL_SVP, "SVP w16: [%06x] %04x @%06x", a, d, SekPc);
- if ((a & 0xfffff0) == 0xa15000) {
+ if ((a & ~0x0f) == 0xa15000) {
if (a == 0xa15000 || a == 0xa15002) {
// just guessing here
svp->ssp1601.gr[SSP_XST].h = d;
}
PicoWrite16_io(a, d);
-/*
- if (a == 0x30fe06 && d != 0)
- svp->ssp1601.emu_status &= ~SSP_WAIT_30FE06;
-
- if (a == 0x30fe08 && d != 0)
- svp->ssp1601.emu_status &= ~SSP_WAIT_30FE08;
-*/
}
void PicoSVPMemSetup(void)
cpu68k_map_set(m68k_read16_map, 0x300000, 0x31ffff, svp->dram, 0);
cpu68k_map_set(m68k_write8_map, 0x300000, 0x31ffff, svp->dram, 0);
cpu68k_map_set(m68k_write16_map, 0x300000, 0x31ffff, svp->dram, 0);
+ cpu68k_map_set(m68k_write16_map, 0x300000, 0x30ffff, PicoWrite16_dram, 1);
- // DRAM (cell arrange) - TODO
+ // DRAM (cell arrange)
+ cpu68k_map_set(m68k_read16_map, 0x390000, 0x39ffff, PicoRead16_svpca1, 1);
+ cpu68k_map_set(m68k_read16_map, 0x3a0000, 0x3affff, PicoRead16_svpca2, 1);
// regs
- cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1); // PicoRead8_svpr
+ cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_svpr, 1);
cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_svpr, 1);
cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1); // PicoWrite8_svpr
cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_svpr, 1);