32x, fixes for msu

diff --git a/pico/32x/32x.c b/pico/32x/32x.c
index d8ec0a4..b630904 100644 (file)
--- a/pico/32x/32x.c
+++ b/pico/32x/32x.c
@@ -137,10 +137,9 @@ void p32x_reset_sh2s(void)
   if (p32x_bios_m == NULL) {
     sh2_set_gbr(0, 0x20004000);
 
-    if (!(PicoIn.AHW & PAHW_MCD)) {
+    if (!Pico.m.ncart_in) { // copy IDL from cartridge
       unsigned int idl_src, idl_dst, idl_size; // initial data load
       unsigned int vbr;
-
       // initial data
       idl_src = CPU_BE2(*(u32 *)(Pico.rom + 0x3d4)) & ~0xf0000000;
       idl_dst = CPU_BE2(*(u32 *)(Pico.rom + 0x3d8)) & ~0xf0000000;

diff --git a/pico/32x/memory.c b/pico/32x/memory.c
index 71765e5..21381c9 100644 (file)
--- a/pico/32x/memory.c
+++ b/pico/32x/memory.c
@@ -351,10 +351,8 @@ static u32 p32x_reg_read16(u32 a)
     if (CYCLES_GT(cycles - msh2.m68krcycles_done, 244))
       p32x_sync_sh2s(cycles);
 
-    if (m68k_poll_detect(a, cycles, P32XF_68KCPOLL)) {
+    if (m68k_poll_detect(a, cycles, P32XF_68KCPOLL))
       SekSetStop(1);
-      SekEndRun(16);
-    }
     return sh2_poll_read(a, Pico32x.regs[a / 2], cycles, NULL);
   }
 #endif
@@ -2203,6 +2201,9 @@ static void get_bios(void)
 
     // startup code
     memcpy(&Pico32xMem->sh2_rom_m.b[0x200], msh2_code, sizeof(msh2_code));
+    if (!Pico.m.ncart_in && (PicoIn.AHW & PAHW_MCD))
+      // hack for MSU games (adjust delay loop for copying the MSU code to sub)
+      Pico32xMem->sh2_rom_m.w[0x224/2] = 0x0090;
   }
 
   // SSH2

diff --git a/pico/pico_int.h b/pico/pico_int.h
index 8c891c6..ad018fa 100644 (file)
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -44,8 +44,8 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
 #define SekDarS68k(x) (x < 8 ? PicoCpuCS68k.d[x] : PicoCpuCS68k.a[x - 8])\r
 #define SekSr     CycloneGetSr(&PicoCpuCM68k)\r
 #define SekSrS68k CycloneGetSr(&PicoCpuCS68k)\r
-#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }\r
-#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }\r
+#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; SekEndRun(0); } }\r
+#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; SekEndRunS68k(0); } }\r
 #define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1)\r
 #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)\r
 #define SekShouldInterrupt() (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
@@ -71,11 +71,11 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
 #define SekSrS68k PicoCpuFS68k.sr\r
 #define SekSetStop(x) { \\r
        PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \\r
-       if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \\r
+       if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; SekEndRun(0); } \\r
 }\r
 #define SekSetStopS68k(x) { \\r
        PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \\r
-       if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \\r
+       if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; SekEndRunS68k(0); } \\r
 }\r
 #define SekIsStoppedM68k() (PicoCpuFM68k.execinfo&FM68K_HALTED)\r
 #define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)\r
@@ -102,11 +102,11 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
 #define SekSr     m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)\r
 #define SekSrS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_SR)\r
 #define SekSetStop(x) { \\r
-       if(x) { PicoCpuMM68k.cyc_remaining_cycles = 0; PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \\r
+       if(x) { PicoCpuMM68k.stopped=STOP_LEVEL_STOP; SekEndRun(0)} \\r
        else PicoCpuMM68k.stopped=0; \\r
 }\r
 #define SekSetStopS68k(x) { \\r
-       if(x) { PicoCpuMS68k.cyc_remaining_cycles = 0; PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \\r
+       if(x) { PicoCpuMS68k.stopped=STOP_LEVEL_STOP; SekEndRunS68k(0); } \\r
        else PicoCpuMS68k.stopped=0; \\r
 }\r
 #define SekIsStoppedM68k() (PicoCpuMM68k.stopped==STOP_LEVEL_STOP)\r