return 0;
}
-static void SekRunM68kOnce(void)
-{
- int cyc_do;
- pevt_log_m68k_o(EVT_RUN_START);
-
- if ((cyc_do = Pico.t.m68c_aim - Pico.t.m68c_cnt) > 0) {
- Pico.t.m68c_cnt += cyc_do;
-
-#if defined(EMU_C68K)
- PicoCpuCM68k.cycles = cyc_do;
- CycloneRun(&PicoCpuCM68k);
- Pico.t.m68c_cnt -= PicoCpuCM68k.cycles;
-#elif defined(EMU_M68K)
- Pico.t.m68c_cnt += m68k_execute(cyc_do) - cyc_do;
-#elif defined(EMU_F68K)
- Pico.t.m68c_cnt += fm68k_emulate(&PicoCpuFM68k, cyc_do, 0) - cyc_do;
-#endif
- }
-
- SekCyclesLeft = 0;
-
- SekTrace(0);
- pevt_log_m68k_o(EVT_RUN_END);
-}
-
static void SekRunS68k(unsigned int to)
{
int cyc_do;
{
if (state) {
SekInterruptS68k(irq);
- if (SekIsStoppedS68k())
- SekSetStopS68k(0);
+ Pico_mcd->m.state_flags &= ~(PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP);
Pico_mcd->m.s68k_poll_cnt = 0;
} else
SekInterruptClearS68k(irq);
if (event_time_next && CYCLES_GT(target, event_time_next))
target = event_time_next;
- if (SekIsStoppedS68k())
+ if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP))
SekCycleCntS68k = SekCycleAimS68k = target;
else
SekRunS68k(target);
#define pcd_run_cpus_normal pcd_run_cpus
//#define pcd_run_cpus_lockstep pcd_run_cpus
-static void SekSyncM68k(void);
+static int SekSyncM68k(int once);
void pcd_run_cpus_normal(int m68k_cycles)
{
Pico.t.m68c_aim += m68k_cycles;
while (CYCLES_GT(Pico.t.m68c_aim, Pico.t.m68c_cnt)) {
- if (SekShouldInterrupt())
+ if (SekShouldInterrupt()) {
+ Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;
Pico_mcd->m.m68k_poll_cnt = 0;
+ }
#ifdef USE_POLL_DETECT
- if (Pico_mcd->m.m68k_poll_cnt >= 16) {
+ if (Pico_mcd->m.state_flags & (PCD_ST_M68K_POLL|PCD_ST_M68K_SLEEP)) {
int s68k_left;
// main CPU is polling, (wake and) run sub only
- if (SekIsStoppedS68k()) {
- SekSetStopS68k(0);
- Pico_mcd->m.s68k_poll_cnt = 0;
- }
+ Pico_mcd->m.state_flags &= ~(PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP);
+ Pico_mcd->m.s68k_poll_cnt = 0;
s68k_left = pcd_sync_s68k(Pico.t.m68c_aim, 1);
Pico.t.m68c_cnt = Pico.t.m68c_aim;
if (s68k_left > 0)
Pico.t.m68c_cnt -= ((long long)s68k_left * mcd_s68k_cycle_mult >> 16);
- if (SekIsStoppedS68k()) {
+ if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP)) {
// slave has stopped, wake master to avoid lockups
+ Pico_mcd->m.state_flags &= ~(PCD_ST_M68K_POLL|PCD_ST_M68K_SLEEP);
Pico_mcd->m.m68k_poll_cnt = 0;
}
+
elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
} else
#endif
- SekRunM68kOnce();
- if (Pico_mcd->m.need_sync) {
- Pico_mcd->m.need_sync = 0;
+ SekSyncM68k(1);
+ if (Pico_mcd->m.state_flags & PCD_ST_S68K_SYNC) {
+ Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SYNC;
pcd_sync_s68k(Pico.t.m68c_cnt, 0);
}
}
unsigned int target = Pico.t.m68c_aim + m68k_cycles;
do {
Pico.t.m68c_aim += 8;
- SekSyncM68k();
+ SekSyncM68k(0);
pcd_sync_s68k(Pico.t.m68c_aim, 0);
} while (CYCLES_GT(target, Pico.t.m68c_aim));
if ((unsigned int)diff > 12500000/50)
Pico_mcd->pcm.update_cycles = cycles;
+ if (Pico_mcd->m.need_sync) {
+ Pico_mcd->m.state_flags |= PCD_ST_S68K_SYNC;
+ Pico_mcd->m.need_sync = 0;
+ }
+
// reschedule
event_time_next = 0;
pcd_run_events(SekCycleCntS68k);
u32 cycles = SekCyclesDone();\r
u32 clkdiff = cycles - Pico_mcd->m.m68k_poll_clk;\r
pcd_sync_s68k(cycles, 0);\r
- if (a == 0x0e && !Pico_mcd->m.need_sync && (Pico_mcd->s68k_regs[3]&0x4)) {\r
+ if (a == 0x0e && !(Pico_mcd->m.state_flags & PCD_ST_S68K_SYNC) && (Pico_mcd->s68k_regs[3]&0x4)) {\r
// there are cases when slave updates comm and only switches RAM\r
// over after that (mcd1 bios), so there must be a resync..\r
SekEndRun(64);\r
- Pico_mcd->m.need_sync = 1;\r
+ Pico_mcd->m.state_flags |= PCD_ST_S68K_SYNC;\r
}\r
Pico_mcd->m.m68k_poll_clk = cycles;\r
if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a || clkdiff > POLL_CYCLES || clkdiff <= 16) {\r
return;\r
}\r
Pico_mcd->m.m68k_poll_cnt++;\r
- if(Pico_mcd->m.m68k_poll_cnt >= POLL_LIMIT)\r
+ Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;\r
+ if (Pico_mcd->m.m68k_poll_cnt >= POLL_LIMIT) {\r
+ Pico_mcd->m.state_flags |= PCD_ST_M68K_POLL;\r
SekEndRun(8);\r
+ }\r
}\r
\r
#ifndef _ASM_CD_MEMORY_C\r
u32 dold;\r
a &= 0x3f;\r
\r
+ Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;\r
Pico_mcd->m.m68k_poll_cnt = 0;\r
\r
switch (a) {\r
}\r
else\r
d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;\r
+ if ((dold ^ d) & 0x1f)\r
+ remap_word_ram(d);\r
\r
goto write_comm;\r
case 6:\r
// Delay slave a bit to make sure master can check before slave changes.\r
SekCycleCntS68k += 24; // Silpheed\r
}\r
- if (Pico_mcd->m.s68k_poll_a == (a & ~1))\r
- {\r
- if (SekIsStoppedS68k()) {\r
+ if ((Pico_mcd->m.s68k_poll_a ^ a) & ~1) {\r
+ if (Pico_mcd->m.state_flags & PCD_ST_S68K_POLL)\r
elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
- SekSetStopS68k(0);\r
- }\r
+ Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;\r
Pico_mcd->m.s68k_poll_cnt = 0;\r
}\r
}\r
{\r
#ifdef USE_POLL_DETECT\r
u32 cycles, cnt = 0;\r
- if (SekIsStoppedS68k())\r
+ if (Pico_mcd->m.state_flags & (PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP))\r
return d;\r
SekEndRunS68k(8);\r
\r
if (clkdiff <= POLL_CYCLES) {\r
cnt = Pico_mcd->m.s68k_poll_cnt + 1;\r
//printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);\r
+ Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;\r
if (cnt > POLL_LIMIT) {\r
- SekSetStopS68k(1);\r
+ Pico_mcd->m.state_flags |= PCD_ST_S68K_POLL;\r
elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",\r
SekPcS68k, a);\r
}\r
wram_2M_to_1M(Pico_mcd->word_ram2M);\r
}\r
\r
- if ((d ^ dold) & 0x1d)\r
- remap_word_ram(d);\r
-\r
if ((d ^ dold) & 0x05)\r
d &= ~2; // clear DMNA - swap complete\r
}\r
if (dold & 4) {\r
elprintf(EL_CDREG3, "wram mode 1M->2M");\r
wram_1M_to_2M(Pico_mcd->word_ram2M);\r
- remap_word_ram(d);\r
}\r
d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;\r
}\r
+ if ((dold ^ d) & 0x1f)\r
+ remap_word_ram(d);\r
goto write_comm;\r
}\r
case 4:\r
return;\r
\r
Pico_mcd->s68k_regs[a] = (u8) d;\r
- if (Pico_mcd->m.m68k_poll_cnt)\r
+ if ((Pico_mcd->m.m68k_poll_a ^ a) & ~1) {\r
SekEndRunS68k(8);\r
- Pico_mcd->m.m68k_poll_cnt = 0;\r
+ Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;\r
+ Pico_mcd->m.m68k_poll_cnt = 0;\r
+ }\r
}\r
\r
void s68k_reg_write16(u32 a, u32 d)\r
{\r
u8 *r = Pico_mcd->s68k_regs;\r
\r
+ Pico_mcd->m.state_flags &= ~PCD_ST_S68K_POLL;\r
Pico_mcd->m.s68k_poll_cnt = 0;\r
\r
if ((a & 0x1f0) == 0x20)\r
\r
r[a] = d >> 8;\r
r[a + 1] = d;\r
- if (Pico_mcd->m.m68k_poll_cnt)\r
+ if ((Pico_mcd->m.m68k_poll_a ^ a) & ~1) {\r
SekEndRunS68k(8);\r
- Pico_mcd->m.m68k_poll_cnt = 0;\r
+ Pico_mcd->m.state_flags &= ~PCD_ST_M68K_POLL;\r
+ Pico_mcd->m.m68k_poll_cnt = 0;\r
+ }\r
}\r
\r
// -----------------------------------------------------------------\r
}\r
}\r
\r
+// if main or sub CPU accesses Word-RAM while it is assigned to the other CPU\r
+// GA doesn't assert DTACK, which means the CPU is blocked until the Word_RAM\r
+// is reassigned to it (e.g. Mega Race).\r
+static u32 m68k_wordram_read8(u32 a)\r
+{\r
+ Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;\r
+ SekEndRun(0);\r
+ return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff];\r
+}\r
+\r
+static u32 m68k_wordram_read16(u32 a)\r
+{\r
+ Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;\r
+ SekEndRun(0);\r
+ return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff];\r
+}\r
+\r
+static void m68k_wordram_write8(u32 a, u32 d)\r
+{\r
+ Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;\r
+ SekEndRun(0);\r
+ Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d;\r
+}\r
+\r
+static void m68k_wordram_write16(u32 a, u32 d)\r
+{\r
+ Pico_mcd->m.state_flags |= PCD_ST_M68K_SLEEP;\r
+ SekEndRun(0);\r
+ ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff] = d;\r
+}\r
+\r
+static u32 s68k_wordram_read8(u32 a)\r
+{\r
+ Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;\r
+ SekEndRunS68k(0);\r
+ return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff];\r
+}\r
+\r
+static u32 s68k_wordram_read16(u32 a)\r
+{\r
+ Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;\r
+ SekEndRunS68k(0);\r
+ return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff];\r
+}\r
+\r
+static void s68k_wordram_write8(u32 a, u32 d)\r
+{\r
+ Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;\r
+ SekEndRunS68k(0);\r
+ Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d;\r
+}\r
+\r
+static void s68k_wordram_write16(u32 a, u32 d)\r
+{\r
+ Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;\r
+ SekEndRunS68k(0);\r
+ ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff] = d;\r
+}\r
+\r
static void remap_word_ram(u32 r3)\r
{\r
void *bank;\r
\r
// WORD RAM\r
if (!(r3 & 4)) {\r
- // 2M mode. XXX: allowing access in all cases for simplicity\r
+ // 2M mode.\r
bank = Pico_mcd->word_ram2M;\r
- cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);\r
- cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);\r
+ if (r3 & 1) {\r
+ Pico_mcd->m.state_flags &= ~PCD_ST_M68K_SLEEP;\r
+ cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);\r
+ cpu68k_map_all_funcs(0x80000, 0xbffff,\r
+ s68k_wordram_read8, s68k_wordram_read16,\r
+ s68k_wordram_write8, s68k_wordram_write16, 1);\r
+ } else {\r
+ Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP;\r
+ cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);\r
+ cpu68k_map_all_funcs(0x200000, 0x23ffff,\r
+ m68k_wordram_read8, m68k_wordram_read16,\r
+ m68k_wordram_write8, m68k_wordram_write16, 0);\r
+ }\r
// TODO: handle 0x0c0000\r
}\r
else {\r
int b0 = r3 & 1;\r
int m = (r3 & 0x18) >> 3;\r
+ Pico_mcd->m.state_flags &= ~(PCD_ST_M68K_SLEEP|PCD_ST_S68K_SLEEP);\r
bank = Pico_mcd->word_ram1M[b0];\r
cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);\r
bank = Pico_mcd->word_ram1M[b0 ^ 1];\r
cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);\r
// "cell arrange" on m68k\r
- cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);\r
- cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);\r
- cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);\r
- cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);\r
+ cpu68k_map_all_funcs(0x220000, 0x23ffff,\r
+ m68k_cell_read8[b0], m68k_cell_read16[b0],\r
+ m68k_cell_write8[b0], m68k_cell_write16[b0], 0);\r
// "decode format" on s68k\r
- cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);\r
- cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);\r
- cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);\r
- cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);\r
+ cpu68k_map_all_funcs(0x80000, 0xbffff,\r
+ s68k_dec_read8[b0^1], s68k_dec_read16[b0^1],\r
+ s68k_dec_write8[b0^1][m], s68k_dec_write16[b0^1][m], 1);\r
}\r
}\r
\r
m_m68k_read8_r03:
add r1, r1, #0x110000
stmfd sp!, {r1, lr}
+ bic r0, r0, #1
bl m68k_comm_check
ldmfd sp!, {r1, lr}
ldrb r0, [r1, #3]
bxge lr
add r1, r1, r0
stmfd sp!, {r1, lr}
+ bic r0, r0, #1
bl m68k_comm_check
ldmfd sp!, {r1, lr}
ldrb r0, [r1]
beq m_m68k_write16_regs_spec
and r3, r1, #0xff
add r2, r0, #1
- stmfd sp!,{r2,r3,lr}
+ stmfd sp!,{r2,r3,r12,lr}
mov r1, r1, lsr #8
bl m68k_reg_write8
- ldmfd sp!,{r0,r1,lr}
+ ldmfd sp!,{r0,r1,r12,lr}
b m68k_reg_write8
m_m68k_write16_regs_spec: @ special case
}\r
\r
// more specialized/optimized function (does same as above)\r
+void cpu68k_map_read_mem(u32 start_addr, u32 end_addr, void *ptr, int is_sub)\r
+{\r
+ uptr *r8map, *r16map;\r
+ uptr addr = (uptr)ptr;\r
+ int shift = M68K_MEM_SHIFT;\r
+ int i;\r
+\r
+ if (!is_sub) {\r
+ r8map = m68k_read8_map;\r
+ r16map = m68k_read16_map;\r
+ } else {\r
+ r8map = s68k_read8_map;\r
+ r16map = s68k_read16_map;\r
+ }\r
+\r
+ addr -= start_addr;\r
+ addr >>= 1;\r
+ for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
+ r8map[i] = r16map[i] = addr;\r
+#ifdef EMU_F68K\r
+ // setup FAME fetchmap\r
+ {\r
+ M68K_CONTEXT *ctx = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;\r
+ int shiftout = 24 - FAMEC_FETCHBITS;\r
+ i = start_addr >> shiftout;\r
+ addr = (uptr)ptr - (i << shiftout);\r
+ for (; i <= (end_addr >> shiftout); i++)\r
+ ctx->Fetch[i] = addr;\r
+ }\r
+#endif\r
+}\r
+\r
void cpu68k_map_all_ram(u32 start_addr, u32 end_addr, void *ptr, int is_sub)\r
{\r
uptr *r8map, *r16map, *w8map, *w16map;\r
#endif\r
}\r
\r
+void cpu68k_map_read_funcs(u32 start_addr, u32 end_addr, u32 (*r8)(u32), u32 (*r16)(u32), int is_sub)\r
+{\r
+ uptr *r8map, *r16map;\r
+ uptr ar8 = (uptr)r8, ar16 = (uptr)r16;\r
+ int shift = M68K_MEM_SHIFT;\r
+ int i;\r
+\r
+ if (!is_sub) {\r
+ r8map = m68k_read8_map;\r
+ r16map = m68k_read16_map;\r
+ } else {\r
+ r8map = s68k_read8_map;\r
+ r16map = s68k_read16_map;\r
+ }\r
+\r
+ ar8 = (ar8 >> 1 ) | MAP_FLAG;\r
+ ar16 = (ar16 >> 1 ) | MAP_FLAG;\r
+ for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
+ r8map[i] = ar8, r16map[i] = ar16;\r
+}\r
+\r
+void cpu68k_map_all_funcs(u32 start_addr, u32 end_addr, u32 (*r8)(u32), u32 (*r16)(u32), void (*w8)(u32, u32), void (*w16)(u32, u32), int is_sub)\r
+{\r
+ uptr *r8map, *r16map, *w8map, *w16map;\r
+ uptr ar8 = (uptr)r8, ar16 = (uptr)r16;\r
+ uptr aw8 = (uptr)w8, aw16 = (uptr)w16;\r
+ int shift = M68K_MEM_SHIFT;\r
+ int i;\r
+\r
+ if (!is_sub) {\r
+ r8map = m68k_read8_map;\r
+ r16map = m68k_read16_map;\r
+ w8map = m68k_write8_map;\r
+ w16map = m68k_write16_map;\r
+ } else {\r
+ r8map = s68k_read8_map;\r
+ r16map = s68k_read16_map;\r
+ w8map = s68k_write8_map;\r
+ w16map = s68k_write16_map;\r
+ }\r
+\r
+ ar8 = (ar8 >> 1 ) | MAP_FLAG;\r
+ ar16 = (ar16 >> 1 ) | MAP_FLAG;\r
+ aw8 = (aw8 >> 1 ) | MAP_FLAG;\r
+ aw16 = (aw16 >> 1 ) | MAP_FLAG;\r
+ for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
+ r8map[i] = ar8, r16map[i] = ar16, w8map[i] = aw8, w16map[i] = aw16;\r
+}\r
+\r
static u32 m68k_unmapped_read8(u32 a)\r
{\r
elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);\r
const void *func_or_mh, int is_func);
void cpu68k_map_set(uptr *map, u32 start_addr, u32 end_addr,
const void *func_or_mh, int is_func);
+void cpu68k_map_read_mem(u32 start_addr, u32 end_addr, void *ptr, int is_sub);
void cpu68k_map_all_ram(u32 start_addr, u32 end_addr, void *ptr, int is_sub);
+void cpu68k_map_read_funcs(u32 start_addr, u32 end_addr, u32 (*r8)(u32), u32 (*r16)(u32), int is_sub);
+void cpu68k_map_all_funcs(u32 start_addr, u32 end_addr, u32 (*r8)(u32), u32 (*r16)(u32), void (*w8)(u32, u32), void (*w16)(u32, u32), int is_sub);
void m68k_map_unmap(u32 start_addr, u32 end_addr);
#define MAP_FLAG ((uptr)1 << (sizeof(uptr) * 8 - 1))
SekCyclesLeft = 0;
}
-static void SekSyncM68k(void)
+static int SekSyncM68k(int once)
{
int cyc_do;
z80_buscyc = cyc_do;
Pico.t.m68c_cnt += z80_buscyc;
Pico.t.z80_buscycles -= z80_buscyc;
+ if (once) break;
}
SekTrace(0);
pevt_log_m68k_o(EVT_RUN_END);
pprof_end(m68k);
+
+ return Pico.t.m68c_aim > Pico.t.m68c_cnt;
}
static __inline void SekRunM68k(int cyc)
refresh = (cyc + refresh) & 0x3f;
Pico.t.m68c_aim += cyc;
- SekSyncM68k();
+ SekSyncM68k(0);
}
static void SyncCPUs(unsigned int cycles)
while (l-- > 0) {
Pico.t.m68c_cnt -= CYCLES_M68K_LINE;
do_timing_hacks_start(pv);
- SekSyncM68k();
+ SekSyncM68k(0);
do_timing_hacks_end(pv);
}
}
} ch[8];\r
};\r
\r
-#define PCD_ST_S68K_RST 1\r
+#define PCD_ST_S68K_RST 1\r
+#define PCD_ST_S68K_SYNC 2\r
+#define PCD_ST_S68K_SLEEP 4\r
+#define PCD_ST_M68K_SLEEP 8\r
+#define PCD_ST_S68K_POLL 16\r
+#define PCD_ST_M68K_POLL 32\r
\r
struct mcd_misc\r
{\r
notaz.gp2x.de / picodrive.git / commitdiff