endif
#CFLAGS += -DEVT_LOG
#CFLAGS += -DDRC_CMP
-#drc_debug = 4
+#cpu_cmp = 1
+#drc_debug = 7
#profile = 1
else # if not arm
use_fame ?= 1
use_cz80 ?= 1
-use_sh2mame ?= 1
endif
-include Makefile.local
OBJS += platform/libpicofe/pandora/plat.o
USE_FRONTEND = 1
endif
+ifeq "$(PLATFORM)" "gp2x"
+OBJS += platform/common/arm_utils.o
+OBJS += platform/libpicofe/gp2x/in_gp2x.o
+OBJS += platform/libpicofe/gp2x/soc.o
+OBJS += platform/libpicofe/gp2x/soc_mmsp2.o
+OBJS += platform/libpicofe/gp2x/soc_pollux.o
+OBJS += platform/libpicofe/gp2x/plat.o
+OBJS += platform/libpicofe/gp2x/pollux_set.o
+OBJS += platform/gp2x/940ctl.o
+OBJS += platform/gp2x/plat.o
+OBJS += platform/gp2x/emu.o
+OBJS += platform/gp2x/vid_mmsp2.o
+OBJS += platform/gp2x/vid_pollux.o
+OBJS += platform/gp2x/warm.o
+USE_FRONTEND = 1
+PLATFORM_MP3 = 1
+endif
ifeq "$(PLATFORM)" "libretro"
OBJS += platform/libretro.o
endif
endif # USE_FRONTEND
OBJS += platform/common/mp3.o
-ifeq "$(HAVE_LIBAVCODEC)" "1"
+ifeq "$(PLATFORM_MP3)" "1"
+else ifeq "$(HAVE_LIBAVCODEC)" "1"
OBJS += platform/common/mp3_libavcodec.o
else
OBJS += platform/common/mp3_dummy.o
.s.o:
$(CC) $(CFLAGS) -c $< -o $@
+# special flags - perhaps fix this someday instead?
+pico/draw.o: CFLAGS += -fno-strict-aliasing
+pico/draw2.o: CFLAGS += -fno-strict-aliasing
+pico/mode4.o: CFLAGS += -fno-strict-aliasing
+pico/cd/memory.o: CFLAGS += -fno-strict-aliasing
+pico/cd/cd_file.o: CFLAGS += -fno-strict-aliasing
+pico/cd/pcm.o: CFLAGS += -fno-strict-aliasing
+pico/cd/LC89510.o: CFLAGS += -fno-strict-aliasing
+pico/cd/gfx_cd.o: CFLAGS += -fno-strict-aliasing
+
# random deps
pico/carthw/svp/compiler.o : cpu/drc/emit_$(ARCH).c
cpu/sh2/compiler.o : cpu/drc/emit_$(ARCH).c
cpu/sh2/mame/sh2pico.o : cpu/sh2/mame/sh2.c
-pico/pico.o pico/cd/pico.o pico/32x/32x.o : pico/pico_cmn.c pico/pico_int.h
+pico/pico.o pico/cd/mcd.o pico/32x/32x.o : pico/pico_cmn.c pico/pico_int.h
pico/memory.o pico/cd/memory.o : pico/pico_int.h pico/memory.h
cpu/fame/famec.o: cpu/fame/famec.c cpu/fame/famec_opcodes.h
CFLAGS += -DIOS
ARCH := arm
- HAVE_NEON = 0
- USE_DYNAREC = 0
use_cyclone = 0
use_fame = 1
use_drz80 = 0
use_cz80 = 1
- use_sh2mame = 0
use_sh2drc = 1
use_svpdrc = 1
ASFLAGS += -mcpu=cortex-a9 -mfpu=neon -mfloat-abi=softfp
ARCH = arm
- HAVE_NEON = 1
ARM_ASM = 1
- USE_DYNAREC = 1
else ifneq (,$(findstring armv,$(platform)))
TARGET := $(TARGET_NAME)_libretro.so
SHARED := -shared -Wl,--no-undefined
ifneq (,$(findstring neon,$(platform)))
CFLAGS += -mfpu=neon
ASFLAGS += -mfpu=neon
- HAVE_NEON = 1
endif
ifneq (,$(findstring softfloat,$(platform)))
CFLAGS += -mfloat-abi=softfp
ARM_ASM = 1
endif
ARCH = arm
- USE_DYNAREC = 1
else
TARGET := $(TARGET_NAME)_retro.dll
CC = gcc
# some elements originated from qemu configure
set -e
-TMPC="/tmp/pcsx-conf-${RANDOM}-$$-${RANDOM}.c"
-TMPO="/tmp/pcsx-conf-${RANDOM}-$$-${RANDOM}.o"
-TMPB="/tmp/pcsx-conf-${RANDOM}-$$-${RANDOM}"
+TMPC="/tmp/picodrive-conf-${RANDOM}-$$-${RANDOM}.c"
+TMPO="/tmp/picodrive-conf-${RANDOM}-$$-${RANDOM}.o"
+TMPB="/tmp/picodrive-conf-${RANDOM}-$$-${RANDOM}"
trap "rm -f $TMPC $TMPO $TMPB" EXIT INT QUIT TERM
rm -f config.log
compile_binary()
{
- c="$CC $CFLAGS $TMPC -o $TMPB $LDFLAGS $MAIN_LDLIBS $@"
+ c="$CC $CFLAGS $TMPC -o $TMPB $LDFLAGS $@"
echo $c >> config.log
$c >> config.log 2>&1
}
# setting options to "yes" or "no" will make that choice default,
# "" means "autodetect".
-platform_list="generic pandora"
+platform_list="generic pandora gp2x"
platform="generic"
sound_driver_list="oss alsa sdl"
sound_drivers=""
have_armv7=""
have_arm_neon=""
have_libavcodec=""
-enable_dynarec="yes"
need_sdl="no"
need_xlib="no"
# these are for known platforms
optimize_cortexa8="no"
optimize_arm926ej="no"
+optimize_arm920="no"
# hardcoded stuff
CC="${CC-${CROSS_COMPILE}gcc}"
optimize_cortexa8="yes"
have_arm_neon="yes"
;;
+ gp2x)
+ sound_drivers="oss"
+ optimize_arm920="yes"
+ CFLAGS="$CFLAGS -D__GP2X__"
+ if [ "$CROSS_COMPILE" = "arm-linux-" ]; then
+ # still using static, dynamic linking slows Wiz 1-10%
+ # also libm on F100 is not compatible
+ MAIN_LDLIBS="$MAIN_LDLIBS -static"
+ fi
+ ;;
*)
fail "unsupported platform: $platform"
;;
;;
--sound-drivers=*) sound_drivers="$optarg"
;;
- --enable-neon) have_arm_neon="yes"
- ;;
- --disable-neon) have_arm_neon="no"
- ;;
- --disable-dynarec) enable_dynarec="no"
- ;;
*) echo "ERROR: unknown option $opt"; show_help="yes"
;;
esac
echo " available: $platform_list"
echo " --sound-drivers=LIST sound output drivers [guessed]"
echo " available: $sound_driver_list"
- echo " --enable-neon"
- echo " --disable-neon enable/disable ARM NEON optimizations [guessed]"
- echo " --disable-dynarec disable dynamic recompiler"
- echo " (dynarec is only available and enabled on ARM)"
echo "influential environment variables:"
echo " CROSS_COMPILE CC CXX AS CFLAGS ASFLAGS LDFLAGS LDLIBS"
exit 1
CFLAGS="$CFLAGS -mcpu=arm926ej-s -mtune=arm926ej-s"
ASFLAGS="$ASFLAGS -mcpu=arm926ej-s -mfloat-abi=softfp"
fi
+ if [ "$optimize_arm920" = "yes" ]; then
+ CFLAGS="$CFLAGS -mcpu=arm920t -mtune=arm920t"
+ ASFLAGS="$ASFLAGS -mcpu=arm920t -mfloat-abi=soft"
+ fi
if [ "x$have_arm_neon" = "x" ]; then
# detect NEON from user-supplied cflags to enable asm code
fi
# warn about common mistakes
- if [ "$have_armv5" != "yes" ]; then
+ if [ "$platform" != "gp2x" -a "$have_armv5" != "yes" ]; then
if ! echo "$CFLAGS" | grep -q -- '-mcpu=\|-march='; then
echo "Warning: compiling for ARMv4, is that really what you want?"
echo "You probably should specify -mcpu= or -march= like this:"
fi
;;
*)
- # dynarec only available on ARM
- enable_dynarec="no"
;;
esac
#include <png.h>
void main() { png_init_io(0, 0); }
EOF
- compile_binary
+# compile_binary
+ compile_object
}
check_oss()
fi
if echo $sound_drivers | grep -q "\<alsa\>"; then
MAIN_LDLIBS="-lasound $MAIN_LDLIBS"
- check_alsa || fail "please install libasound2-dev"
+ check_alsa -lasound || fail "please install libasound2-dev"
fi
fi
fail "sdl-config is missing; please install libsdl (libsdl1.2-dev)"
CFLAGS="$CFLAGS `sdl-config --cflags`"
MAIN_LDLIBS="`sdl-config --libs` $MAIN_LDLIBS"
- check_sdl || fail "please install libsdl (libsdl1.2-dev)"
+ check_sdl `sdl-config --libs` || fail "please install libsdl (libsdl1.2-dev)"
fi
cat > $TMPC <<EOF
# set things that failed to autodetect to "no"
test "x$have_armv6" != "x" || have_armv6="no"
test "x$have_armv7" != "x" || have_armv7="no"
-test "x$have_arm_neon" != "x" || have_arm_neon="no"
test "x$have_libavcodec" != "x" || have_libavcodec="no"
echo "architecture $ARCH"
echo "libraries $MAIN_LDLIBS"
echo "linker flags $LDFLAGS"
echo "libavcodec (mp3) $have_libavcodec"
-echo "enable dynarec $enable_dynarec"
# echo "ARMv7 optimizations $have_armv7"
-# echo "enable ARM NEON $have_arm_neon"
echo "# Automatically generated by configure" > $config_mak
printf "# Configured with:" >> $config_mak
if [ "$have_libavcodec" = "yes" ]; then
echo "HAVE_LIBAVCODEC = 1" >> $config_mak
fi
-if [ "$have_arm_neon" = "yes" ]; then
- echo "HAVE_NEON = 1" >> $config_mak
-fi
-if [ "$enable_dynarec" = "yes" ]; then
- echo "USE_DYNAREC = 1" >> $config_mak
+
+# GP2X toolchains are too old for UAL asm,
+# so add this here to not litter main Makefile
+if [ "$platform" = "g1p2x" ]; then
+ echo >> $config_mak
+ echo "%.o: %.S" >> $config_mak
+ echo " $(CC) $(CFLAGS) -E -c $^ -o /tmp/$(notdir $@).s" >> $config_mak
+ echo " $(AS) $(ASFLAGS) /tmp/$(notdir $@).s -o $@" >> $config_mak
fi
# use pandora's skin (for now)
int cycles; /*0x44 - Cycles pending to be executed yet */
int previouspc; /*0x48 - Previous PC */
unsigned char Z80_IRQ; /*0x4C - Set IRQ Number (must be halfword aligned) */
- unsigned char Z80IF; /*0x4D - Interrupt Flags: bit1=_IFF1, bit2=_IFF2, bit3=_HALT */
+ unsigned char Z80IF; /*0x4D - Interrupt Flags: bit0=_IFF1, bit1=_IFF2, bit2=_HALT, b3=NMI */
unsigned char Z80IM; /*0x4E - Set IRQ Mode */
unsigned char spare; /*0x4F - N/A */
unsigned int z80irqvector; /*0x50 - Set IRQ Vector i.e. 0xFF=RST */
.equ Z80_IF1, 1<<0\r
.equ Z80_IF2, 1<<1\r
.equ Z80_HALT, 1<<2\r
+ .equ Z80_NMI, 1<<3\r
\r
;@---------------------------------------\r
\r
\r
.if INTERRUPT_MODE == 0\r
;@ check ints\r
+ tst r0,#(Z80_NMI<<8)\r
+ blne DoNMI\r
tst r0,#0xff\r
movne r0,r0,lsr #8\r
- tstne r0,#1\r
+ tstne r0,#Z80_IF1\r
blne DoInterrupt\r
.endif\r
\r
ldmfd sp!,{pc} ;@ return\r
.endif\r
\r
+DoNMI:\r
+ stmfd sp!,{lr}\r
+\r
+ bic r0,r0,#((Z80_NMI|Z80_HALT|Z80_IF1)<<8)\r
+ strh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits\r
+\r
+ ;@ push pc on stack\r
+ ldr r0,[cpucontext,#z80pc_base]\r
+ sub r2,z80pc,r0\r
+ opPUSHareg r2\r
+\r
+ ;@ read new pc from vector address\r
+.if UPDATE_CONTEXT\r
+ str z80pc,[cpucontext,#z80pc_pointer]\r
+.endif\r
+ mov r0,#0x66\r
+.if DRZ80_XMAP\r
+ rebasepc\r
+.else\r
+ stmfd sp!,{r3,r12}\r
+ mov lr,pc\r
+ ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
+ ldmfd sp!,{r3,r12}\r
+ mov z80pc,r0 \r
+.endif\r
+ ldrh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits\r
+ eatcycles 11\r
+ ldmfd sp!,{pc}\r
+\r
+\r
.data\r
.align 4\r
\r
;@ check ints\r
tst r0,#0xff\r
movne r0,r0,lsr #8\r
- tstne r0,#1\r
+ tstne r0,#Z80_IF1\r
blne DoInterrupt\r
\r
;@ continue\r
-Subproject commit 194104e334f7c26015b99c862486a73be0d80162
+Subproject commit 7ddcd35c8b2a8248257bd89ef989095639c29c08
#define MEMHANDLERS_NEED_CYCLES 1\r
#define MEMHANDLERS_CHANGE_PC 0\r
#define MEMHANDLERS_CHANGE_FLAGS 0\r
-#define MEMHANDLERS_CHANGE_CYCLES 0\r
+#define MEMHANDLERS_CHANGE_CYCLES 1\r
\r
#define MEMHANDLERS_DIRECT_PREFIX "cyclone_"\r
\r
tcache, sizeof(tcache), ret);
#ifdef __arm__
+ if (PicoOpt & POPT_EN_DRC)
{
static int test_done;
if (!test_done)
unsigned short execinfo;\r
// PD extension\r
int io_cycle_counter; // cycles left\r
+\r
+ unsigned int Opcode;\r
+ signed int cycles_needed;\r
+ unsigned short *PC;\r
+ unsigned long BasePC;\r
+ unsigned int flag_C;\r
+ unsigned int flag_V;\r
+ unsigned int flag_NotZ;\r
+ unsigned int flag_N;\r
+ unsigned int flag_X;\r
+ unsigned int flag_T;\r
+ unsigned int flag_S;\r
+ unsigned int flag_I;\r
+\r
unsigned long Fetch[M68K_FETCHBANK1];\r
} M68K_CONTEXT;\r
\r
#define FAMEC_CHECK_BRANCHES\r
#define FAMEC_EXTRA_INLINE\r
// #define FAMEC_DEBUG\r
-#define FAMEC_NO_GOTOS\r
+// #define FAMEC_NO_GOTOS\r
#define FAMEC_ADR_BITS 24\r
// #define FAMEC_FETCHBITS 8\r
#define FAMEC_DATABITS 8\r
#define m68kcontext (*g_m68kcontext)\r
\r
#ifdef FAMEC_NO_GOTOS\r
-static u32 Opcode;\r
-static s32 cycles_needed;\r
-static u16 *PC;\r
-static uptr BasePC;\r
-static u32 flag_C;\r
-static u32 flag_V;\r
-static u32 flag_NotZ;\r
-static u32 flag_N;\r
-static u32 flag_X;\r
+#define Opcode m68kcontext.Opcode\r
+#define cycles_needed m68kcontext.cycles_needed\r
+#define PC m68kcontext.PC\r
+#define BasePC m68kcontext.BasePC\r
+#define flag_C m68kcontext.flag_C\r
+#define flag_V m68kcontext.flag_V\r
+#define flag_NotZ m68kcontext.flag_NotZ\r
+#define flag_N m68kcontext.flag_N\r
+#define flag_X m68kcontext.flag_X\r
#endif\r
\r
-#ifdef FAMEC_EMULATE_TRACE\r
-static u32 flag_T;\r
-#endif\r
-static u32 flag_S;\r
-static u32 flag_I;\r
+#define flag_T m68kcontext.flag_T\r
+#define flag_S m68kcontext.flag_S\r
+#define flag_I m68kcontext.flag_I\r
\r
static u32 initialised = 0;\r
\r
u32 line;\r
m68kcontext.io_cycle_counter = cycles_needed;\r
cycles_needed = 0;\r
+ if (m68kcontext.io_cycle_counter <= 0) goto famec_End;\r
line=interrupt_chk__();\r
if (line>0)\r
{\r
}
+extern int SekIsIdleReady(void);
extern int SekIsIdleCode(unsigned short *dst, int bytes);
extern int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx);
OPCODE(idle_detector_bcc8)
{
- extern int idledet_start_frame;
- extern char Pico[];
int frame_count, cond_true, bytes, ret, newop;
u16 *dest_pc;
dest_pc = PC + (((s8)(Opcode & 0xFE)) >> 1);
- frame_count = *(int *)(Pico+0x22208+0x1c); // Pico.m.frame_count
- if (frame_count < idledet_start_frame)
+ if (!SekIsIdleReady())
goto end;
bytes = 0 - (s8)(Opcode & 0xFE) - 2;
// reg cache must be clean before call
static int emit_memhandler_read_(int size, int ram_check)
{
- int arg0, arg1;
+ int arg1;
+#if 0
+ int arg0;
host_arg2reg(arg0, 0);
+#endif
rcache_clean();
return hr2;
}
-static void emit_memhandler_write(int size, u32 pc)
+static void emit_memhandler_write(int size)
{
int ctxr;
host_arg2reg(ctxr, 2);
if (delay_dep_bk & BITMASK1(SHR_PC)) {
if (opd->op != OP_LOAD_POOL && opd->op != OP_MOVA) {
// can only be those 2 really..
- elprintf(EL_ANOMALY, "%csh2 drc: illegal slot insn %04x @ %08x?",
- sh2->is_slave ? 's' : 'm', op, pc - 2);
+ elprintf_sh2(sh2, EL_ANOMALY,
+ "drc: illegal slot insn %04x @ %08x?", op, pc - 2);
}
if (opd->imm != 0)
; // addr already resolved somehow
tmp2 = rcache_get_reg_arg(0, SHR_R0);
tmp3 = rcache_get_reg(GET_Rn(), RC_GR_READ);
emith_add_r_r(tmp2, tmp3);
- emit_memhandler_write(op & 3, pc);
+ emit_memhandler_write(op & 3);
goto end_op;
case 0x07:
// MUL.L Rm,Rn 0000nnnnmmmm0111
tmp2 = rcache_get_reg_arg(1, GET_Rm());
if (op & 0x0f)
emith_add_r_imm(tmp, (op & 0x0f) * 4);
- emit_memhandler_write(2, pc);
+ emit_memhandler_write(2);
goto end_op;
case 0x02:
rcache_clean();
rcache_get_reg_arg(0, GET_Rn());
rcache_get_reg_arg(1, GET_Rm());
- emit_memhandler_write(op & 3, pc);
+ emit_memhandler_write(op & 3);
goto end_op;
case 0x04: // MOV.B Rm,@-Rn 0010nnnnmmmm0100
case 0x05: // MOV.W Rm,@-Rn 0010nnnnmmmm0101
emith_sub_r_imm(tmp, (1 << (op & 3)));
rcache_clean();
rcache_get_reg_arg(0, GET_Rn());
- emit_memhandler_write(op & 3, pc);
+ emit_memhandler_write(op & 3);
goto end_op;
case 0x07: // DIV0S Rm,Rn 0010nnnnmmmm0111
sr = rcache_get_reg(SHR_SR, RC_GR_RMW);
tmp3 = rcache_get_reg_arg(1, tmp);
if (tmp == SHR_SR)
emith_clear_msb(tmp3, tmp3, 22); // reserved bits defined by ISA as 0
- emit_memhandler_write(2, pc);
+ emit_memhandler_write(2);
goto end_op;
case 0x04:
case 0x05:
emith_move_r_r(tmp2, tmp);
rcache_free_tmp(tmp);
rcache_get_reg_arg(0, GET_Rn());
- emit_memhandler_write(0, pc);
+ emit_memhandler_write(0);
break;
default:
goto default_;
tmp3 = (op & 0x100) >> 8;
if (op & 0x0f)
emith_add_r_imm(tmp, (op & 0x0f) << tmp3);
- emit_memhandler_write(tmp3, pc);
+ emit_memhandler_write(tmp3);
goto end_op;
case 0x0400: // MOV.B @(disp,Rm),R0 10000100mmmmdddd
case 0x0500: // MOV.W @(disp,Rm),R0 10000101mmmmdddd
tmp2 = rcache_get_reg_arg(1, SHR_R0);
tmp3 = (op & 0x300) >> 8;
emith_add_r_imm(tmp, (op & 0xff) << tmp3);
- emit_memhandler_write(tmp3, pc);
+ emit_memhandler_write(tmp3);
goto end_op;
case 0x0400: // MOV.B @(disp,GBR),R0 11000100dddddddd
case 0x0500: // MOV.W @(disp,GBR),R0 11000101dddddddd
emith_add_r_imm(tmp, 4);
tmp = rcache_get_reg_arg(1, SHR_SR);
emith_clear_msb(tmp, tmp, 22);
- emit_memhandler_write(2, pc);
+ emit_memhandler_write(2);
// push PC
rcache_get_reg_arg(0, SHR_SP);
tmp = rcache_get_tmp_arg(1);
emith_move_r_imm(tmp, pc);
- emit_memhandler_write(2, pc);
+ emit_memhandler_write(2);
// obtain new PC
emit_memhandler_read_rr(SHR_PC, SHR_VBR, (op & 0xff) * 4, 2);
// indirect jump -> back to dispatcher
tmp3 = rcache_get_reg_arg(0, SHR_GBR);
tmp4 = rcache_get_reg(SHR_R0, RC_GR_READ);
emith_add_r_r(tmp3, tmp4);
- emit_memhandler_write(0, pc);
+ emit_memhandler_write(0);
goto end_op;
}
goto default_;
default:
default_:
- elprintf(EL_ANOMALY, "%csh2 drc: unhandled op %04x @ %08x",
- sh2->is_slave ? 's' : 'm', op, pc - 2);
+ elprintf_sh2(sh2, EL_ANOMALY,
+ "drc: illegal op %04x @ %08x", op, pc - 2);
+
+ tmp = rcache_get_reg(SHR_SP, RC_GR_RMW);
+ emith_sub_r_imm(tmp, 4*2);
+ // push SR
+ tmp = rcache_get_reg_arg(0, SHR_SP);
+ emith_add_r_imm(tmp, 4);
+ tmp = rcache_get_reg_arg(1, SHR_SR);
+ emith_clear_msb(tmp, tmp, 22);
+ emit_memhandler_write(2);
+ // push PC
+ rcache_get_reg_arg(0, SHR_SP);
+ tmp = rcache_get_tmp_arg(1);
+ emith_move_r_imm(tmp, pc - 2);
+ emit_memhandler_write(2);
+ // obtain new PC
+ emit_memhandler_read_rr(SHR_PC, SHR_VBR, 4 * 4, 2);
+ // indirect jump -> back to dispatcher
+ rcache_flush();
+ emith_jump(sh2_drc_dispatcher);
break;
}
1 + cpuid, SH2_DRCBLK_DA_SHIFT, 0xfff);
}
-int sh2_execute(SH2 *sh2c, int cycles)
+int sh2_execute_drc(SH2 *sh2c, int cycles)
{
int ret_cycles;
- sh2c->cycles_timeslice = cycles;
-
// cycles are kept in SHR_SR unused bits (upper 20)
// bit11 contains T saved for delay slot
// others are usual SH2 flags
if (ret_cycles > 0)
dbg(1, "warning: drc returned with cycles: %d", ret_cycles);
- return sh2c->cycles_timeslice - ret_cycles;
+ sh2c->sr &= 0x3f3;
+ return ret_cycles;
}
#if (DRC_DEBUG & 2)
void sh2_drc_mem_setup(SH2 *sh2)
{
// fill the convenience pointers
- sh2->p_bios = sh2->is_slave ? Pico32xMem->sh2_rom_s : Pico32xMem->sh2_rom_m;
+ sh2->p_bios = sh2->is_slave ? Pico32xMem->sh2_rom_s.w : Pico32xMem->sh2_rom_m.w;
sh2->p_da = sh2->data_array;
sh2->p_sdram = Pico32xMem->sdram;
sh2->p_rom = Pico.rom;
if ((pc & ~0x7ff) == 0) {
// BIOS
- ret = is_slave ? Pico32xMem->sh2_rom_s : Pico32xMem->sh2_rom_m;
+ ret = is_slave ? Pico32xMem->sh2_rom_s.w : Pico32xMem->sh2_rom_m.w;
mask = 0x7ff;
}
else if ((pc & 0xfffff000) == 0xc0000000) {
}
else if ((pc & 0xc6000000) == 0x02000000) {
// ROM
- ret = Pico.rom;
+ if ((pc & 0x3fffff) < Pico.romsize)
+ ret = Pico.rom;
mask = 0x3fffff;
}
typedef unsigned char UINT8;
#endif
-#define RB(sh2, a) p32x_sh2_read8(a,sh2)
-#define RW(sh2, a) p32x_sh2_read16(a,sh2)
-#define RL(sh2, a) p32x_sh2_read32(a,sh2)
-#define WB(sh2, a, d) p32x_sh2_write8(a,d,sh2)
-#define WW(sh2, a, d) p32x_sh2_write16(a,d,sh2)
-#define WL(sh2, a, d) p32x_sh2_write32(a,d,sh2)
+#ifdef DRC_SH2
+
+// this nasty conversion is needed for drc-expecting memhandlers
+#define MAKE_READFUNC(name, cname) \
+static inline unsigned int name(SH2 *sh2, unsigned int a) \
+{ \
+ unsigned int ret; \
+ sh2->sr |= sh2->icount << 12; \
+ ret = cname(a, sh2); \
+ sh2->icount = (signed int)sh2->sr >> 12; \
+ sh2->sr &= 0x3f3; \
+ return ret; \
+}
+
+#define MAKE_WRITEFUNC(name, cname) \
+static inline void name(SH2 *sh2, unsigned int a, unsigned int d) \
+{ \
+ sh2->sr |= sh2->icount << 12; \
+ cname(a, d, sh2); \
+ sh2->icount = (signed int)sh2->sr >> 12; \
+ sh2->sr &= 0x3f3; \
+}
+
+MAKE_READFUNC(RB, p32x_sh2_read8)
+MAKE_READFUNC(RW, p32x_sh2_read16)
+MAKE_READFUNC(RL, p32x_sh2_read32)
+MAKE_WRITEFUNC(WB, p32x_sh2_write8)
+MAKE_WRITEFUNC(WW, p32x_sh2_write16)
+MAKE_WRITEFUNC(WL, p32x_sh2_write32)
+
+#else
+
+#define RB(sh2, a) p32x_sh2_read8(a, sh2)
+#define RW(sh2, a) p32x_sh2_read16(a, sh2)
+#define RL(sh2, a) p32x_sh2_read32(a, sh2)
+#define WB(sh2, a, d) p32x_sh2_write8(a, d, sh2)
+#define WW(sh2, a, d) p32x_sh2_write16(a, d, sh2)
+#define WL(sh2, a, d) p32x_sh2_write32(a, d, sh2)
+
+#endif
// some stuff from sh2comn.h
#define T 0x00000001
#include "sh2.c"
-#ifndef DRC_SH2
#ifndef DRC_CMP
-int sh2_execute(SH2 *sh2, int cycles)
+int sh2_execute_interpreter(SH2 *sh2, int cycles)
{
UINT32 opcode;
- sh2->icount = sh2->cycles_timeslice = cycles;
+ sh2->icount = cycles;
if (sh2->icount <= 0)
goto out;
while (sh2->icount > 0 || sh2->delay); /* can't interrupt before delay */
out:
- return sh2->cycles_timeslice - sh2->icount;
+ return sh2->icount;
}
#else // if DRC_CMP
-int sh2_execute(SH2 *sh2, int cycles)
+int sh2_execute_interpreter(SH2 *sh2, int cycles)
{
static unsigned int base_pc_[2] = { 0, 0 };
static unsigned int end_pc_[2] = { 0, 0 };
while (1);
out:
- return sh2->cycles_timeslice - sh2->icount;
+ return sh2->icount;
}
#endif // DRC_CMP
-#endif // DRC_SH2
#ifdef SH2_STATS
#include <stdio.h>
int sh2_init(SH2 *sh2, int is_slave, SH2 *other_sh2)
{
int ret = 0;
+ unsigned int mult_m68k_to_sh2 = sh2->mult_m68k_to_sh2;
+ unsigned int mult_sh2_to_m68k = sh2->mult_sh2_to_m68k;
- memset(sh2, 0, offsetof(SH2, mult_m68k_to_sh2));
+ memset(sh2, 0, sizeof(*sh2));
sh2->is_slave = is_slave;
sh2->other_sh2 = other_sh2;
+ sh2->mult_m68k_to_sh2 = mult_m68k_to_sh2;
+ sh2->mult_sh2_to_m68k = mult_sh2_to_m68k;
+
pdb_register_cpu(sh2, PDBCT_SH2, is_slave ? "ssh2" : "msh2");
#ifdef DRC_SH2
ret = sh2_drc_init(sh2);
static SH2 sh2ref[2];
static unsigned int mem_val;
-static FILE *f;
-
-enum ctl_byte {
- CTL_MASTERSLAVE = 0x80,
- CTL_EA = 0x82,
- CTL_EAVAL = 0x83,
- CTL_M68KPC = 0x84,
- CTL_CYCLES = 0x85,
-};
static unsigned int local_read32(SH2 *sh2, u32 a)
{
return 0;
}
-static void write_uint(unsigned char ctl, unsigned int v)
-{
- fwrite(&ctl, 1, 1, f);
- fwrite(&v, sizeof(v), 1, f);
-}
-
void do_sh2_trace(SH2 *current, int cycles)
{
static int current_slave = -1;
u32 val;
int i;
- if (f == NULL)
- f = fopen("tracelog", "wb");
-
if (SekPc != current_m68k_pc) {
current_m68k_pc = SekPc;
- write_uint(CTL_M68KPC, current_m68k_pc);
+ tl_write_uint(CTL_M68KPC, current_m68k_pc);
}
if (current->is_slave != current_slave) {
current_slave = current->is_slave;
v = CTL_MASTERSLAVE | current->is_slave;
- fwrite(&v, 1, 1, f);
+ tl_write(&v, sizeof(v));
}
for (i = 0; i < offsetof(SH2, read8_map) / 4; i++) {
if (i == 17) // ppc
continue;
if (regs_a[i] != regs_o[i]) {
- write_uint(i, regs_a[i]);
+ tl_write_uint(CTL_SH2_R + i, regs_a[i]);
regs_o[i] = regs_a[i];
}
}
if (current->ea != sh2o->ea) {
- write_uint(CTL_EA, current->ea);
+ tl_write_uint(CTL_EA, current->ea);
sh2o->ea = current->ea;
}
val = local_read32(current, current->ea);
if (mem_val != val) {
- write_uint(CTL_EAVAL, val);
+ tl_write_uint(CTL_EAVAL, val);
mem_val = val;
}
- write_uint(CTL_CYCLES, cycles);
+ tl_write_uint(CTL_CYCLES, cycles);
}
static const char *regnames[] = {
int cycles;
int i, ret;
- if (f == NULL) {
- f = fopen("tracelog", "rb");
- sh2ref[1].is_slave = 1;
- }
+ sh2ref[1].is_slave = 1;
while (1) {
- ret = fread(&code, 1, 1, f);
+ ret = tl_read(&code, 1);
if (ret <= 0)
break;
if (code == CTL_CYCLES) {
- fread(&cycles_o, 1, 4, f);
+ tl_read(&cycles_o, 4);
break;
}
current_slave = code & 1;
break;
case CTL_EA:
- fread(&sh2o->ea, 4, 1, f);
+ tl_read_uint(&sh2o->ea);
break;
case CTL_EAVAL:
- fread(¤t_val, 4, 1, f);
+ tl_read_uint(¤t_val);
break;
case CTL_M68KPC:
- fread(&val, 4, 1, f);
+ tl_read_uint(&val);
if (SekPc != val) {
printf("m68k: %08x %08x\n", SekPc, val);
bad = 1;
}
break;
default:
- if (code < offsetof(SH2, read8_map) / 4)
- fread(regs_o + code, 4, 1, f);
- else {
- printf("invalid code: %02x\n", code);
+ if (CTL_SH2_R <= code && code < CTL_SH2_R +
+ offsetof(SH2, read8_map) / 4)
+ {
+ tl_read_uint(regs_o + code - CTL_SH2_R);
+ }
+ else
+ {
+ printf("wrong code: %02x\n", code);
goto end;
}
break;
void sh2_pack(const SH2 *sh2, unsigned char *buff);\r
void sh2_unpack(SH2 *sh2, const unsigned char *buff);\r
\r
-int sh2_execute(SH2 *sh2, int cycles);\r
+int sh2_execute_drc(SH2 *sh2c, int cycles);\r
+int sh2_execute_interpreter(SH2 *sh2c, int cycles);\r
+\r
+static inline int sh2_execute(SH2 *sh2, int cycles, int use_drc)\r
+{\r
+ int ret;\r
+\r
+ sh2->cycles_timeslice = cycles;\r
+#ifdef DRC_SH2\r
+ if (use_drc)\r
+ ret = sh2_execute_drc(sh2, cycles);\r
+ else\r
+#endif\r
+ ret = sh2_execute_interpreter(sh2, cycles);\r
+\r
+ return sh2->cycles_timeslice - ret;\r
+}\r
\r
// regs, pending_int*, cycles, reserved\r
#define SH2_STATE_SIZE ((24 + 2 + 2 + 12) * 4)\r
static int REGPARM(2) sh2_irq_cb(SH2 *sh2, int level)
{
if (sh2->pending_irl > sh2->pending_int_irq) {
- elprintf(EL_32X, "%csh2 ack/irl %d @ %08x",
- sh2->is_slave ? 's' : 'm', level, sh2->pc);
+ elprintf_sh2(sh2, EL_32X, "ack/irl %d @ %08x",
+ level, sh2_pc(sh2));
return 64 + sh2->pending_irl / 2;
} else {
- elprintf(EL_32X, "%csh2 ack/int %d/%d @ %08x",
- sh2->is_slave ? 's' : 'm', level, sh2->pending_int_vector, sh2->pc);
+ elprintf_sh2(sh2, EL_32X, "ack/int %d/%d @ %08x",
+ level, sh2->pending_int_vector, sh2_pc(sh2));
sh2->pending_int_irq = 0; // auto-clear
sh2->pending_level = sh2->pending_irl;
return sh2->pending_int_vector;
m68k_cycles = sh2_cycles_done_m68k(active_sh2);
// msh2
- irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
+ irqs = Pico32x.sh2irqs | Pico32x.sh2irqi[0];
while ((irqs >>= 1))
mlvl++;
mlvl *= 2;
// ssh2
- irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES);
+ irqs = Pico32x.sh2irqs | Pico32x.sh2irqi[1];
while ((irqs >>= 1))
slvl++;
slvl *= 2;
elprintf(EL_32X, "update_irls: m %d/%d, s %d/%d", mlvl, mrun, slvl, srun);
}
+// the mask register is inconsistent, CMD is supposed to be a mask,
+// while others are actually irq trigger enables?
+// TODO: test on hw..
+void p32x_trigger_irq(SH2 *sh2, int m68k_cycles, unsigned int mask)
+{
+ Pico32x.sh2irqs |= mask & P32XI_VRES;
+ Pico32x.sh2irqi[0] |= mask & (Pico32x.sh2irq_mask[0] << 3);
+ Pico32x.sh2irqi[1] |= mask & (Pico32x.sh2irq_mask[1] << 3);
+
+ p32x_update_irls(sh2, m68k_cycles);
+}
+
+void p32x_update_cmd_irq(SH2 *sh2, int m68k_cycles)
+{
+ if ((Pico32x.sh2irq_mask[0] & 2) && (Pico32x.regs[2 / 2] & 1))
+ Pico32x.sh2irqi[0] |= P32XI_CMD;
+ else
+ Pico32x.sh2irqi[0] &= ~P32XI_CMD;
+
+ if ((Pico32x.sh2irq_mask[1] & 2) && (Pico32x.regs[2 / 2] & 2))
+ Pico32x.sh2irqi[1] |= P32XI_CMD;
+ else
+ Pico32x.sh2irqi[1] &= ~P32XI_CMD;
+
+ p32x_update_irls(sh2, m68k_cycles);
+}
+
void Pico32xStartup(void)
{
elprintf(EL_STATUS|EL_32X, "32X startup");
if (!Pico.m.pal)
Pico32x.vdp_regs[0] |= P32XV_nPAL;
- PREG8(msh2.peri_regs, 4) =
- PREG8(ssh2.peri_regs, 4) = 0x84; // SCI SSR
-
rendstatus_old = -1;
emu_32x_startup();
sh2_reset(&msh2);
sh2_reset(&ssh2);
+ sh2_peripheral_reset(&msh2);
+ sh2_peripheral_reset(&ssh2);
// if we don't have BIOS set, perform it's work here.
// MSH2
// program will set S_OK
}
- msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDoneT();
+ msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDone();
}
void Pico32xInit(void)
memset(&Pico32x, 0, sizeof(Pico32x));
Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
- Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
+ Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_PEN;
Pico32x.sh2_regs[0] = P32XS2_ADEN;
}
void PicoReset32x(void)
{
if (PicoAHW & PAHW_32X) {
- Pico32x.sh2irqs |= P32XI_VRES;
- p32x_update_irls(NULL, SekCyclesDoneT2());
+ msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDone();
+ p32x_trigger_irq(NULL, SekCyclesDone(), P32XI_VRES);
p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, 0);
p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES, 0);
p32x_pwm_ctl_changed();
Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
}
- Pico32x.sh2irqs |= P32XI_VINT;
- p32x_update_irls(NULL, SekCyclesDoneT2());
+ p32x_trigger_irq(NULL, SekCyclesDone(), P32XI_VINT);
p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0);
p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0);
}
-// compare cycles, handling overflows
-// check if a > b
-#define CYCLES_GT(a, b) \
- ((int)((a) - (b)) > 0)
-// check if a >= b
-#define CYCLES_GE(a, b) \
- ((int)((a) - (b)) >= 0)
+void p32x_schedule_hint(SH2 *sh2, int m68k_cycles)
+{
+ // rather rough, 32x hint is useless in practice
+ int after;
+
+ if (!((Pico32x.sh2irq_mask[0] | Pico32x.sh2irq_mask[1]) & 4))
+ return; // nobody cares
+ // note: when Pico.m.scanline is 224, SH2s might
+ // still be at scanline 93 (or so)
+ if (!(Pico32x.sh2_regs[0] & 0x80) && Pico.m.scanline > 224)
+ return;
+
+ after = (Pico32x.sh2_regs[4 / 2] + 1) * 488;
+ if (sh2 != NULL)
+ p32x_event_schedule_sh2(sh2, P32X_EVENT_HINT, after);
+ else
+ p32x_event_schedule(m68k_cycles, P32X_EVENT_HINT, after);
+}
/* events */
static void fillend_event(unsigned int now)
p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, now);
}
+static void hint_event(unsigned int now)
+{
+ p32x_trigger_irq(NULL, now, P32XI_HINT);
+ p32x_schedule_hint(NULL, now);
+}
+
typedef void (event_cb)(unsigned int now);
-unsigned int event_times[P32X_EVENT_COUNT];
+/* times are in m68k (7.6MHz) cycles */
+unsigned int p32x_event_times[P32X_EVENT_COUNT];
static unsigned int event_time_next;
-static event_cb *event_cbs[] = {
+static event_cb *p32x_event_cbs[P32X_EVENT_COUNT] = {
[P32X_EVENT_PWM] = p32x_pwm_irq_event,
[P32X_EVENT_FILLEND] = fillend_event,
+ [P32X_EVENT_HINT] = hint_event,
};
// schedule event at some time 'after', in m68k clocks
when = (now + after) | 1;
- elprintf(EL_32X, "new event #%u %u->%u", event, now, when);
- event_times[event] = when;
+ elprintf(EL_32X, "32x: new event #%u %u->%u", event, now, when);
+ p32x_event_times[event] = when;
if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
event_time_next = when;
sh2_end_run(sh2, left_to_next);
}
-static void run_events(unsigned int until)
+static void p32x_run_events(unsigned int until)
{
int oldest, oldest_diff, time;
int i, diff;
oldest = -1, oldest_diff = 0x7fffffff;
for (i = 0; i < P32X_EVENT_COUNT; i++) {
- if (event_times[i]) {
- diff = event_times[i] - until;
+ if (p32x_event_times[i]) {
+ diff = p32x_event_times[i] - until;
if (diff < oldest_diff) {
oldest_diff = diff;
oldest = i;
}
if (oldest_diff <= 0) {
- time = event_times[oldest];
- event_times[oldest] = 0;
- elprintf(EL_32X, "run event #%d %u", oldest, time);
- event_cbs[oldest](time);
+ time = p32x_event_times[oldest];
+ p32x_event_times[oldest] = 0;
+ elprintf(EL_32X, "32x: run event #%d %u", oldest, time);
+ p32x_event_cbs[oldest](time);
}
else if (oldest_diff < 0x7fffffff) {
- event_time_next = event_times[oldest];
+ event_time_next = p32x_event_times[oldest];
break;
}
else {
}
if (oldest != -1)
- elprintf(EL_32X, "next event #%d at %u", oldest, event_time_next);
+ elprintf(EL_32X, "32x: next event #%d at %u",
+ oldest, event_time_next);
}
static inline void run_sh2(SH2 *sh2, int m68k_cycles)
pevt_log_sh2_o(sh2, EVT_RUN_START);
sh2->state |= SH2_STATE_RUN;
cycles = C_M68K_TO_SH2(*sh2, m68k_cycles);
- elprintf(EL_32X, "%csh2 +run %u %d",
- sh2->is_slave?'s':'m', sh2->m68krcycles_done, cycles);
+ elprintf_sh2(sh2, EL_32X, "+run %u %d @%08x",
+ sh2->m68krcycles_done, cycles, sh2->pc);
- done = sh2_execute(sh2, cycles);
+ done = sh2_execute(sh2, cycles, PicoOpt & POPT_EN_DRC);
sh2->m68krcycles_done += C_SH2_TO_M68K(*sh2, done);
sh2->state &= ~SH2_STATE_RUN;
pevt_log_sh2_o(sh2, EVT_RUN_END);
- elprintf(EL_32X, "%csh2 -run %u %d",
- sh2->is_slave?'s':'m', sh2->m68krcycles_done, done);
+ elprintf_sh2(sh2, EL_32X, "-run %u %d",
+ sh2->m68krcycles_done, done);
}
// sync other sh2 to this one
return;
}
- elprintf(EL_32X, "%csh2 sync to %u %d",
- osh2->is_slave?'s':'m', m68k_target, m68k_cycles);
+ elprintf_sh2(osh2, EL_32X, "sync to %u %d",
+ m68k_target, m68k_cycles);
run_sh2(osh2, m68k_cycles);
while (CYCLES_GT(m68k_target, now))
{
if (event_time_next && CYCLES_GE(now, event_time_next))
- run_events(now);
+ p32x_run_events(now);
target = m68k_target;
if (event_time_next && CYCLES_GT(target, event_time_next))
}
}
-#define CPUS_RUN(m68k_cycles,s68k_cycles) do { \
+#define CPUS_RUN(m68k_cycles) do { \
SekRunM68k(m68k_cycles); \
+ if ((Pico32x.emu_flags & P32XF_Z80_32X_IO) && Pico.m.z80Run \
+ && !Pico.m.z80_reset && (PicoOpt & POPT_EN_Z80)) \
+ PicoSyncZ80(SekCyclesDone()); \
if (Pico32x.emu_flags & (P32XF_68KCPOLL|P32XF_68KVPOLL)) \
- p32x_sync_sh2s(SekCyclesDoneT2()); \
+ p32x_sync_sh2s(SekCyclesDone()); \
} while (0)
#define PICO_32X
void PicoFrame32x(void)
{
+ Pico.m.scanline = 0;
+
Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
+ if (!(Pico32x.sh2_regs[0] & 0x80))
+ p32x_schedule_hint(NULL, SekCyclesDone());
p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0);
p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0);
return;
}
- SekCycleCnt = 0;
- sh2s[0].m68krcycles_done = sh2s[1].m68krcycles_done = SekCycleCntT;
- p32x_update_irls(NULL, SekCycleCntT);
+ sh2s[0].m68krcycles_done = sh2s[1].m68krcycles_done = SekCyclesDone();
+ p32x_update_irls(NULL, SekCyclesDone());
p32x_pwm_state_loaded();
- run_events(SekCycleCntT);
+ p32x_run_events(SekCyclesDone());
}
// vim:shiftwidth=2:ts=2:expandtab
\
for (i = 320; i > 0; i--, pd++, p32x++, pmd++) { \
unsigned short t = *p32x; \
- if (*pmd != mdbg && !((t ^ inv) & 0x8000)) { \
+ if ((*pmd & 0x3f) != mdbg && !((t ^ inv) & 0x8000)) { \
pmd_draw_code; \
continue; \
} \
int i; \
for (i = 320; i > 0; i--, pd++, p32x++, pmd++) { \
t = pal[*(unsigned char *)((long)p32x ^ 1)]; \
- if ((t & 0x20) || *pmd == mdbg) \
+ if ((t & 0x20) || (*pmd & 0x3f) == mdbg) \
*pd = t; \
else \
pmd_draw_code; \
for (i = 320; i > 0; p32x++) { \
t = pal[*p32x & 0xff]; \
for (len = (*p32x >> 8) + 1; len > 0 && i > 0; len--, i--, pd++, pmd++) { \
- if (*pmd == mdbg || (t & 0x20)) \
+ if ((*pmd & 0x3f) == mdbg || (t & 0x20)) \
*pd = t; \
else \
pmd_draw_code; \
ldr r9, =HighPal @ palmd
and r4, r2, #0xff
mov r5, #328
+ lsl r3, #26 @ mdbg << 26
mla r11,r4,r5,r11 @ r11 = pmd = PicoDraw2FB + offs*328: md data
tst r10,#P32XV_PRI
moveq r10,#0
subs r6, r6, #1
blt 0b @ loop_outer
ldrh r8, [r5], #2 @ 32x pixel
- cmp r7, r3 @ MD has bg pixel?
+ cmp r3, r7, lsl #26 @ MD has bg pixel?
beq 3f @ draw32x
eor r12,r8, r10
ands r12,r12,#0x8000 @ !((t ^ inv) & 0x8000)
ldr r9, =HighPal @ palmd
and r4, r2, #0xff
mov r5, #328
+ lsl r3, #26 @ mdbg << 26
mla r11,r4,r5,r11 @ r11 = pmd = PicoDraw2FB + offs*328: md data
call_scan_prep \call_scan
tst r12,#0x20
ldrneb r12,[r11,#-2] @ MD pixel 0
eor lr, r8, #0x20
- cmpne r12,r3 @ MD has bg pixel?
+ cmpne r3, r12, lsl #26 @ MD has bg pixel?
.if \do_md
mov r12,r12,lsl #1
ldrneh r7, [r9, r12] @ t = palmd[pmd[0]]
tst lr, #0x20
ldrneb lr, [r11,#-1] @ MD pixel 1
strh r7, [r0], #2
- cmpne lr, r3 @ MD has bg pixel?
+ cmpne r3, lr, lsl #26 @ MD has bg pixel?
mov lr, lr, lsl #1
ldrneh r8, [r9, lr] @ t = palmd[pmd[1]]
strh r8, [r0], #2
tst lr, #0x20
ldrneb lr, [r11,#-1] @ MD pixel 1
add r0, r0, #4
- cmpne lr, r3 @ MD has bg pixel?
+ cmpne r3, lr, lsl #26 @ MD has bg pixel?
streqh r8, [r0, #-2]
.endif
b 2b @ loop_inner
9: @ bg_mode:
ldrb r12,[r11],#1 @ MD pixel
ldrb lr, [r11],#1
- cmp r12,r3 @ MD has bg pixel?
+ cmp r3, lr, lsl #26 @ MD has bg pixel?
.if \do_md
mov r12,r12,lsl #1
ldrneh r12,[r9, r12] @ t = palmd[*pmd]
moveq r12,r7
- cmp lr, r3
+ cmp r3, lr, lsl #26
mov lr, lr, lsl #1
ldrneh lr, [r9, lr]
moveq lr, r7
strh lr, [r0], #2
.else
streqh r7, [r0]
- cmp lr, r3
+ cmp r3, lr, lsl #26
streqh r7, [r0, #2]
add r0, r0, #4
.endif
ldr r9, =HighPal @ palmd
and r4, r2, #0xff
mov r5, #328
+ lsl r3, #26 @ mdbg << 26
mla r11,r4,r5,r11 @ r11 = pmd = PicoDraw2FB + offs*328: md data
call_scan_prep \call_scan
ldrb r7, [r11], #1 @ MD pixel
subs r6, r6, #1
blt 0b @ loop_outer
- cmp r7, r3 @ MD has bg pixel?
+ cmp r3, r7, lsl #26 @ MD has bg pixel?
mov r7, r7, lsl #1
tstne lr, #0x20
.if \do_md
* a15100 F....... R.....EA F.....AC N...VHMP 4000 // Fm Ren nrEs Aden Cart heN V H cMd Pwm
* a15102 ........ ......SM ? 4002 // intS intM
* a15104 ........ ......10 ........ hhhhhhhh 4004 // bk1 bk0 Hint
- * a15106 F....... .....SDR UE...... .....SDR 4006 // Full 68S Dma Rv fUll[fb] Empt[fb]
+ * a15106 ........ F....SDR UE...... .....SDR 4006 // Full 68S Dma Rv fUll[fb] Empt[fb]
* a15108 (32bit DREQ src) 4008
* a1510c (32bit DREQ dst) 400c
* a15110 llllllll llllll00 4010 // DREQ Len
* a15112 (16bit FIFO reg) 4012
- * a15114 ? (16bit VRES clr) 4014
- * a15116 ? (16bit Vint clr) 4016
- * a15118 ? (16bit Hint clr) 4018
- * a1511a ........ .......C (16bit CMD clr) 401a // Cm
- * a1511c ? (16bit PWM clr) 401c
- * a1511e ? ? 401e
+ * a15114 0 (16bit VRES clr) 4014
+ * a15116 0 (16bit Vint clr) 4016
+ * a15118 0 (16bit Hint clr) 4018
+ * a1511a .......? .......C (16bit CMD clr) 401a // TV Cm
+ * a1511c 0 (16bit PWM clr) 401c
+ * a1511e 0 ? 401e
* a15120 (16 bytes comm) 2020
* a15130 (PWM) 2030
*
* sys reg 0004000-00040ff 1 1
* vdp reg 0004100-00041ff 5 5
* vdp pal 0004200-00043ff 5 5
- * rom 2000000-23fffff 6-15
+ * cart 2000000-23fffff 6-15
* dram/fb 4000000-401ffff 5-12 1-3
* fb ovr 4020000-403ffff
* sdram 6000000-603ffff 12 2 (cycles)
static void bank_switch(int b);
+// addressing byte in 16bit reg
+#define REG8IN16(ptr, offs) ((u8 *)ptr)[(offs) ^ 1]
+
// poll detection
#define POLL_THRESHOLD 3
m68k_poll.addr = m68k_poll.cnt = 0;
}
-static void sh2_poll_detect(SH2 *sh2, u32 a, u32 flags)
+static void sh2_poll_detect(SH2 *sh2, u32 a, u32 flags, int maxcnt)
{
int cycles_left = sh2_cycles_left(sh2);
if (a == sh2->poll_addr && sh2->poll_cycles - cycles_left <= 10) {
- if (sh2->poll_cnt++ > 3) {
+ if (sh2->poll_cnt++ > maxcnt) {
if (!(sh2->state & flags))
- elprintf(EL_32X, "%csh2 state: %02x->%02x", sh2->is_slave?'s':'m',
+ elprintf_sh2(sh2, EL_32X, "state: %02x->%02x",
sh2->state, sh2->state | flags);
sh2->state |= flags;
void p32x_sh2_poll_event(SH2 *sh2, u32 flags, u32 m68k_cycles)
{
if (sh2->state & flags) {
- elprintf(EL_32X, "%csh2 state: %02x->%02x", sh2->is_slave?'s':'m',
- sh2->state, sh2->state & ~flags);
+ elprintf_sh2(sh2, EL_32X, "state: %02x->%02x", sh2->state,
+ sh2->state & ~flags);
if (sh2->m68krcycles_done < m68k_cycles)
sh2->m68krcycles_done = m68k_cycles;
#else
if ((a & 0x30) == 0x20) {
static u32 dr2 = 0;
- unsigned int cycles = SekCyclesDoneT();
+ unsigned int cycles = SekCyclesDone();
int comreg = 1 << (a & 0x0f) / 2;
// evil X-Men proto polls in a dbra loop and expects it to expire..
m68k_poll.cnt = 0;
dr2 = SekDar(2);
- if (cycles - msh2.m68krcycles_done > 500)
+ if (cycles - msh2.m68krcycles_done > 244
+ || (Pico32x.comm_dirty_68k & comreg))
p32x_sync_sh2s(cycles);
+
if (Pico32x.comm_dirty_sh2 & comreg)
Pico32x.comm_dirty_sh2 &= ~comreg;
else if (m68k_poll_detect(a, cycles, P32XF_68KCPOLL)) {
SekSetStop(1);
- SekEndTimeslice(16);
+ SekEndRun(16);
}
dr2 = SekDar(2);
goto out;
#endif
if (a == 2) { // INTM, INTS
- unsigned int cycles = SekCyclesDoneT();
+ unsigned int cycles = SekCyclesDone();
if (cycles - msh2.m68krcycles_done > 64)
p32x_sync_sh2s(cycles);
- return ((Pico32x.sh2irqi[0] & P32XI_CMD) >> 4) | ((Pico32x.sh2irqi[1] & P32XI_CMD) >> 3);
+ goto out;
}
if ((a & 0x30) == 0x30)
- return p32x_pwm_read16(a, NULL, SekCyclesDoneT());
+ return p32x_pwm_read16(a, NULL, SekCyclesDone());
out:
return Pico32x.regs[a / 2];
}
+static void dreq0_write(u16 *r, u32 d)
+{
+ if (!(r[6 / 2] & P32XS_68S)) {
+ elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?");
+ return; // ignored - tested
+ }
+ if (Pico32x.dmac0_fifo_ptr < DMAC_FIFO_LEN) {
+ Pico32x.dmac_fifo[Pico32x.dmac0_fifo_ptr++] = d;
+ if (Pico32x.dmac0_fifo_ptr == DMAC_FIFO_LEN)
+ r[6 / 2] |= P32XS_FULL;
+ // tested: len register decrements and 68S clears
+ // even if SH2s/DMAC aren't active..
+ r[0x10 / 2]--;
+ if (r[0x10 / 2] == 0)
+ r[6 / 2] &= ~P32XS_68S;
+
+ if ((Pico32x.dmac0_fifo_ptr & 3) == 0) {
+ p32x_sync_sh2s(SekCyclesDone());
+ p32x_dreq0_trigger();
+ }
+ }
+ else
+ elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO overflow!");
+}
+
+// writable bits tested
static void p32x_reg_write8(u32 a, u32 d)
{
u16 *r = Pico32x.regs;
m68k_poll.cnt = 0;
switch (a) {
- case 0: // adapter ctl
- r[0] = (r[0] & ~P32XS_FM) | ((d << 8) & P32XS_FM);
+ case 0x00: // adapter ctl: FM writable
+ REG8IN16(r, 0x00) = d & 0x80;
return;
- case 1: // adapter ctl, RES bit writeable
+ case 0x01: // adapter ctl: RES and ADEN writable
if ((d ^ r[0]) & d & P32XS_nRES)
p32x_reset_sh2s();
- r[0] = (r[0] & ~P32XS_nRES) | (d & P32XS_nRES);
+ REG8IN16(r, 0x01) &= ~(P32XS_nRES|P32XS_ADEN);
+ REG8IN16(r, 0x01) |= d & (P32XS_nRES|P32XS_ADEN);
return;
- case 3: // irq ctl
- if ((d & 1) != !!(Pico32x.sh2irqi[0] & P32XI_CMD)) {
- p32x_sync_sh2s(SekCyclesDoneT());
- if (d & 1)
- Pico32x.sh2irqi[0] |= P32XI_CMD;
- else
- Pico32x.sh2irqi[0] &= ~P32XI_CMD;
- p32x_update_irls(NULL, SekCyclesDoneT2());
- }
- if (!!(d & 2) != !!(Pico32x.sh2irqi[1] & P32XI_CMD)) {
- p32x_sync_sh2s(SekCyclesDoneT());
- if (d & 2)
- Pico32x.sh2irqi[1] |= P32XI_CMD;
- else
- Pico32x.sh2irqi[1] &= ~P32XI_CMD;
- p32x_update_irls(NULL, SekCyclesDoneT2());
+ case 0x02: // ignored, always 0
+ return;
+ case 0x03: // irq ctl
+ if ((d ^ r[0x02 / 2]) & 3) {
+ int cycles = SekCyclesDone();
+ p32x_sync_sh2s(cycles);
+ r[0x02 / 2] = d & 3;
+ p32x_update_cmd_irq(NULL, cycles);
}
return;
- case 5: // bank
- d &= 7;
- if (r[4 / 2] != d) {
- r[4 / 2] = d;
+ case 0x04: // ignored, always 0
+ return;
+ case 0x05: // bank
+ d &= 3;
+ if (r[0x04 / 2] != d) {
+ r[0x04 / 2] = d;
bank_switch(d);
}
return;
- case 7: // DREQ ctl
- r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_DMA|P32XS_RV));
+ case 0x06: // ignored, always 0
+ return;
+ case 0x07: // DREQ ctl
+ REG8IN16(r, 0x07) &= ~(P32XS_68S|P32XS_DMA|P32XS_RV);
+ if (!(d & P32XS_68S)) {
+ Pico32x.dmac0_fifo_ptr = 0;
+ REG8IN16(r, 0x07) &= ~P32XS_FULL;
+ }
+ REG8IN16(r, 0x07) |= d & (P32XS_68S|P32XS_DMA|P32XS_RV);
+ return;
+ case 0x08: // ignored, always 0
+ return;
+ case 0x09: // DREQ src
+ REG8IN16(r, 0x09) = d;
+ return;
+ case 0x0a:
+ REG8IN16(r, 0x0a) = d;
+ return;
+ case 0x0b:
+ REG8IN16(r, 0x0b) = d & 0xfe;
+ return;
+ case 0x0c: // ignored, always 0
+ return;
+ case 0x0d: // DREQ dest
+ case 0x0e:
+ case 0x0f:
+ case 0x10: // DREQ len
+ REG8IN16(r, a) = d;
+ return;
+ case 0x11:
+ REG8IN16(r, a) = d & 0xfc;
+ return;
+ // DREQ FIFO - writes to odd addr go to fifo
+ // do writes to even work? Reads return 0
+ case 0x12:
+ REG8IN16(r, a) = d;
+ return;
+ case 0x13:
+ d = (REG8IN16(r, 0x12) << 8) | (d & 0xff);
+ REG8IN16(r, 0x12) = 0;
+ dreq0_write(r, d);
+ return;
+ case 0x14: // ignored, always 0
+ case 0x15:
+ case 0x16:
+ case 0x17:
+ case 0x18:
+ case 0x19:
+ return;
+ case 0x1a: // what's this?
+ elprintf(EL_32X|EL_ANOMALY, "mystery w8 %02x %02x", a, d);
+ REG8IN16(r, a) = d & 0x01;
return;
case 0x1b: // TV
- r[0x1a / 2] = d;
+ REG8IN16(r, a) = d & 0x01;
+ return;
+ case 0x1c: // ignored, always 0
+ case 0x1d:
+ case 0x1e:
+ case 0x1f:
+ case 0x30:
+ return;
+ case 0x31: // PWM control
+ REG8IN16(r, a) &= ~0x0f;
+ REG8IN16(r, a) |= d & 0x0f;
+ d = r[0x30 / 2];
+ goto pwm_write;
+ case 0x32: // PWM cycle
+ REG8IN16(r, a) = d & 0x0f;
+ d = r[0x32 / 2];
+ goto pwm_write;
+ case 0x33:
+ REG8IN16(r, a) = d;
+ d = r[0x32 / 2];
+ goto pwm_write;
+ // PWM pulse regs.. Only writes to odd address send a value
+ // to FIFO; reads are 0 (except status bits)
+ case 0x34:
+ case 0x36:
+ case 0x38:
+ REG8IN16(r, a) = d;
+ return;
+ case 0x35:
+ case 0x37:
+ case 0x39:
+ d = (REG8IN16(r, a ^ 1) << 8) | (d & 0xff);
+ REG8IN16(r, a ^ 1) = 0;
+ goto pwm_write;
+ case 0x3a: // ignored, always 0
+ case 0x3b:
+ case 0x3c:
+ case 0x3d:
+ case 0x3e:
+ case 0x3f:
+ return;
+ pwm_write:
+ p32x_pwm_write16(a & ~1, d, NULL, SekCyclesDone());
return;
}
if ((a & 0x30) == 0x20) {
- u8 *r8 = (u8 *)r;
- int cycles = SekCyclesDoneT();
+ int cycles = SekCyclesDone();
int comreg;
- if (r8[a ^ 1] == d)
+ if (REG8IN16(r, a) == d)
return;
comreg = 1 << (a & 0x0f) / 2;
if (Pico32x.comm_dirty_68k & comreg)
p32x_sync_sh2s(cycles);
- r8[a ^ 1] = d;
+ REG8IN16(r, a) = d;
p32x_sh2_poll_event(&sh2s[0], SH2_STATE_CPOLL, cycles);
p32x_sh2_poll_event(&sh2s[1], SH2_STATE_CPOLL, cycles);
Pico32x.comm_dirty_68k |= comreg;
case 0x00: // adapter ctl
if ((d ^ r[0]) & d & P32XS_nRES)
p32x_reset_sh2s();
- r[0] = (r[0] & ~(P32XS_FM|P32XS_nRES)) | (d & (P32XS_FM|P32XS_nRES));
+ r[0] &= ~(P32XS_FM|P32XS_nRES|P32XS_ADEN);
+ r[0] |= d & (P32XS_FM|P32XS_nRES|P32XS_ADEN);
+ return;
+ case 0x08: // DREQ src
+ r[a / 2] = d & 0xff;
+ return;
+ case 0x0a:
+ r[a / 2] = d & ~1;
+ return;
+ case 0x0c: // DREQ dest
+ r[a / 2] = d & 0xff;
+ return;
+ case 0x0e:
+ r[a / 2] = d;
return;
case 0x10: // DREQ len
r[a / 2] = d & ~3;
return;
case 0x12: // FIFO reg
- if (!(r[6 / 2] & P32XS_68S)) {
- elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?");
- return;
- }
- if (Pico32x.dmac0_fifo_ptr < DMAC_FIFO_LEN) {
- Pico32x.dmac_fifo[Pico32x.dmac0_fifo_ptr++] = d;
- if ((Pico32x.dmac0_fifo_ptr & 3) == 0)
- p32x_dreq0_trigger();
- if (Pico32x.dmac0_fifo_ptr == DMAC_FIFO_LEN)
- r[6 / 2] |= P32XS_FULL;
- }
- break;
+ dreq0_write(r, d);
+ return;
+ case 0x1a: // TV + mystery bit
+ r[a / 2] = d & 0x0101;
+ return;
+ case 0x30: // PWM control
+ d = (r[a / 2] & ~0x0f) | (d & 0x0f);
+ r[a / 2] = d;
+ p32x_pwm_write16(a, d, NULL, SekCyclesDone());
+ return;
}
- // DREQ src, dst
- if ((a & 0x38) == 0x08) {
- r[a / 2] = d;
- return;
- }
// comm port
- else if ((a & 0x30) == 0x20) {
- int cycles = SekCyclesDoneT();
+ if ((a & 0x30) == 0x20) {
+ int cycles = SekCyclesDone();
int comreg;
if (r[a / 2] == d)
}
// PWM
else if ((a & 0x30) == 0x30) {
- p32x_pwm_write16(a, d, NULL, SekCyclesDoneT());
+ p32x_pwm_write16(a, d, NULL, SekCyclesDone());
return;
}
// VDP regs
static u32 p32x_vdp_read16(u32 a)
{
+ u32 d;
a &= 0x0e;
- return Pico32x.vdp_regs[a / 2];
+ d = Pico32x.vdp_regs[a / 2];
+ if (a == 0x0a) {
+ // tested: FEN seems to be randomly pulsing on hcnt 0x80-0xf0,
+ // most often at 0xb1-0xb5, even during vblank,
+ // what's the deal with that?
+ // we'll just fake it along with hblank for now
+ Pico32x.vdp_fbcr_fake++;
+ if (Pico32x.vdp_fbcr_fake & 4)
+ d |= P32XV_HBLK;
+ if ((Pico32x.vdp_fbcr_fake & 7) == 0)
+ d |= P32XV_nFEN;
+ }
+ return d;
}
static void p32x_vdp_write8(u32 a, u32 d)
static u32 p32x_sh2reg_read16(u32 a, SH2 *sh2)
{
u16 *r = Pico32x.regs;
- a &= 0xfe; // ?
+ a &= 0x3e;
switch (a) {
case 0x00: // adapter/irq ctl
return (r[0] & P32XS_FM) | Pico32x.sh2_regs[0]
| Pico32x.sh2irq_mask[sh2->is_slave];
case 0x04: // H count (often as comm too)
- sh2_poll_detect(sh2, a, SH2_STATE_CPOLL);
+ sh2_poll_detect(sh2, a, SH2_STATE_CPOLL, 3);
sh2s_sync_on_read(sh2);
return Pico32x.sh2_regs[4 / 2];
+ case 0x06:
+ return (r[a / 2] & ~P32XS_FULL) | 0x4000;
+ case 0x08: // DREQ src
+ case 0x0a:
+ case 0x0c: // DREQ dst
+ case 0x0e:
case 0x10: // DREQ len
return r[a / 2];
+ case 0x12: // DREQ FIFO - does this work on hw?
+ if (Pico32x.dmac0_fifo_ptr > 0) {
+ Pico32x.dmac0_fifo_ptr--;
+ r[a / 2] = Pico32x.dmac_fifo[0];
+ memmove(&Pico32x.dmac_fifo[0], &Pico32x.dmac_fifo[1],
+ Pico32x.dmac0_fifo_ptr * 2);
+ }
+ return r[a / 2];
+ case 0x14:
+ case 0x16:
+ case 0x18:
+ case 0x1a:
+ case 0x1c:
+ return 0; // ?
}
- // DREQ src, dst
- if ((a & 0x38) == 0x08)
- return r[a / 2];
// comm port
if ((a & 0x30) == 0x20) {
int comreg = 1 << (a & 0x0f) / 2;
if (Pico32x.comm_dirty_68k & comreg)
Pico32x.comm_dirty_68k &= ~comreg;
else
- sh2_poll_detect(sh2, a, SH2_STATE_CPOLL);
+ sh2_poll_detect(sh2, a, SH2_STATE_CPOLL, 3);
sh2s_sync_on_read(sh2);
return r[a / 2];
}
- if ((a & 0x30) == 0x30) {
+ if ((a & 0x30) == 0x30)
return p32x_pwm_read16(a, sh2, sh2_cycles_done_m68k(sh2));
- }
+ elprintf_sh2(sh2, EL_32X|EL_ANOMALY,
+ "unhandled sysreg r16 [%02x] @%08x", a, sh2_pc(sh2));
return 0;
}
static void p32x_sh2reg_write8(u32 a, u32 d, SH2 *sh2)
{
- a &= 0xff;
+ u16 *r = Pico32x.regs;
+ u32 old;
+ a &= 0x3f;
sh2->poll_addr = 0;
switch (a) {
- case 0: // FM
- Pico32x.regs[0] &= ~P32XS_FM;
- Pico32x.regs[0] |= (d << 8) & P32XS_FM;
+ case 0x00: // FM
+ r[0] &= ~P32XS_FM;
+ r[0] |= (d << 8) & P32XS_FM;
return;
- case 1: // HEN/irq masks
- if ((d ^ Pico32x.sh2_regs[0]) & 0x80)
- elprintf(EL_ANOMALY|EL_32X, "HEN");
- Pico32x.sh2irq_mask[sh2->is_slave] = d & 0x8f;
+ case 0x01: // HEN/irq masks
+ old = Pico32x.sh2irq_mask[sh2->is_slave];
+ if ((d ^ old) & 1)
+ p32x_pwm_sync_to_sh2(sh2);
+
+ Pico32x.sh2irq_mask[sh2->is_slave] = d & 0x0f;
Pico32x.sh2_regs[0] &= ~0x80;
Pico32x.sh2_regs[0] |= d & 0x80;
- if (d & 1)
+
+ if ((d ^ old) & 1)
p32x_pwm_schedule_sh2(sh2);
- p32x_update_irls(sh2, 0);
+ if ((old ^ d) & 2)
+ p32x_update_cmd_irq(sh2, 0);
+ if ((old ^ d) & 4)
+ p32x_schedule_hint(sh2, 0);
return;
- case 5: // H count
+ case 0x04: // ignored?
+ return;
+ case 0x05: // H count
d &= 0xff;
if (Pico32x.sh2_regs[4 / 2] != d) {
Pico32x.sh2_regs[4 / 2] = d;
sh2_end_run(sh2, 4);
}
return;
+ case 0x30:
+ REG8IN16(r, a) = d & 0x0f;
+ d = r[0x30 / 2];
+ goto pwm_write;
+ case 0x31: // PWM control
+ REG8IN16(r, a) = d & 0x8f;
+ d = r[0x30 / 2];
+ goto pwm_write;
+ case 0x32: // PWM cycle
+ REG8IN16(r, a) = d & 0x0f;
+ d = r[0x32 / 2];
+ goto pwm_write;
+ case 0x33:
+ REG8IN16(r, a) = d;
+ d = r[0x32 / 2];
+ goto pwm_write;
+ // PWM pulse regs.. Only writes to odd address send a value
+ // to FIFO; reads are 0 (except status bits)
+ case 0x34:
+ case 0x36:
+ case 0x38:
+ REG8IN16(r, a) = d;
+ return;
+ case 0x35:
+ case 0x37:
+ case 0x39:
+ d = (REG8IN16(r, a ^ 1) << 8) | (d & 0xff);
+ REG8IN16(r, a ^ 1) = 0;
+ goto pwm_write;
+ case 0x3a: // ignored, always 0?
+ case 0x3b:
+ case 0x3c:
+ case 0x3d:
+ case 0x3e:
+ case 0x3f:
+ return;
+ pwm_write:
+ p32x_pwm_write16(a & ~1, d, sh2, 0);
+ return;
}
if ((a & 0x30) == 0x20) {
- u8 *r8 = (u8 *)Pico32x.regs;
int comreg;
- if (r8[a ^ 1] == d)
+ if (REG8IN16(r, a) == d)
return;
- r8[a ^ 1] = d;
+ REG8IN16(r, a) = d;
p32x_m68k_poll_event(P32XF_68KCPOLL);
p32x_sh2_poll_event(sh2->other_sh2, SH2_STATE_CPOLL,
sh2_cycles_done_m68k(sh2));
Pico32x.comm_dirty_sh2 |= comreg;
return;
}
+
+ elprintf(EL_32X|EL_ANOMALY,
+ "unhandled sysreg w8 [%02x] %02x @%08x", a, d, sh2_pc(sh2));
}
static void p32x_sh2reg_write16(u32 a, u32 d, SH2 *sh2)
{
- a &= 0xfe;
+ a &= 0x3e;
sh2->poll_addr = 0;
Pico32x.regs[0] &= ~P32XS_FM;
Pico32x.regs[0] |= d & P32XS_FM;
break;
- case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls;
- case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
- case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
- case 0x1a: Pico32x.sh2irqi[sh2->is_slave] &= ~P32XI_CMD; goto irls;
+ case 0x14:
+ Pico32x.sh2irqs &= ~P32XI_VRES;
+ goto irls;
+ case 0x16:
+ Pico32x.sh2irqi[sh2->is_slave] &= ~P32XI_VINT;
+ goto irls;
+ case 0x18:
+ Pico32x.sh2irqi[sh2->is_slave] &= ~P32XI_HINT;
+ goto irls;
+ case 0x1a:
+ Pico32x.regs[2 / 2] &= ~(1 << sh2->is_slave);
+ p32x_update_cmd_irq(sh2, 0);
+ return;
case 0x1c:
- Pico32x.sh2irqs &= ~P32XI_PWM;
+ p32x_pwm_sync_to_sh2(sh2);
+ Pico32x.sh2irqi[sh2->is_slave] &= ~P32XI_PWM;
p32x_pwm_schedule_sh2(sh2);
goto irls;
}
if ((a & 0xfc00) != 0x5000) {
PicoWrite8_io(a, d);
+ if (a == 0xa130f1)
+ bank_switch(Pico32x.regs[4 / 2]);
return;
}
if ((a & 0xfc00) != 0x5000) {
PicoWrite16_io(a, d);
+ if (a == 0xa130f0)
+ bank_switch(Pico32x.regs[4 / 2]);
return;
}
return;
}
- elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
+ elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x",
+ a, d & 0xff, SekPc);
}
static void PicoWrite16_hint(u32 a, u32 d)
return;
}
- elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
+ elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x",
+ a, d & 0xffff, SekPc);
+}
+
+// normally not writable, but somebody could make a RAM cart
+static void PicoWrite8_cart(u32 a, u32 d)
+{
+ elprintf(EL_UIO, "m68k w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
+
+ a &= 0xfffff;
+ m68k_write8(a, d);
+}
+
+static void PicoWrite16_cart(u32 a, u32 d)
+{
+ elprintf(EL_UIO, "m68k w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
+
+ a &= 0xfffff;
+ m68k_write16(a, d);
+}
+
+// same with bank, but save ram is sometimes here
+static u32 PicoRead8_bank(u32 a)
+{
+ a = (Pico32x.regs[4 / 2] << 20) | (a & 0xfffff);
+ return m68k_read8(a);
+}
+
+static u32 PicoRead16_bank(u32 a)
+{
+ a = (Pico32x.regs[4 / 2] << 20) | (a & 0xfffff);
+ return m68k_read16(a);
+}
+
+static void PicoWrite8_bank(u32 a, u32 d)
+{
+ if (!(Pico.m.sram_reg & SRR_MAPPED))
+ elprintf(EL_UIO, "m68k w8 [%06x] %02x @%06x",
+ a, d & 0xff, SekPc);
+
+ a = (Pico32x.regs[4 / 2] << 20) | (a & 0xfffff);
+ m68k_write8(a, d);
+}
+
+static void PicoWrite16_bank(u32 a, u32 d)
+{
+ if (!(Pico.m.sram_reg & SRR_MAPPED))
+ elprintf(EL_UIO, "m68k w16 [%06x] %04x @%06x",
+ a, d & 0xffff, SekPc);
+
+ a = (Pico32x.regs[4 / 2] << 20) | (a & 0xfffff);
+ m68k_write16(a, d);
+}
+
+static void bank_map_handler(void)
+{
+ cpu68k_map_set(m68k_read8_map, 0x900000, 0x9fffff, PicoRead8_bank, 1);
+ cpu68k_map_set(m68k_read16_map, 0x900000, 0x9fffff, PicoRead16_bank, 1);
}
static void bank_switch(int b)
unsigned int rs, bank;
bank = b << 20;
+ if ((Pico.m.sram_reg & SRR_MAPPED) && bank == SRam.start) {
+ bank_map_handler();
+ return;
+ }
+
if (bank >= Pico.romsize) {
elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank);
+ bank_map_handler();
return;
}
// read8
static u32 sh2_read8_unmapped(u32 a, SH2 *sh2)
{
- elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a, 0, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "unmapped r8 [%08x] %02x @%06x",
+ a, 0, sh2_pc(sh2));
return 0;
}
{
u32 d = 0;
- // 0x3ff00 is veridied
- if ((a & 0x3ff00) == 0x4000) {
+ sh2_burn_cycles(sh2, 1*2);
+
+ // 0x3ffc0 is veridied
+ if ((a & 0x3ffc0) == 0x4000) {
d = p32x_sh2reg_read16(a, sh2);
goto out_16to8;
}
- if ((a & 0x3ff00) == 0x4100) {
+ if ((a & 0x3fff0) == 0x4100) {
d = p32x_vdp_read16(a);
- sh2_poll_detect(sh2, a, SH2_STATE_VPOLL);
+ sh2_poll_detect(sh2, a, SH2_STATE_VPOLL, 7);
goto out_16to8;
}
// TODO: mirroring?
if (!sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_m))
- return Pico32xMem->sh2_rom_m[a ^ 1];
+ return Pico32xMem->sh2_rom_m.b[a ^ 1];
if (sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_s))
- return Pico32xMem->sh2_rom_s[a ^ 1];
+ return Pico32xMem->sh2_rom_s.b[a ^ 1];
if ((a & 0x3fe00) == 0x4200) {
d = Pico32xMem->pal[(a & 0x1ff) / 2];
else
d >>= 8;
- elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "r8 [%08x] %02x @%06x",
+ a, d, sh2_pc(sh2));
return d;
}
// read16
static u32 sh2_read16_unmapped(u32 a, SH2 *sh2)
{
- elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a, 0, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "unmapped r16 [%08x] %04x @%06x",
+ a, 0, sh2_pc(sh2));
return 0;
}
{
u32 d = 0;
- if ((a & 0x3ff00) == 0x4000) {
+ sh2_burn_cycles(sh2, 1*2);
+
+ if ((a & 0x3ffc0) == 0x4000) {
d = p32x_sh2reg_read16(a, sh2);
if (!(EL_LOGMASK & EL_PWM) && (a & 0x30) == 0x30) // hide PWM
return d;
goto out;
}
- if ((a & 0x3ff00) == 0x4100) {
+ if ((a & 0x3fff0) == 0x4100) {
d = p32x_vdp_read16(a);
- sh2_poll_detect(sh2, a, SH2_STATE_VPOLL);
+ sh2_poll_detect(sh2, a, SH2_STATE_VPOLL, 7);
goto out;
}
if (!sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_m))
- return *(u16 *)(Pico32xMem->sh2_rom_m + a);
+ return Pico32xMem->sh2_rom_m.w[a / 2];
if (sh2->is_slave && a < sizeof(Pico32xMem->sh2_rom_s))
- return *(u16 *)(Pico32xMem->sh2_rom_s + a);
+ return Pico32xMem->sh2_rom_s.w[a / 2];
if ((a & 0x3fe00) == 0x4200) {
d = Pico32xMem->pal[(a & 0x1ff) / 2];
return sh2_read16_unmapped(a, sh2);
out:
- elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "r16 [%08x] %04x @%06x",
+ a, d, sh2_pc(sh2));
return d;
}
// write8
static void REGPARM(3) sh2_write8_unmapped(u32 a, u32 d, SH2 *sh2)
{
- elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a, d & 0xff, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "unmapped w8 [%08x] %02x @%06x",
+ a, d & 0xff, sh2_pc(sh2));
}
static void REGPARM(3) sh2_write8_cs0(u32 a, u32 d, SH2 *sh2)
{
- elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a, d & 0xff, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "w8 [%08x] %02x @%06x",
+ a, d & 0xff, sh2_pc(sh2));
if (Pico32x.regs[0] & P32XS_FM) {
- if ((a & 0x3ff00) == 0x4100) {
+ if ((a & 0x3fff0) == 0x4100) {
sh2->poll_addr = 0;
p32x_vdp_write8(a, d);
return;
}
}
- if ((a & 0x3ff00) == 0x4000) {
+ if ((a & 0x3ffc0) == 0x4000) {
p32x_sh2reg_write8(a, d, sh2);
return;
}
Pico32xMem->sdram[a1 ^ 1] = d;
}
+static void REGPARM(3) sh2_write8_sdram_wt(u32 a, u32 d, SH2 *sh2)
+{
+ // xmen sync hack..
+ if (a < 0x26000200)
+ sh2_end_run(sh2, 32);
+
+ sh2_write8_sdram(a, d, sh2);
+}
+
static void REGPARM(3) sh2_write8_da(u32 a, u32 d, SH2 *sh2)
{
u32 a1 = a & 0xfff;
// write16
static void REGPARM(3) sh2_write16_unmapped(u32 a, u32 d, SH2 *sh2)
{
- elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a, d & 0xffff, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "unmapped w16 [%08x] %04x @%06x",
+ a, d & 0xffff, sh2_pc(sh2));
}
static void REGPARM(3) sh2_write16_cs0(u32 a, u32 d, SH2 *sh2)
{
if (((EL_LOGMASK & EL_PWM) || (a & 0x30) != 0x30)) // hide PWM
- elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a, d & 0xffff, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "w16 [%08x] %04x @%06x",
+ a, d & 0xffff, sh2_pc(sh2));
if (Pico32x.regs[0] & P32XS_FM) {
- if ((a & 0x3ff00) == 0x4100) {
+ if ((a & 0x3fff0) == 0x4100) {
sh2->poll_addr = 0;
p32x_vdp_write16(a, d, sh2);
return;
}
}
- if ((a & 0x3ff00) == 0x4000) {
+ if ((a & 0x3ffc0) == 0x4000) {
p32x_sh2reg_write16(a, d, sh2);
return;
}
return (pd[0] << 16) | pd[1];
}
- if (offs == 0x1f)
+ if (offs == SH2MAP_ADDR2OFFS_R(0xffffc000))
return sh2_peripheral_read32(a, sh2);
handler = (sh2_read_handler *)(p << 1);
// -----------------------------------------------------------------
+static void z80_md_bank_write_32x(unsigned int a, unsigned char d)
+{
+ unsigned int addr68k;
+
+ addr68k = Pico.m.z80_bank68k << 15;
+ addr68k += a & 0x7fff;
+ if ((addr68k & 0xfff000) == 0xa15000)
+ Pico32x.emu_flags |= P32XF_Z80_32X_IO;
+
+ elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, d);
+ m68k_write8(addr68k, d);
+}
+
+// -----------------------------------------------------------------
+
static const u16 msh2_code[] = {
// trap instructions
0xaffe, // bra <self>
// MSH2
if (p32x_bios_m != NULL) {
elprintf(EL_STATUS|EL_32X, "32x: using supplied master SH2 BIOS");
- Byteswap(Pico32xMem->sh2_rom_m, p32x_bios_m, sizeof(Pico32xMem->sh2_rom_m));
+ Byteswap(&Pico32xMem->sh2_rom_m, p32x_bios_m, sizeof(Pico32xMem->sh2_rom_m));
}
else {
- pl = (u32 *)Pico32xMem->sh2_rom_m;
+ pl = (u32 *)&Pico32xMem->sh2_rom_m;
// fill exception vector table to our trap address
for (i = 0; i < 128; i++)
pl[i] = HWSWAP(0x200);
// startup code
- memcpy(Pico32xMem->sh2_rom_m + 0x200, msh2_code, sizeof(msh2_code));
+ memcpy(&Pico32xMem->sh2_rom_m.b[0x200], msh2_code, sizeof(msh2_code));
// reset SP
pl[1] = pl[3] = HWSWAP(0x6040000);
// SSH2
if (p32x_bios_s != NULL) {
elprintf(EL_STATUS|EL_32X, "32x: using supplied slave SH2 BIOS");
- Byteswap(Pico32xMem->sh2_rom_s, p32x_bios_s, sizeof(Pico32xMem->sh2_rom_s));
+ Byteswap(&Pico32xMem->sh2_rom_s, p32x_bios_s, sizeof(Pico32xMem->sh2_rom_s));
}
else {
- pl = (u32 *)Pico32xMem->sh2_rom_s;
+ pl = (u32 *)&Pico32xMem->sh2_rom_s;
// fill exception vector table to our trap address
for (i = 0; i < 128; i++)
pl[i] = HWSWAP(0x200);
// startup code
- memcpy(Pico32xMem->sh2_rom_s + 0x200, ssh2_code, sizeof(ssh2_code));
+ memcpy(&Pico32xMem->sh2_rom_s.b[0x200], ssh2_code, sizeof(ssh2_code));
// reset SP
pl[1] = pl[3] = HWSWAP(0x603f800);
rs = 0x80000;
cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
+ cpu68k_map_set(m68k_write8_map, 0x880000, 0x880000 + rs - 1, PicoWrite8_cart, 1);
+ cpu68k_map_set(m68k_write16_map, 0x880000, 0x880000 + rs - 1, PicoWrite16_cart, 1);
#ifdef EMU_F68K
// setup FAME fetchmap
PicoCpuFM68k.Fetch[0] = (unsigned long)Pico32xMem->m68k_rom;
// 32X ROM (banked)
bank_switch(0);
+ cpu68k_map_set(m68k_write8_map, 0x900000, 0x9fffff, PicoWrite8_bank, 1);
+ cpu68k_map_set(m68k_write16_map, 0x900000, 0x9fffff, PicoWrite16_bank, 1);
// SYS regs
cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_32x_on, 1);
// CS3 - SDRAM
sh2_read8_map[0x06/2].addr = sh2_read8_map[0x26/2].addr =
sh2_read16_map[0x06/2].addr = sh2_read16_map[0x26/2].addr = MAP_MEMORY(Pico32xMem->sdram);
- sh2_write8_map[0x06/2] = sh2_write8_map[0x26/2] = sh2_write8_sdram;
+ sh2_write8_map[0x06/2] = sh2_write8_sdram;
+ sh2_write8_map[0x26/2] = sh2_write8_sdram_wt;
sh2_write16_map[0x06/2] = sh2_write16_map[0x26/2] = sh2_write16_sdram;
sh2_read8_map[0x06/2].mask = sh2_read8_map[0x26/2].mask =
sh2_read16_map[0x06/2].mask = sh2_read16_map[0x26/2].mask = 0x03ffff;
sh2_drc_mem_setup(&msh2);
sh2_drc_mem_setup(&ssh2);
+
+ // z80 hack
+ z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write_32x, 1);
}
void Pico32xMemStateLoaded(void)
static int pwm_mult;
static int pwm_ptr;
static int pwm_irq_reload;
+static int pwm_doing_fifo;
+static int pwm_silent;
void p32x_pwm_ctl_changed(void)
{
cycles = (cycles - 1) & 0x0fff;
pwm_cycles = cycles;
- pwm_mult = 0x10000 / cycles;
+
+ // supposedly we should stop FIFO when xMd is 0,
+ // but mars test disagrees
+ pwm_mult = 0;
+ if ((control & 0x0f) != 0)
+ pwm_mult = 0x10000 / cycles;
pwm_irq_reload = (control & 0x0f00) >> 8;
pwm_irq_reload = ((pwm_irq_reload - 1) & 0x0f) + 1;
static void do_pwm_irq(SH2 *sh2, unsigned int m68k_cycles)
{
- Pico32x.sh2irqs |= P32XI_PWM;
- p32x_update_irls(sh2, m68k_cycles);
+ p32x_trigger_irq(sh2, m68k_cycles, P32XI_PWM);
if (Pico32x.regs[0x30 / 2] & P32XP_RTP) {
p32x_event_schedule(m68k_cycles, P32X_EVENT_PWM, pwm_cycles / 3 + 1);
}
}
+static int convert_sample(unsigned int v)
+{
+ if (v == 0)
+ return 0;
+ if (v > pwm_cycles)
+ v = pwm_cycles;
+ return ((int)v - pwm_cycles / 2) * pwm_mult;
+}
+
#define consume_fifo(sh2, m68k_cycles) { \
int cycles_diff = ((m68k_cycles) * 3) - Pico32x.pwm_cycle_p; \
if (cycles_diff >= pwm_cycles) \
static void consume_fifo_do(SH2 *sh2, unsigned int m68k_cycles,
int sh2_cycles_diff)
{
- int do_irq = 0;
+ struct Pico32xMem *mem = Pico32xMem;
+ unsigned short *fifo_l = mem->pwm_fifo[0];
+ unsigned short *fifo_r = mem->pwm_fifo[1];
+ int sum = 0;
- if (pwm_cycles == 0)
+ if (pwm_cycles == 0 || pwm_doing_fifo)
return;
elprintf(EL_PWM, "pwm: %u: consume %d/%d, %d,%d ptr %d",
m68k_cycles, sh2_cycles_diff, sh2_cycles_diff / pwm_cycles,
Pico32x.pwm_p[0], Pico32x.pwm_p[1], pwm_ptr);
- if (sh2_cycles_diff >= pwm_cycles * 17) {
- // silence/skip
- Pico32x.pwm_cycle_p = m68k_cycles * 3;
- Pico32x.pwm_p[0] = Pico32x.pwm_p[1] = 0;
- return;
- }
-
- while (sh2_cycles_diff >= pwm_cycles) {
- struct Pico32xMem *mem = Pico32xMem;
- short *fifo_l = mem->pwm_fifo[0];
- short *fifo_r = mem->pwm_fifo[1];
+ // this is for recursion from dreq1 writes
+ pwm_doing_fifo = 1;
+ for (; sh2_cycles_diff >= pwm_cycles; sh2_cycles_diff -= pwm_cycles)
+ {
if (Pico32x.pwm_p[0] > 0) {
fifo_l[0] = fifo_l[1];
fifo_l[1] = fifo_l[2];
fifo_l[2] = fifo_l[3];
Pico32x.pwm_p[0]--;
+ mem->pwm_current[0] = convert_sample(fifo_l[0]);
+ sum += mem->pwm_current[0];
}
if (Pico32x.pwm_p[1] > 0) {
fifo_r[0] = fifo_r[1];
fifo_r[1] = fifo_r[2];
fifo_r[2] = fifo_r[3];
Pico32x.pwm_p[1]--;
+ mem->pwm_current[1] = convert_sample(fifo_r[0]);
+ sum += mem->pwm_current[1];
}
- mem->pwm[pwm_ptr * 2 ] = fifo_l[0];
- mem->pwm[pwm_ptr * 2 + 1] = fifo_r[0];
+ mem->pwm[pwm_ptr * 2 ] = mem->pwm_current[0];
+ mem->pwm[pwm_ptr * 2 + 1] = mem->pwm_current[1];
pwm_ptr = (pwm_ptr + 1) & (PWM_BUFF_LEN - 1);
- sh2_cycles_diff -= pwm_cycles;
-
if (--Pico32x.pwm_irq_cnt == 0) {
Pico32x.pwm_irq_cnt = pwm_irq_reload;
- // irq also does dreq1, so call it after cycle update
- do_irq = 1;
- break;
+ do_pwm_irq(sh2, m68k_cycles);
}
}
Pico32x.pwm_cycle_p = m68k_cycles * 3 - sh2_cycles_diff;
-
- if (do_irq)
- do_pwm_irq(sh2, m68k_cycles);
+ pwm_doing_fifo = 0;
+ if (sum != 0)
+ pwm_silent = 0;
}
static int p32x_pwm_schedule_(SH2 *sh2, unsigned int m68k_now)
if (cycles_diff_sh2 >= pwm_cycles)
consume_fifo_do(sh2, m68k_now, cycles_diff_sh2);
- if (Pico32x.sh2irqs & P32XI_PWM)
- return 0; // previous not acked
if (!((Pico32x.sh2irq_mask[0] | Pico32x.sh2irq_mask[1]) & 1))
return 0; // masked by everyone
p32x_event_schedule_sh2(sh2, P32X_EVENT_PWM, after);
}
+void p32x_pwm_sync_to_sh2(SH2 *sh2)
+{
+ int m68k_cycles = sh2_cycles_done_m68k(sh2);
+ consume_fifo(sh2, m68k_cycles);
+}
+
void p32x_pwm_irq_event(unsigned int m68k_now)
{
p32x_pwm_schedule(m68k_now);
a &= 0x0e;
if (a == 0) { // control
- // supposedly we should stop FIFO when xMd is 0,
- // but mars test disagrees
+ // avoiding pops..
+ if ((Pico32x.regs[0x30 / 2] & 0x0f) == 0)
+ Pico32xMem->pwm_fifo[0][0] = Pico32xMem->pwm_fifo[1][0] = 0;
Pico32x.regs[0x30 / 2] = d;
p32x_pwm_ctl_changed();
Pico32x.pwm_irq_cnt = pwm_irq_reload; // ?
}
else if (a <= 8) {
d = (d - 1) & 0x0fff;
- if (d > pwm_cycles)
- d = pwm_cycles;
- d = (d - pwm_cycles / 2) * pwm_mult;
if (a == 4 || a == 8) { // L ch or MONO
- short *fifo = Pico32xMem->pwm_fifo[0];
+ unsigned short *fifo = Pico32xMem->pwm_fifo[0];
if (Pico32x.pwm_p[0] < 3)
Pico32x.pwm_p[0]++;
else {
fifo[Pico32x.pwm_p[0]] = d;
}
if (a == 6 || a == 8) { // R ch or MONO
- short *fifo = Pico32xMem->pwm_fifo[1];
+ unsigned short *fifo = Pico32xMem->pwm_fifo[1];
if (Pico32x.pwm_p[1] < 3)
Pico32x.pwm_p[1]++;
else {
int p = 0;
int xmd;
+ consume_fifo(NULL, SekCyclesDone());
+
xmd = Pico32x.regs[0x30 / 2] & 0x0f;
- if ((xmd != 0x05 && xmd != 0x0a) || pwm_ptr <= 16)
- goto out;
+ if (xmd == 0 || xmd == 0x06 || xmd == 0x09 || xmd == 0x0f)
+ goto out; // invalid?
+ if (pwm_silent)
+ return;
- step = (pwm_ptr << 16) / length; // FIXME: division..
+ step = (pwm_ptr << 16) / length;
pwmb = Pico32xMem->pwm;
if (stereo)
{
- if (xmd == 0x0a) {
+ if (xmd == 0x05) {
+ // normal
+ while (length-- > 0) {
+ *buf32++ += pwmb[0];
+ *buf32++ += pwmb[1];
+
+ p += step;
+ pwmb += (p >> 16) * 2;
+ p &= 0xffff;
+ }
+ }
+ else if (xmd == 0x0a) {
// channel swap
while (length-- > 0) {
*buf32++ += pwmb[1];
}
}
else {
+ // mono - LMD, RMD specify dst
+ if (xmd & 0x06) // src is R
+ pwmb++;
+ if (xmd & 0x0c) // dst is R
+ buf32++;
while (length-- > 0) {
- *buf32++ += pwmb[0];
- *buf32++ += pwmb[1];
+ *buf32 += *pwmb;
p += step;
pwmb += (p >> 16) * 2;
p &= 0xffff;
+ buf32 += 2;
}
}
}
else
{
+ // mostly unused
while (length-- > 0) {
*buf32++ += pwmb[0];
out:
pwm_ptr = 0;
+ pwm_silent = Pico32xMem->pwm_current[0] == 0
+ && Pico32xMem->pwm_current[1] == 0;
}
void p32x_pwm_state_loaded(void)
p32x_pwm_ctl_changed();
// for old savestates
- cycles_diff_sh2 = SekCycleCntT * 3 - Pico32x.pwm_cycle_p;
+ cycles_diff_sh2 = SekCycleCnt * 3 - Pico32x.pwm_cycle_p;
if (cycles_diff_sh2 >= pwm_cycles || cycles_diff_sh2 < 0) {
Pico32x.pwm_irq_cnt = pwm_irq_reload;
- Pico32x.pwm_cycle_p = SekCycleCntT * 3;
- p32x_pwm_schedule(SekCycleCntT);
+ Pico32x.pwm_cycle_p = SekCycleCnt * 3;
+ p32x_pwm_schedule(SekCycleCnt);
}
}
{
chan->chcr |= DMA_TE; // DMA has ended normally
- p32x_sh2_poll_event(sh2, SH2_STATE_SLEEP, SekCyclesDoneT());
+ p32x_sh2_poll_event(sh2, SH2_STATE_SLEEP, SekCyclesDone());
if (chan->chcr & DMA_IE)
dmac_te_irq(sh2, chan);
}
// DMA trigger by SH2 register write
static void dmac_trigger(SH2 *sh2, struct dma_chan *chan)
{
- elprintf(EL_32XP, "sh2 DMA %08x->%08x, cnt %d, chcr %04x @%06x",
+ elprintf_sh2(sh2, EL_32XP, "DMA %08x->%08x, cnt %d, chcr %04x @%06x",
chan->sar, chan->dar, chan->tcr, chan->chcr, sh2->pc);
chan->tcr &= 0xffffff;
// DREQ0 is only sent after first 4 words are written.
// we do multiple of 4 words to avoid messing up alignment
- if (chan->sar == 0x20004012) {
+ if ((chan->sar & ~0x20000000) == 0x00004012) {
if (Pico32x.dmac0_fifo_ptr && (Pico32x.dmac0_fifo_ptr & 3) == 0) {
elprintf(EL_32XP, "68k -> sh2 DMA");
p32x_dreq0_trigger();
return;
}
+ // DREQ1
+ if ((chan->dar & 0xc7fffff0) == 0x00004030)
+ return;
+
elprintf(EL_32XP|EL_ANOMALY, "unhandled DMA: "
"%08x->%08x, cnt %d, chcr %04x @%06x",
chan->sar, chan->dar, chan->tcr, chan->chcr, sh2->pc);
}
}
+void sh2_peripheral_reset(SH2 *sh2)
+{
+ memset(sh2->peri_regs, 0, sizeof(sh2->peri_regs)); // ?
+ PREG8(sh2->peri_regs, 0x001) = 0xff; // SCI BRR
+ PREG8(sh2->peri_regs, 0x003) = 0xff; // SCI TDR
+ PREG8(sh2->peri_regs, 0x004) = 0x84; // SCI SSR
+ PREG8(sh2->peri_regs, 0x011) = 0x01; // TIER
+ PREG8(sh2->peri_regs, 0x017) = 0xe0; // TOCR
+}
+
// ------------------------------------------------------------------
// SH2 internal peripheral memhandlers
// we keep them in little endian format
a &= 0x1ff;
d = PREG8(r, a);
- elprintf(EL_32XP, "%csh2 peri r8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a | ~0x1ff, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32XP, "peri r8 [%08x] %02x @%06x",
+ a | ~0x1ff, d, sh2_pc(sh2));
return d;
}
a &= 0x1ff;
d = r[(a / 2) ^ 1];
- elprintf(EL_32XP, "%csh2 peri r16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a | ~0x1ff, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32XP, "peri r16 [%08x] %04x @%06x",
+ a | ~0x1ff, d, sh2_pc(sh2));
return d;
}
a &= 0x1fc;
d = sh2->peri_regs[a / 4];
- elprintf(EL_32XP, "%csh2 peri r32 [%08x] %08x @%06x",
- sh2->is_slave ? 's' : 'm', a | ~0x1ff, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32XP, "peri r32 [%08x] %08x @%06x",
+ a | ~0x1ff, d, sh2_pc(sh2));
return d;
}
+static void sci_trigger(SH2 *sh2, u8 *r)
+{
+ u8 *oregs;
+
+ if (!(PREG8(r, 2) & 0x20))
+ return; // transmitter not enabled
+ if ((PREG8(r, 4) & 0x80)) // TDRE - TransmitDataR Empty
+ return;
+
+ oregs = (u8 *)sh2->other_sh2->peri_regs;
+ if (!(PREG8(oregs, 2) & 0x10))
+ return; // receiver not enabled
+
+ PREG8(oregs, 5) = PREG8(r, 3); // other.RDR = this.TDR
+ PREG8(r, 4) |= 0x80; // TDRE - TDR empty
+ PREG8(oregs, 4) |= 0x40; // RDRF - RDR Full
+
+ // might need to delay these a bit..
+ if (PREG8(r, 2) & 0x80) { // TIE - tx irq enabled
+ int level = PREG8(oregs, 0x60) >> 4;
+ int vector = PREG8(oregs, 0x64) & 0x7f;
+ elprintf_sh2(sh2, EL_32XP, "SCI tx irq (%d, %d)",
+ level, vector);
+ sh2_internal_irq(sh2, level, vector);
+ }
+ // TODO: TEIE
+ if (PREG8(oregs, 2) & 0x40) { // RIE - rx irq enabled
+ int level = PREG8(oregs, 0x60) >> 4;
+ int vector = PREG8(oregs, 0x63) & 0x7f;
+ elprintf_sh2(sh2->other_sh2, EL_32XP, "SCI rx irq (%d, %d)",
+ level, vector);
+ sh2_internal_irq(sh2->other_sh2, level, vector);
+ }
+}
+
void REGPARM(3) sh2_peripheral_write8(u32 a, u32 d, SH2 *sh2)
{
u8 *r = (void *)sh2->peri_regs;
- elprintf(EL_32XP, "%csh2 peri w8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
+ u8 old;
+
+ elprintf_sh2(sh2, EL_32XP, "peri w8 [%08x] %02x @%06x",
+ a, d, sh2_pc(sh2));
a &= 0x1ff;
- PREG8(r, a) = d;
+ old = PREG8(r, a);
- // X-men SCI hack
- if ((a == 2 && (d & 0x20)) || // transmiter enabled
- (a == 4 && !(d & 0x80))) { // valid data in TDR
- void *oregs = sh2->other_sh2->peri_regs;
- if ((PREG8(oregs, 2) & 0x50) == 0x50) { // receiver + irq enabled
- int level = PREG8(oregs, 0x60) >> 4;
- int vector = PREG8(oregs, 0x63) & 0x7f;
- elprintf(EL_32XP, "%csh2 SCI recv irq (%d, %d)",
- (sh2->is_slave ^ 1) ? 's' : 'm', level, vector);
- sh2_internal_irq(sh2->other_sh2, level, vector);
- return;
+ switch (a) {
+ case 0x002: // SCR - serial control
+ if (!(PREG8(r, a) & 0x20) && (d & 0x20)) { // TE being set
+ PREG8(r, a) = d;
+ sci_trigger(sh2, r);
}
+ break;
+ case 0x003: // TDR - transmit data
+ break;
+ case 0x004: // SSR - serial status
+ d = (old & (d | 0x06)) | (d & 1);
+ PREG8(r, a) = d;
+ sci_trigger(sh2, r);
+ return;
+ case 0x005: // RDR - receive data
+ break;
+ case 0x010: // TIER
+ if (d & 0x8e)
+ elprintf(EL_32XP|EL_ANOMALY, "TIER: %02x", d);
+ d = (d & 0x8e) | 1;
+ break;
+ case 0x017: // TOCR
+ d |= 0xe0;
+ break;
}
+ PREG8(r, a) = d;
}
void REGPARM(3) sh2_peripheral_write16(u32 a, u32 d, SH2 *sh2)
{
u16 *r = (void *)sh2->peri_regs;
- elprintf(EL_32XP, "%csh2 peri w16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32XP, "peri w16 [%08x] %04x @%06x",
+ a, d, sh2_pc(sh2));
a &= 0x1ff;
void REGPARM(3) sh2_peripheral_write32(u32 a, u32 d, SH2 *sh2)
{
u32 *r = sh2->peri_regs;
- elprintf(EL_32XP, "%csh2 peri w32 [%08x] %08x @%06x",
- sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
+ u32 old;
+
+ elprintf_sh2(sh2, EL_32XP, "peri w32 [%08x] %08x @%06x",
+ a, d, sh2_pc(sh2));
a &= 0x1fc;
+ old = r[a / 4];
r[a / 4] = d;
switch (a) {
// division unit (TODO: verify):
case 0x104: // DVDNT: divident L, starts divide
- elprintf(EL_32XP, "%csh2 divide %08x / %08x",
- sh2->is_slave ? 's' : 'm', d, r[0x100 / 4]);
+ elprintf_sh2(sh2, EL_32XP, "divide %08x / %08x",
+ d, r[0x100 / 4]);
if (r[0x100 / 4]) {
signed int divisor = r[0x100 / 4];
r[0x118 / 4] = r[0x110 / 4] = (signed int)d % divisor;
r[0x110 / 4] = r[0x114 / 4] = r[0x118 / 4] = r[0x11c / 4] = 0; // ?
break;
case 0x114:
- elprintf(EL_32XP, "%csh2 divide %08x%08x / %08x @%08x",
- sh2->is_slave ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32XP, "divide %08x%08x / %08x @%08x",
+ r[0x110 / 4], d, r[0x100 / 4], sh2_pc(sh2));
if (r[0x100 / 4]) {
signed long long divident = (signed long long)r[0x110 / 4] << 32 | d;
signed int divisor = r[0x100 / 4];
r[0x11c / 4] = r[0x114 / 4] = divident;
divident >>= 31;
if ((unsigned long long)divident + 1 > 1) {
- //elprintf(EL_32XP, "%csh2 divide overflow! @%08x",
- // sh2->is_slave ? 's' : 'm', sh2_pc(sh2));
+ //elprintf_sh2(sh2, EL_32XP, "divide overflow! @%08x", sh2_pc(sh2));
r[0x11c / 4] = r[0x114 / 4] = divident > 0 ? 0x7fffffff : 0x80000000; // overflow
}
}
// perhaps starting a DMA?
if (a == 0x1b0 || a == 0x18c || a == 0x19c) {
struct dmac *dmac = (void *)&sh2->peri_regs[0x180 / 4];
+ if (a == 0x1b0 && !((old ^ d) & d & DMA_DME))
+ return;
if (!(dmac->dmaor & DMA_DME))
return;
/* 32X specific */
static void dreq0_do(SH2 *sh2, struct dma_chan *chan)
{
- unsigned short *dreqlen = &Pico32x.regs[0x10 / 2];
+ unsigned short dreqlen = Pico32x.regs[0x10 / 2];
int i;
// debug/sanity checks
- if (chan->tcr != *dreqlen)
- elprintf(EL_32XP|EL_ANOMALY, "dreq0: tcr0 and len differ: %d != %d",
- chan->tcr, *dreqlen);
+ if (chan->tcr < dreqlen || chan->tcr > dreqlen + 4)
+ elprintf(EL_32XP|EL_ANOMALY, "dreq0: tcr0/len inconsistent: %d/%d",
+ chan->tcr, dreqlen);
// note: DACK is not connected, single addr mode should not be used
if ((chan->chcr & 0x3f08) != 0x0400)
elprintf(EL_32XP|EL_ANOMALY, "dreq0: bad control: %04x", chan->chcr);
- if (chan->sar != 0x20004012)
- elprintf(EL_32XP|EL_ANOMALY, "dreq0: bad sar?: %08x\n", chan->sar);
+ if ((chan->sar & ~0x20000000) != 0x00004012)
+ elprintf(EL_32XP|EL_ANOMALY, "dreq0: bad sar?: %08x", chan->sar);
// HACK: assume bus is busy and SH2 is halted
sh2->state |= SH2_STATE_SLEEP;
for (i = 0; i < Pico32x.dmac0_fifo_ptr && chan->tcr > 0; i++) {
- elprintf(EL_32XP, "dmaw [%08x] %04x, left %d",
- chan->dar, Pico32x.dmac_fifo[i], *dreqlen);
+ elprintf_sh2(sh2, EL_32XP, "dreq0 [%08x] %04x, dreq_len %d",
+ chan->dar, Pico32x.dmac_fifo[i], dreqlen);
p32x_sh2_write16(chan->dar, Pico32x.dmac_fifo[i], sh2);
chan->dar += 2;
chan->tcr--;
- (*dreqlen)--;
}
if (Pico32x.dmac0_fifo_ptr != i)
Pico32x.dmac0_fifo_ptr -= i;
Pico32x.regs[6 / 2] &= ~P32XS_FULL;
- if (*dreqlen == 0)
- Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
if (chan->tcr == 0)
dmac_transfer_complete(sh2, chan);
else
hit = 1;
}
- if (!hit)
- elprintf(EL_32XP|EL_ANOMALY, "dreq1: nobody cared");
+ // debug
+#if (EL_LOGMASK & (EL_32XP|EL_ANOMALY))
+ {
+ static int miss_count;
+ if (!hit) {
+ if (++miss_count == 4)
+ elprintf(EL_32XP|EL_ANOMALY, "dreq1: nobody cared");
+ }
+ else
+ miss_count = 0;
+ }
+#endif
+ (void)hit;
}
// vim:shiftwidth=2:ts=2:expandtab
{\r
int i, len = strlen(s1);\r
const char *s_rom = (const char *)Pico.rom;\r
+ if (rom_offset + len > Pico.romsize)\r
+ return 0;\r
for (i = 0; i < len; i++)\r
if (s1[i] != s_rom[(i + rom_offset) ^ 1])\r
return 1;\r
SRam.flags &= ~SRF_EEPROM;\r
else if (strcmp(p, "filled_sram") == 0)\r
*fill_sram = 1;\r
+ else if (strcmp(p, "force_6btn") == 0)\r
+ PicoQuirks |= PQUIRK_FORCE_6BTN;\r
else {\r
elprintf(EL_STATUS, "carthw:%d: unsupported prop: %s", line, p);\r
goto bad_nomsg;\r
}\r
+ elprintf(EL_STATUS, "game prop: %s", p);\r
continue;\r
}\r
else if (is_expr("eeprom_type", &p)) {\r
# no_sram - don't emulate sram/EEPROM even if ROM headers tell it's there
# no_eeprom - save storage is not EEPROM, even if ROM headers tell it is
# filled_sram - save storage needs to be initialized with FFh instead of 00h
+# force_6btn - game only supports 6 button pad (32X X-men proto)
#
# mappers (hw = ...):
# ssf2_mapper - used in Super Street Fighter2
[Virtua Racing - SVP]
check_str = 0x150, "Virtua Racing"
+check_str = 0x810, "OHMP"
hw = svp
[Virtua Racing - SVP]
check_str = 0x150, "VIRTUA RACING"
+check_str = 0x810, "OHMP"
hw = svp
[Pico]
check_str = 0x150, "MICRO MACHINES II"
prop = filled_sram
+# X-Men proto
+[X-Men (prototype)]
+check_str = 0x150, "32X SAMPLE PROGRAM"
+check_str = 0x32b74c, "Bishop Level"
+prop = force_6btn
+
# The SSF2 mapper
[Super Street Fighter II - The New Challengers (U)]
check_str = 0x150, "SUPER STREET FIGHTER2 The New Challengers"
# The Pier Solar mapper, custom eeprom location
[Pier Solar and the Great Architects]
-check_str = 0x150, "PIER SOLAR\99&THE GREAT ARCHITECTSŠ WaterMelon\99"
+check_str = 0x150, "PIER"
+check_str = 0x610, "Respect"
hw = piersolar_mapper
-sram_range = 0xa13009,0xa1300b
-eeprom_type = 3
-eeprom_lines = 2,1,0
# detect *_in_1 based on first game and if it's larger than it should be,
# as some dumps look like to be incomplete.
static const char builtin_carthw_cfg[] =
"[]\n"
"check_str=0x150,\"Virtua Racing\"\n"
+ "check_str=0x810,\"OHMP\"\n"
"hw=svp\n"
"[]\n"
"check_str=0x150,\"VIRTUA RACING\"\n"
+ "check_str=0x810,\"OHMP\"\n"
"hw=svp\n"
"[]\n"
"check_str=0x100,\"SEGA PICO\"\n"
"check_str=0x150,\"MICRO MACHINES II\"\n"
"prop=filled_sram\n"
"[]\n"
+ "check_str=0x150,\"32X SAMPLE PROGRAM\"\n"
+ "check_str=0x32b74c,\"Bishop Level\"\n"
+ "prop=force_6btn\n"
+ "[]\n"
"check_str=0x150,\"SUPER STREET FIGHTER2 The New Challengers\"\n"
"hw=ssf2_mapper\n"
"prop=no_sram\n"
"[]\n"
- "check_str=0x150,\"PIER SOLAR\x99&THE GREAT ARCHITECTS\xa9 WaterMelon\x99\"\n"
+ "check_str=0x150,\"PIER\"\n"
+ "check_str=0x610,\"Respect\"\n"
"hw=piersolar_mapper\n"
- "sram_range=0xa13009,0xa1300b\n"
- "eeprom_type=3\n"
- "eeprom_lines=2,1,0\n"
"[]\n"
"check_str=0x120,\"FLICKY\"\n"
"check_size_gt=0x020000\n"
unsigned short *dest;\r
unsigned char *src;\r
\r
- if (Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))\r
+ if (1) //Pico_mcd->cdc.DBC.N <= (CDC_DMA_SPEED * 2))\r
{\r
length = (Pico_mcd->cdc.DBC.N + 1) >> 1;\r
Pico_mcd->scd.Status_CDC &= ~0x08; // Last transfer\r
{\r
Pico_mcd->cdc.IFSTAT &= ~0x40;\r
\r
- if (Pico_mcd->s68k_regs[0x33] & (1<<5))\r
+ if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN5)\r
{\r
elprintf(EL_INTS, "cdc DTE irq 5");\r
SekInterruptS68k(5);\r
cdprintf("************** Starting Data Transfer ***********");\r
cdprintf("RS0 = %.4X DAC = %.4X DBC = %.4X DMA adr = %.4X\n\n", Pico_mcd->s68k_regs[4]<<8,\r
Pico_mcd->cdc.DAC.N, Pico_mcd->cdc.DBC.N, (Pico_mcd->s68k_regs[0xA]<<8) | Pico_mcd->s68k_regs[0xB]);\r
+\r
+ // tmp\r
+ {\r
+ int ddx = Pico_mcd->s68k_regs[4] & 7;\r
+ if (ddx < 2) break; // invalid\r
+ if (ddx < 4) {\r
+ Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port\r
+ break;\r
+ }\r
+ if (ddx == 6) break; // invalid\r
+\r
+ pcd_event_schedule_s68k(PCD_EVENT_DMA, Pico_mcd->cdc.DBC.N / 2);\r
+ }\r
}\r
break;\r
\r
\r
Pico_mcd->s68k_regs[0x37] &= 3; // CDD.Control\r
\r
- if (Pico_mcd->s68k_regs[0x33] & (1<<4))\r
+ if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4)\r
{\r
elprintf(EL_INTS, "cdd export irq 4");\r
SekInterruptS68k(4);\r
if (delay < 0) delay = -delay;\r
delay >>= 12;\r
\r
+ // based on genplys GX\r
+ if (delay < 13)\r
+ delay = 13;\r
+\r
Pico_mcd->scd.Cur_LBA = new_lba;\r
CDC_Update_Header();\r
\r
#define _rot_comp Pico_mcd->rot_comp
-static const int Table_Rot_Time[] =
-{
- 0x00054000, 0x00048000, 0x00040000, 0x00036000, //; 008-032 ; briefing - sprite
- 0x0002E000, 0x00028000, 0x00024000, 0x00022000, //; 036-064 ; arbre souvent
- 0x00021000, 0x00020000, 0x0001E000, 0x0001B800, //; 068-096 ; map thunderstrike
- 0x00019800, 0x00017A00, 0x00015C00, 0x00013E00, //; 100-128 ; logo dÊfoncÊ
-
- 0x00012000, 0x00011800, 0x00011000, 0x00010800, //; 132-160 ; briefing - map
- 0x00010000, 0x0000F800, 0x0000F000, 0x0000E800, //; 164-192
- 0x0000E000, 0x0000D800, 0x0000D000, 0x0000C800, //; 196-224
- 0x0000C000, 0x0000B800, 0x0000B000, 0x0000A800, //; 228-256 ; batman visage
-
- 0x0000A000, 0x00009F00, 0x00009E00, 0x00009D00, //; 260-288
- 0x00009C00, 0x00009B00, 0x00009A00, 0x00009900, //; 292-320
- 0x00009800, 0x00009700, 0x00009600, 0x00009500, //; 324-352
- 0x00009400, 0x00009300, 0x00009200, 0x00009100, //; 356-384
-
- 0x00009000, 0x00008F00, 0x00008E00, 0x00008D00, //; 388-416
- 0x00008C00, 0x00008B00, 0x00008A00, 0x00008900, //; 420-448
- 0x00008800, 0x00008700, 0x00008600, 0x00008500, //; 452-476
- 0x00008400, 0x00008300, 0x00008200, 0x00008100, //; 480-512
-};
-
+static void gfx_do_line(unsigned int func, unsigned short *stamp_base,
+ unsigned int H_Dot);
static void gfx_cd_start(void)
{
- int upd_len;
+ int w, h;
+
+ w = _rot_comp.Reg_62;
+ h = _rot_comp.Reg_64;
+ if (w == 0 || h == 0) {
+ elprintf(EL_CD|EL_ANOMALY, "gfx_cd_start with %ux%u", w, h);
+ _rot_comp.Reg_64 = 0;
+ // irq?
+ return;
+ }
// _rot_comp.XD_Mul = ((_rot_comp.Reg_5C & 0x1f) + 1) * 4; // unused
_rot_comp.Function = (_rot_comp.Reg_58 & 7) | (Pico_mcd->s68k_regs[3] & 0x18); // Jmp_Adr
_rot_comp.YD = (_rot_comp.Reg_60 >> 3) & 7;
_rot_comp.Vector_Adr = (_rot_comp.Reg_66 & 0xfffe) << 2;
- upd_len = (_rot_comp.Reg_62 >> 3) & 0x3f;
- upd_len = Table_Rot_Time[upd_len];
- _rot_comp.Draw_Speed = _rot_comp.Float_Part = upd_len;
-
_rot_comp.Reg_58 |= 0x8000; // Stamp_Size, we start a new GFX operation
+ pcd_event_schedule_s68k(PCD_EVENT_GFX, 5 * w * h);
+
switch (_rot_comp.Reg_58 & 6) // Scr_16?
{
case 0: // ?
break;
}
- dprintf("gfx_cd_start, stamp_map_addr=%06x", _rot_comp.Stamp_Map_Adr);
+ if (PicoOpt & POPT_EN_MCD_GFX)
+ {
+ unsigned int func = _rot_comp.Function;
+ unsigned short *stamp_base = (unsigned short *) (Pico_mcd->word_ram2M + _rot_comp.Stamp_Map_Adr);
- gfx_cd_update();
+ while (h--)
+ gfx_do_line(func, stamp_base, w);
+ }
}
-static void gfx_completed(void)
+PICO_INTERNAL_ASM unsigned int gfx_cd_read(unsigned int a)
{
- _rot_comp.Reg_58 &= 0x7fff; // Stamp_Size
- _rot_comp.Reg_64 = 0;
- if (Pico_mcd->s68k_regs[0x33] & (1<<1))
- {
- elprintf(EL_INTS, "gfx_cd irq 1");
- SekInterruptS68k(1);
+ unsigned int d = 0;
+
+ switch (a) {
+ case 0x58: d = _rot_comp.Reg_58; break;
+ case 0x5A: d = _rot_comp.Reg_5A; break;
+ case 0x5C: d = _rot_comp.Reg_5C; break;
+ case 0x5E: d = _rot_comp.Reg_5E; break;
+ case 0x60: d = _rot_comp.Reg_60; break;
+ case 0x62: d = _rot_comp.Reg_62; break;
+ case 0x64:
+ d = _rot_comp.Reg_64;
+ if (_rot_comp.Reg_64 > 1)
+ // fudge..
+ _rot_comp.Reg_64--;
+ break;
+ case 0x66: break;
+ default: dprintf("gfx_cd_read FIXME: unexpected address: %02x", a); break;
}
-}
+ dprintf("gfx_cd_read(%02x) = %04x", a, d);
+
+ return d;
+
+}
-static void gfx_do(unsigned int func, unsigned short *stamp_base, unsigned int H_Dot)
+static void gfx_do_line(unsigned int func, unsigned short *stamp_base,
+ unsigned int H_Dot)
{
unsigned int eax, ebx, ecx, edx, esi, edi, pixel;
unsigned int XD, Buffer_Adr;
}
-PICO_INTERNAL void gfx_cd_update(void)
-{
- int V_Dot = _rot_comp.Reg_64 & 0xff;
- int jobs;
-
- dprintf("gfx_cd_update, Reg_64 = %04x", _rot_comp.Reg_64);
-
- if (!V_Dot)
- {
- gfx_completed();
- return;
- }
-
- jobs = _rot_comp.Float_Part >> 16;
-
- if (!jobs)
- {
- _rot_comp.Float_Part += _rot_comp.Draw_Speed;
- return;
- }
-
- _rot_comp.Float_Part &= 0xffff;
- _rot_comp.Float_Part += _rot_comp.Draw_Speed;
-
- if (PicoOpt & POPT_EN_MCD_GFX)
- {
- unsigned int func = _rot_comp.Function;
- unsigned int H_Dot = _rot_comp.Reg_62 & 0x1ff;
- unsigned short *stamp_base = (unsigned short *) (Pico_mcd->word_ram2M + _rot_comp.Stamp_Map_Adr);
-
- while (jobs--)
- {
- gfx_do(func, stamp_base, H_Dot); // jmp [Jmp_Adr]:
-
- V_Dot--; // dec byte [V_Dot]
- if (V_Dot == 0)
- {
- // GFX_Completed:
- gfx_completed();
- return;
- }
- }
- }
- else
- {
- if (jobs >= V_Dot)
- {
- gfx_completed();
- return;
- }
- V_Dot -= jobs;
- }
-
- _rot_comp.Reg_64 = V_Dot;
-}
-
-
-PICO_INTERNAL_ASM unsigned int gfx_cd_read(unsigned int a)
-{
- unsigned int d = 0;
-
- switch (a) {
- case 0x58: d = _rot_comp.Reg_58; break;
- case 0x5A: d = _rot_comp.Reg_5A; break;
- case 0x5C: d = _rot_comp.Reg_5C; break;
- case 0x5E: d = _rot_comp.Reg_5E; break;
- case 0x60: d = _rot_comp.Reg_60; break;
- case 0x62: d = _rot_comp.Reg_62; break;
- case 0x64: d = _rot_comp.Reg_64; break;
- case 0x66: break;
- default: dprintf("gfx_cd_read FIXME: unexpected address: %02x", a); break;
- }
-
- dprintf("gfx_cd_read(%02x) = %04x", a, d);
-
- return d;
-}
-
PICO_INTERNAL_ASM void gfx_cd_write16(unsigned int a, unsigned int d)
{
dprintf("gfx_cd_write16(%x, %04x)", a, d);
+ if (_rot_comp.Reg_58 & 0x8000)
+ elprintf(EL_CD|EL_ANOMALY, "cd: busy gfx reg write %02x %04x", a, d);
+
switch (a) {
case 0x58: // .Reg_Stamp_Size
_rot_comp.Reg_58 = d & 7;
} Rot_Comp;
-PICO_INTERNAL void gfx_cd_update(void);
-
PICO_INTERNAL_ASM unsigned int gfx_cd_read(unsigned int a);
PICO_INTERNAL_ASM void gfx_cd_write16(unsigned int a, unsigned int d);
--- /dev/null
+/*
+ * PicoDrive
+ * (C) notaz, 2007,2013
+ *
+ * This work is licensed under the terms of MAME license.
+ * See COPYING file in the top-level directory.
+ */
+
+#include "../pico_int.h"
+#include "../sound/ym2612.h"
+
+extern unsigned char formatted_bram[4*0x10];
+
+static unsigned int m68k_cycle_mult;
+
+void (*PicoMCDopenTray)(void) = NULL;
+void (*PicoMCDcloseTray)(void) = NULL;
+
+
+PICO_INTERNAL void PicoInitMCD(void)
+{
+ SekInitS68k();
+ Init_CD_Driver();
+}
+
+PICO_INTERNAL void PicoExitMCD(void)
+{
+ End_CD_Driver();
+}
+
+PICO_INTERNAL void PicoPowerMCD(void)
+{
+ int fmt_size = sizeof(formatted_bram);
+ memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
+ memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
+ memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
+ memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
+ memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size,
+ formatted_bram, fmt_size);
+ memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
+ memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
+ memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
+
+ // cold reset state (tested)
+ Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
+ Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
+ Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
+ Pico_mcd->s68k_regs[6] = 0xff;
+ Pico_mcd->s68k_regs[7] = 0xff;
+ memset(Pico_mcd->bios + 0x70, 0xff, 4);
+}
+
+PICO_INTERNAL int PicoResetMCD(void)
+{
+ // ??
+ Reset_CD();
+ LC89510_Reset();
+ gfx_cd_reset();
+#ifdef _ASM_CD_MEMORY_C
+ //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
+#endif
+
+ // use SRam.data for RAM cart
+ if (PicoOpt & POPT_EN_MCD_RAMCART) {
+ if (SRam.data == NULL)
+ SRam.data = calloc(1, 0x12000);
+ }
+ else if (SRam.data != NULL) {
+ free(SRam.data);
+ SRam.data = NULL;
+ }
+ SRam.start = SRam.end = 0; // unused
+
+ pcd_event_schedule(0, PCD_EVENT_CDC, 12500000/75);
+
+ return 0;
+}
+
+static __inline void SekRunS68k(unsigned int to)
+{
+ int cyc_do;
+
+ SekCycleAimS68k = to;
+ if ((cyc_do = SekCycleAimS68k - SekCycleCntS68k) <= 0)
+ return;
+
+ SekCycleCntS68k += cyc_do;
+#if defined(EMU_C68K)
+ PicoCpuCS68k.cycles = cyc_do;
+ CycloneRun(&PicoCpuCS68k);
+ SekCycleCntS68k -= PicoCpuCS68k.cycles;
+#elif defined(EMU_M68K)
+ m68k_set_context(&PicoCpuMS68k);
+ SekCycleCntS68k += m68k_execute(cyc_do) - cyc_do;
+ m68k_set_context(&PicoCpuMM68k);
+#elif defined(EMU_F68K)
+ g_m68kcontext = &PicoCpuFS68k;
+ SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0) - cyc_do;
+ g_m68kcontext = &PicoCpuFM68k;
+#endif
+}
+
+
+unsigned int pcd_cycles_m68k_to_s68k(unsigned int c)
+{
+ return (long long)c * m68k_cycle_mult >> 16;
+}
+
+/* events */
+static void pcd_cdc_event(unsigned int now)
+{
+ // 75Hz CDC update
+ Check_CD_Command();
+ pcd_event_schedule(now, PCD_EVENT_CDC, 12500000/75);
+}
+
+static void pcd_int3_timer_event(unsigned int now)
+{
+ if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN3) {
+ elprintf(EL_INTS|EL_CD, "s68k: timer irq 3");
+ SekInterruptS68k(3);
+ }
+
+ if (Pico_mcd->s68k_regs[0x31] != 0)
+ pcd_event_schedule(now, PCD_EVENT_TIMER3,
+ Pico_mcd->s68k_regs[0x31] * 384);
+}
+
+static void pcd_gfx_event(unsigned int now)
+{
+ // update gfx chip
+ if (Pico_mcd->rot_comp.Reg_58 & 0x8000) {
+ Pico_mcd->rot_comp.Reg_58 &= 0x7fff;
+ Pico_mcd->rot_comp.Reg_64 = 0;
+ if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1) {
+ elprintf(EL_INTS |EL_CD, "s68k: gfx_cd irq 1");
+ SekInterruptS68k(1);
+ }
+ }
+}
+
+static void pcd_dma_event(unsigned int now)
+{
+ int ddx = Pico_mcd->s68k_regs[4] & 7;
+ Update_CDC_TRansfer(ddx);
+}
+
+typedef void (event_cb)(unsigned int now);
+
+/* times are in s68k (12.5MHz) cycles */
+unsigned int pcd_event_times[PCD_EVENT_COUNT];
+static unsigned int event_time_next;
+static event_cb *pcd_event_cbs[PCD_EVENT_COUNT] = {
+ [PCD_EVENT_CDC] = pcd_cdc_event,
+ [PCD_EVENT_TIMER3] = pcd_int3_timer_event,
+ [PCD_EVENT_GFX] = pcd_gfx_event,
+ [PCD_EVENT_DMA] = pcd_dma_event,
+};
+
+void pcd_event_schedule(unsigned int now, enum pcd_event event, int after)
+{
+ unsigned int when;
+
+ when = now + after;
+ if (when == 0) {
+ // event cancelled
+ pcd_event_times[event] = 0;
+ return;
+ }
+
+ when |= 1;
+
+ elprintf(EL_CD, "cd: new event #%u %u->%u", event, now, when);
+ pcd_event_times[event] = when;
+
+ if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
+ event_time_next = when;
+}
+
+void pcd_event_schedule_s68k(enum pcd_event event, int after)
+{
+ if (SekCyclesLeftS68k > after)
+ SekEndRunS68k(after);
+
+ pcd_event_schedule(SekCyclesDoneS68k(), event, after);
+}
+
+static void pcd_run_events(unsigned int until)
+{
+ int oldest, oldest_diff, time;
+ int i, diff;
+
+ while (1) {
+ oldest = -1, oldest_diff = 0x7fffffff;
+
+ for (i = 0; i < PCD_EVENT_COUNT; i++) {
+ if (pcd_event_times[i]) {
+ diff = pcd_event_times[i] - until;
+ if (diff < oldest_diff) {
+ oldest_diff = diff;
+ oldest = i;
+ }
+ }
+ }
+
+ if (oldest_diff <= 0) {
+ time = pcd_event_times[oldest];
+ pcd_event_times[oldest] = 0;
+ elprintf(EL_CD, "cd: run event #%d %u", oldest, time);
+ pcd_event_cbs[oldest](time);
+ }
+ else if (oldest_diff < 0x7fffffff) {
+ event_time_next = pcd_event_times[oldest];
+ break;
+ }
+ else {
+ event_time_next = 0;
+ break;
+ }
+ }
+
+ if (oldest != -1)
+ elprintf(EL_CD, "cd: next event #%d at %u",
+ oldest, event_time_next);
+}
+
+int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync)
+{
+ #define now SekCycleCntS68k
+ unsigned int s68k_target =
+ (unsigned long long)m68k_target * m68k_cycle_mult >> 16;
+ unsigned int target;
+
+ elprintf(EL_CD, "s68k sync to %u, %u->%u",
+ m68k_target, now, s68k_target);
+
+ if (Pico_mcd->m.busreq != 1) { /* busreq/reset */
+ SekCycleCntS68k = SekCycleAimS68k = s68k_target;
+ pcd_run_events(m68k_target);
+ return 0;
+ }
+
+ while (CYCLES_GT(s68k_target, now)) {
+ if (event_time_next && CYCLES_GE(now, event_time_next))
+ pcd_run_events(now);
+
+ target = s68k_target;
+ if (event_time_next && CYCLES_GT(target, event_time_next))
+ target = event_time_next;
+
+ SekRunS68k(target);
+ if (m68k_poll_sync && Pico_mcd->m.m68k_poll_cnt == 0)
+ break;
+ }
+
+ return s68k_target - now;
+ #undef now
+}
+
+#define pcd_run_cpus_normal pcd_run_cpus
+//#define pcd_run_cpus_lockstep pcd_run_cpus
+
+static void SekSyncM68k(void);
+
+static inline void pcd_run_cpus_normal(int m68k_cycles)
+{
+ SekCycleAim += m68k_cycles;
+ if (Pico_mcd->m.m68k_poll_cnt >= 16 && !SekShouldInterrupt()) {
+ int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
+ if (s68k_left <= 0) {
+ elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
+ Pico_mcd->m.m68k_poll_a, Pico_mcd->m.m68k_poll_cnt, SekPc);
+ SekCycleCnt = SekCycleAim;
+ return;
+ }
+ SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
+ }
+
+ SekSyncM68k();
+}
+
+static inline void pcd_run_cpus_lockstep(int m68k_cycles)
+{
+ unsigned int target = SekCycleAim + m68k_cycles;
+ do {
+ SekCycleAim += 8;
+ SekSyncM68k();
+ pcd_sync_s68k(SekCycleAim, 0);
+ } while (CYCLES_GT(target, SekCycleAim));
+}
+
+#define PICO_CD
+#define CPUS_RUN(m68k_cycles) \
+ pcd_run_cpus(m68k_cycles)
+
+#include "../pico_cmn.c"
+
+
+PICO_INTERNAL void PicoFrameMCD(void)
+{
+ if (!(PicoOpt&POPT_ALT_RENDERER))
+ PicoFrameStart();
+
+ // ~1.63 for NTSC, ~1.645 for PAL
+ if (Pico.m.pal)
+ m68k_cycle_mult = ((12500000ull << 16) / (50*312*488));
+ else
+ m68k_cycle_mult = ((12500000ull << 16) / (60*262*488)) + 1;
+
+ PicoFrameHints();
+}
+
+void pcd_state_loaded(void)
+{
+ unsigned int cycles;
+ int diff;
+
+ pcd_state_loaded_mem();
+
+ // old savestates..
+ cycles = pcd_cycles_m68k_to_s68k(SekCycleAim);
+ diff = cycles - SekCycleAimS68k;
+ if (diff < -1000 || diff > 1000) {
+ SekCycleCntS68k = SekCycleAimS68k = cycles;
+ }
+ if (pcd_event_times[PCD_EVENT_CDC] == 0) {
+ pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_CDC, 12500000/75);
+
+ if (Pico_mcd->s68k_regs[0x31])
+ pcd_event_schedule(SekCycleAimS68k, PCD_EVENT_TIMER3,
+ Pico_mcd->s68k_regs[0x31] * 384);
+
+ if (Pico_mcd->rot_comp.Reg_58 & 0x8000) {
+ Pico_mcd->rot_comp.Reg_58 &= 0x7fff;
+ Pico_mcd->rot_comp.Reg_64 = 0;
+ if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN1)
+ SekInterruptS68k(1);
+ }
+ if (Pico_mcd->scd.Status_CDC & 0x08)
+ Update_CDC_TRansfer(Pico_mcd->s68k_regs[4] & 7);
+ }
+}
+
+// vim:shiftwidth=2:ts=2:expandtab
void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r
#endif\r
\r
-static void remap_prg_window(void);\r
-static void remap_word_ram(int r3);\r
+static void remap_prg_window(u32 r1, u32 r3);\r
+static void remap_word_ram(u32 r3);\r
\r
// poller detection\r
#define POLL_LIMIT 16\r
#define POLL_CYCLES 124\r
-unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
+\r
+u32 m68k_comm_check(u32 a, u32 d)\r
+{\r
+ pcd_sync_s68k(SekCyclesDone(), 0);\r
+ if (a != Pico_mcd->m.m68k_poll_a) {\r
+ Pico_mcd->m.m68k_poll_a = a;\r
+ Pico_mcd->m.m68k_poll_cnt = 0;\r
+ return d;\r
+ }\r
+ Pico_mcd->m.m68k_poll_cnt++;\r
+ return d;\r
+}\r
\r
#ifndef _ASM_CD_MEMORY_C\r
static u32 m68k_reg_read16(u32 a)\r
{\r
- u32 d=0;\r
+ u32 d = 0;\r
a &= 0x3e;\r
\r
switch (a) {\r
case 0:\r
- d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
+ // here IFL2 is always 0, just like in Gens\r
+ d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)\r
+ | Pico_mcd->m.busreq;\r
goto end;\r
case 2:\r
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
- goto end;\r
+ goto end_comm;\r
case 4:\r
d = Pico_mcd->s68k_regs[4]<<8;\r
goto end;\r
case 0xA:\r
elprintf(EL_UIO, "m68k FIXME: reserved read");\r
goto end;\r
- case 0xC:\r
- d = Pico_mcd->m.timer_stopwatch >> 16;\r
+ case 0xC: // 384 cycle stopwatch timer\r
+ // ugh..\r
+ d = pcd_cycles_m68k_to_s68k(SekCyclesDone());\r
+ d = (d - Pico_mcd->m.stopwatch_base_c) / 384;\r
+ d &= 0x0fff;\r
elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);\r
goto end;\r
}\r
if (a < 0x30) {\r
// comm flag/cmd/status (0xE-0x2F)\r
d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
- goto end;\r
+ goto end_comm;\r
}\r
\r
elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
\r
end:\r
-\r
return d;\r
+\r
+end_comm:\r
+ return m68k_comm_check(a, d);\r
}\r
#endif\r
\r
u32 dold;\r
a &= 0x3f;\r
\r
+ Pico_mcd->m.m68k_poll_a =\r
+ Pico_mcd->m.m68k_poll_cnt = 0;\r
+\r
switch (a) {\r
case 0:\r
d &= 1;\r
- if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }\r
+ if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {\r
+ elprintf(EL_INTS, "m68k: s68k irq 2");\r
+ pcd_sync_s68k(SekCyclesDone(), 0);\r
+ SekInterruptS68k(2);\r
+ }\r
return;\r
case 1:\r
d &= 3;\r
- if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
- if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r
- if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1);\r
- if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
- SekResetS68k(); // S68k comes out of RESET or BRQ state\r
- Pico_mcd->m.state_flags&=~1;\r
- elprintf(EL_CDREGS, "m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
- }\r
+ dold = Pico_mcd->m.busreq;\r
+ if (!(d & 1))\r
+ d |= 2; // verified: can't release bus on reset\r
+ if (dold == d)\r
+ return;\r
+\r
+ pcd_sync_s68k(SekCyclesDone(), 0);\r
+\r
+ if ((dold ^ d) & 1)\r
+ elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r
if (!(d & 1))\r
- d |= 2; // verified: reset also gives bus\r
- if ((d ^ Pico_mcd->m.busreq) & 2)\r
- remap_prg_window();\r
+ Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;\r
+ else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {\r
+ Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;\r
+ elprintf(EL_CDREGS, "m68k: resetting s68k");\r
+ SekResetS68k();\r
+ }\r
+ if ((dold ^ d) & 2) {\r
+ elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r
+ remap_prg_window(d, Pico_mcd->s68k_regs[3]);\r
+ }\r
Pico_mcd->m.busreq = d;\r
return;\r
case 2:\r
case 3:\r
dold = Pico_mcd->s68k_regs[3];\r
elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);\r
- //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);\r
- //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :\r
- // ((d&2) ? "word ram to s68k" : "word ram to m68k"));\r
- if (dold & 4) { // 1M mode\r
- d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing\r
- } else {\r
- if ((d ^ dold) & d & 2) { // DMNA is being set\r
- dold &= ~1; // return word RAM to s68k\r
- /* Silpheed hack: bset(w3), r3, btst, bne, r3 */\r
- SekEndRun(20+16+10+12+16);\r
- }\r
- }\r
- Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f);\r
if ((d ^ dold) & 0xc0) {\r
- elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
- remap_prg_window();\r
+ elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",\r
+ (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
+ remap_prg_window(Pico_mcd->m.busreq, d);\r
}\r
-#ifdef USE_POLL_DETECT\r
- if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
- SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
+\r
+ // 2M mode state is tracked regardless of current mode\r
+ if (d & 2) {\r
+ Pico_mcd->m.dmna_ret_2m |= 2;\r
+ Pico_mcd->m.dmna_ret_2m &= ~1;\r
}\r
-#endif\r
- return;\r
+ if (dold & 4) { // 1M mode\r
+ d ^= 2; // 0 sets DMNA, 1 does nothing\r
+ d = (d & 0xc2) | (dold & 0x1f);\r
+ }\r
+ else\r
+ d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;\r
+\r
+ goto write_comm;\r
case 6:\r
Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer\r
return;\r
elprintf(EL_CDREGS, "hint vector set to %04x%04x",\r
((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r
return;\r
- case 0xf:\r
- d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
- case 0xe:\r
- //dprintf("m68k: comm flag: %02x", d);\r
- Pico_mcd->s68k_regs[0xe] = d;\r
-#ifdef USE_POLL_DETECT\r
- if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
- SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
- }\r
-#endif\r
- return;\r
+ case 0x0f:\r
+ a = 0x0e;\r
+ case 0x0e:\r
+ goto write_comm;\r
}\r
\r
- if ((a&0xf0) == 0x10) {\r
- Pico_mcd->s68k_regs[a] = d;\r
-#ifdef USE_POLL_DETECT\r
- if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {\r
- SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
- }\r
-#endif\r
- return;\r
- }\r
+ if ((a&0xf0) == 0x10)\r
+ goto write_comm;\r
\r
elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);\r
+ return;\r
+\r
+write_comm:\r
+ if (d == Pico_mcd->s68k_regs[a])\r
+ return;\r
+\r
+ Pico_mcd->s68k_regs[a] = d;\r
+ pcd_sync_s68k(SekCyclesDone(), 0);\r
+ if (Pico_mcd->m.s68k_poll_a == a && Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r
+ SekSetStopS68k(0);\r
+ Pico_mcd->m.s68k_poll_a = 0;\r
+ elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
+ }\r
}\r
\r
#ifndef _ASM_CD_MEMORY_C\r
u32 s68k_poll_detect(u32 a, u32 d)\r
{\r
#ifdef USE_POLL_DETECT\r
- // needed mostly for Cyclone, which doesn't always check it's cycle counter\r
- if (SekIsStoppedS68k()) return d;\r
- // polling detection\r
- if (a == (s68k_poll_adclk&0xff)) {\r
- unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);\r
+ u32 cycles, cnt = 0;\r
+ if (SekIsStoppedS68k())\r
+ return d;\r
+\r
+ cycles = SekCyclesDoneS68k();\r
+ if (a == Pico_mcd->m.s68k_poll_a) {\r
+ u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;\r
if (clkdiff <= POLL_CYCLES) {\r
- s68k_poll_cnt++;\r
- //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);\r
- if (s68k_poll_cnt > POLL_LIMIT) {\r
+ cnt = Pico_mcd->m.s68k_poll_cnt + 1;\r
+ //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);\r
+ if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r
SekSetStopS68k(1);\r
- elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);\r
+ elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x",\r
+ SekPcS68k, a);\r
}\r
- s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
- return d;\r
}\r
}\r
- s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;\r
- s68k_poll_cnt = 0;\r
+ Pico_mcd->m.s68k_poll_a = a;\r
+ Pico_mcd->m.s68k_poll_clk = cycles;\r
+ Pico_mcd->m.s68k_poll_cnt = cnt;\r
#endif\r
return d;\r
}\r
case 8:\r
return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
case 0xC:\r
- d = Pico_mcd->m.timer_stopwatch >> 16;\r
+ d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;\r
+ d /= 384;\r
+ d &= 0x0fff;\r
elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);\r
return d;\r
case 0x30:\r
elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);\r
d &= 0x1d;\r
d |= dold & 0xc2;\r
+\r
+ // 2M mode state\r
+ if (d & 1) {\r
+ Pico_mcd->m.dmna_ret_2m |= 1;\r
+ Pico_mcd->m.dmna_ret_2m &= ~2; // DMNA clears\r
+ }\r
+\r
if (d & 4)\r
{\r
- if ((d ^ dold) & 0x1d) {\r
- d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
- remap_word_ram(d);\r
- }\r
if (!(dold & 4)) {\r
elprintf(EL_CDREG3, "wram mode 2M->1M");\r
wram_2M_to_1M(Pico_mcd->word_ram2M);\r
}\r
+\r
+ if ((d ^ dold) & 0x1d)\r
+ remap_word_ram(d);\r
+\r
+ if ((d ^ dold) & 0x05)\r
+ d &= ~2; // clear DMNA - swap complete\r
}\r
else\r
{\r
if (dold & 4) {\r
elprintf(EL_CDREG3, "wram mode 1M->2M");\r
- if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k\r
- d &= ~3;\r
- d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
- }\r
wram_1M_to_2M(Pico_mcd->word_ram2M);\r
remap_word_ram(d);\r
}\r
- // s68k can only set RET, writing 0 has no effect\r
- else if ((dold ^ d) & d & 1) { // RET being set\r
- SekEndRunS68k(20+16+10+12+16); // see DMNA case\r
- } else\r
- d |= dold & 1;\r
- if (d & 1)\r
- d &= ~2; // DMNA clears\r
+ d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;\r
}\r
- break;\r
+ goto write_comm;\r
}\r
case 4:\r
elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);\r
elprintf(EL_CDREGS, "s68k set CDC dma addr");\r
break;\r
case 0xc:\r
- case 0xd:\r
- elprintf(EL_CDREGS, "s68k set stopwatch timer");\r
- Pico_mcd->m.timer_stopwatch = 0;\r
+ case 0xd: // 384 cycle stopwatch timer\r
+ elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);\r
+ // does this also reset internal 384 cycle counter?\r
+ Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r
return;\r
- case 0xe:\r
- Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
- return;\r
- case 0x31:\r
- elprintf(EL_CDREGS, "s68k set int3 timer: %02x", d);\r
- Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
+ case 0x0e:\r
+ a = 0x0f;\r
+ case 0x0f:\r
+ goto write_comm;\r
+ case 0x31: // 384 cycle int3 timer\r
+ d &= 0xff;\r
+ elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);\r
+ Pico_mcd->s68k_regs[a] = (u8) d;\r
+ if (d) // d or d+1??\r
+ pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);\r
+ else\r
+ pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);\r
break;\r
case 0x33: // IRQ mask\r
- elprintf(EL_CDREGS, "s68k irq mask: %02x", d);\r
- if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
- CDD_Export_Status();\r
+ elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);\r
+ d &= 0x7e;\r
+ if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {\r
+ if (Pico_mcd->s68k_regs[0x37] & 4)\r
+ CDD_Export_Status();\r
}\r
break;\r
case 0x34: // fader\r
return;\r
}\r
\r
+ if ((a&0x1f0) == 0x20)\r
+ goto write_comm;\r
+\r
if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))\r
{\r
elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);\r
}\r
\r
Pico_mcd->s68k_regs[a] = (u8) d;\r
+ return;\r
+\r
+write_comm:\r
+ Pico_mcd->s68k_regs[a] = (u8) d;\r
+ if (Pico_mcd->m.m68k_poll_cnt)\r
+ SekEndRunS68k(0);\r
+ Pico_mcd->m.m68k_poll_cnt = 0;\r
}\r
\r
// -----------------------------------------------------------------\r
{\r
if ((a & 0xff00) == 0x2000) { // a12000 - a120ff\r
elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);\r
-/* TODO FIXME?\r
- if (a == 0xe) { // special case, 2 byte writes would be handled differently\r
- Pico_mcd->s68k_regs[0xe] = d >> 8;\r
-#ifdef USE_POLL_DETECT\r
- if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
- SekSetStopS68k(0); s68k_poll_adclk = 0;\r
- elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);\r
- }\r
-#endif\r
- return;\r
- }\r
-*/\r
+\r
m68k_reg_write8(a, d >> 8);\r
- m68k_reg_write8(a + 1, d & 0xff);\r
+ if ((a & 0x3e) != 0x0e) // special case\r
+ m68k_reg_write8(a + 1, d & 0xff);\r
return;\r
}\r
\r
elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r
}\r
\r
-// PRG RAM protected range (000000 - 00ff00)?\r
+// PRG RAM protected range (000000 - 01fdff)?\r
// XXX verify: ff00 or 1fe00 max?\r
static void PicoWriteS68k8_prgwp(u32 a, u32 d)\r
{\r
- if (a >= (Pico_mcd->s68k_regs[2] << 8))\r
+ if (a >= (Pico_mcd->s68k_regs[2] << 9))\r
Pico_mcd->prg_ram[a ^ 1] = d;\r
}\r
\r
static void PicoWriteS68k16_prgwp(u32 a, u32 d)\r
{\r
- if (a >= (Pico_mcd->s68k_regs[2] << 8))\r
+ if (a >= (Pico_mcd->s68k_regs[2] << 9))\r
*(u16 *)(Pico_mcd->prg_ram + a) = d;\r
}\r
\r
// regs\r
if ((a & 0xfe00) == 0x8000) {\r
a &= 0x1ff;\r
- elprintf(EL_CDREGS, "s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);\r
if (a >= 0x0e && a < 0x30) {\r
d = Pico_mcd->s68k_regs[a];\r
s68k_poll_detect(a, d);\r
- elprintf(EL_CDREGS, "ret = %02x", (u8)d);\r
- return d;\r
+ goto regs_done;\r
}\r
else if (a >= 0x58 && a < 0x68)\r
d = gfx_cd_read(a & ~1);\r
else d = s68k_reg_read16(a & ~1);\r
if (!(a & 1))\r
d >>= 8;\r
- elprintf(EL_CDREGS, "ret = %02x", (u8)d);\r
- return d & 0xff;\r
+\r
+regs_done:\r
+ d &= 0xff;\r
+ elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @ %06x",\r
+ a, d, SekPcS68k);\r
+ return d;\r
}\r
\r
// PCM\r
// regs\r
if ((a & 0xfe00) == 0x8000) {\r
a &= 0x1fe;\r
- elprintf(EL_CDREGS, "s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);\r
if (0x58 <= a && a < 0x68)\r
d = gfx_cd_read(a);\r
else d = s68k_reg_read16(a);\r
- elprintf(EL_CDREGS, "ret = %04x", d);\r
+\r
+ elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @ %06x",\r
+ a, d, SekPcS68k);\r
return d;\r
}\r
\r
\r
// -----------------------------------------------------------------\r
\r
-static void remap_prg_window(void)\r
+static void remap_prg_window(u32 r1, u32 r3)\r
{\r
// PRG RAM\r
- if (Pico_mcd->m.busreq & 2) {\r
- void *bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];\r
+ if (r1 & 2) {\r
+ void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];\r
cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r
}\r
else {\r
}\r
}\r
\r
-static void remap_word_ram(int r3)\r
+static void remap_word_ram(u32 r3)\r
{\r
void *bank;\r
\r
#endif\r
}\r
\r
-void PicoMemStateLoaded(void)\r
+void pcd_state_loaded_mem(void)\r
{\r
- int r3 = Pico_mcd->s68k_regs[3];\r
+ u32 r3 = Pico_mcd->s68k_regs[3];\r
\r
/* after load events */\r
if (r3 & 4) // 1M mode?\r
wram_2M_to_1M(Pico_mcd->word_ram2M);\r
remap_word_ram(r3);\r
- remap_prg_window();\r
+ remap_prg_window(Pico_mcd->m.busreq, r3);\r
+ Pico_mcd->m.dmna_ret_2m &= 3;\r
\r
// restore hint vector\r
*(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r
cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
- cpu68k_map_set(s68k_write8_map, 0x000000, 0x00ffff, PicoWriteS68k8_prgwp, 1);\r
- cpu68k_map_set(s68k_write16_map, 0x000000, 0x00ffff, PicoWriteS68k16_prgwp, 1);\r
+ cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);\r
+ cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);\r
\r
// BRAM\r
cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r
#ifdef EMU_M68K\r
m68k_mem_setup_cd();\r
#endif\r
-\r
- // m68k_poll_addr = m68k_poll_cnt = 0;\r
- s68k_poll_adclk = s68k_poll_cnt = 0;\r
}\r
\r
\r
}\r
#endif // EMU_M68K\r
\r
+// vim:shiftwidth=2:ts=2:expandtab\r
.extern m68k_reg_write8
.extern s68k_reg_read16
.extern s68k_reg_write8
-.extern s68k_poll_adclk
.extern s68k_poll_detect
.extern gfx_cd_read
.extern gfx_cd_write16
.extern PicoRead16_io
.extern PicoWrite8_io
.extern PicoWrite16_io
+.extern m68k_comm_check
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
add r1, r1, #0x110000
ldrb r0, [r1, #2]
bx lr
-m_m68k_read8_r03:
- add r1, r1, #0x110000
- ldrb r0, [r1, #3]
- add r1, r1, #0x002200
- ldr r1, [r1, #4]
- and r0, r0, #0xc7
- tst r1, #2 @ DMNA pending?
- bxeq lr
- bic r0, r0, #1
- orr r0, r0, #2
- bx lr
+m_m68k_read8_r03: @ FIXME: sync with C
+ add r2, r1, #0x110000
+ ldrb r1, [r2, #3]
+ add r2, r2, #0x002200
+ ldr r2, [r2, #4]
+ and r1, r1, #0xc7
+ tst r2, #2 @ DMNA pending?
+ bicne r1, r1, #1
+ orrne r1, r1, #2
+ b m68k_comm_check
m_m68k_read8_r04:
add r1, r1, #0x110000
ldrb r0, [r1, #4]
movge r0, #0
bxeq lr
add r1, r1, #0x110000
- ldrb r0, [r1, r0]
- bx lr
+ ldrb r1, [r1, r0]
+ b m68k_comm_check
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
and r0, r0, #0x04000000 @ we need irq2 mask state
orr r0, r1, r0, lsr #11
bx lr
-m_m68k_read16_r02:
- add r1, r1, #0x110000
- ldrb r0, [r1, #2]
- ldrb r2, [r1, #3]
- add r1, r1, #0x002200
- ldr r1, [r1, #4]
+m_m68k_read16_r02: @ FIXME: out of sync from C
+ add r3, r1, #0x110000
+ ldrb r1, [r3, #2]
+ ldrb r2, [r3, #3]
+ add r3, r3, #0x002200
+ ldr r3, [r3, #4]
and r2, r2, #0xc7
- orr r0, r2, r0, lsl #8
- tst r1, #2 @ DMNA pending?
- bxeq lr
- bic r0, r0, #1
- orr r0, r0, #2
- bx lr
+ orr r1, r2, r1, lsl #8
+ tst r3, #2 @ DMNA pending?
+ bicne r1, r1, #1
+ orrne r1, r1, #2
+ b m68k_comm_check
m_m68k_read16_r04:
add r1, r1, #0x110000
ldrb r0, [r1, #4]
ldrlth r1, [r1, r0]
movge r0, #0
bxge lr
- mov r0, r1, lsr #8
+ mov r2, r1, lsr #8
and r1, r1, #0xff
- orr r0, r0, r1, lsl #8
- bx lr
+ orr r1, r2, r1, lsl #8
+ b m68k_comm_check
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
b m68k_reg_write8
m_m68k_write16_regs_spec: @ special case
- ldr r2, =(Pico+0x22200)
- ldr r3, =s68k_poll_adclk
- mov r0, #0x110000
- ldr r2, [r2]
- add r0, r0, #0x00000e
mov r1, r1, lsr #8
- strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0x0e] = d >> 8;
- ldr r2, [r3]
- mov r1, #0
- and r2, r2, #0xfe
- cmp r2, #0x0e
- bxne lr
- ldr r0, =PicoCpuCS68k
- str r1, [r0, #0x58] @ push s68k out of stopped state
- str r1, [r3]
- bx lr
+ b m68k_reg_write8
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
+++ /dev/null
-/*
- * PicoDrive
- * (C) notaz, 2007
- *
- * This work is licensed under the terms of MAME license.
- * See COPYING file in the top-level directory.
- */
-
-#include "../pico_int.h"
-#include "../sound/ym2612.h"
-
-extern unsigned char formatted_bram[4*0x10];
-extern unsigned int s68k_poll_adclk;
-
-void (*PicoMCDopenTray)(void) = NULL;
-void (*PicoMCDcloseTray)(void) = NULL;
-
-
-PICO_INTERNAL void PicoInitMCD(void)
-{
- SekInitS68k();
- Init_CD_Driver();
-}
-
-PICO_INTERNAL void PicoExitMCD(void)
-{
- End_CD_Driver();
-}
-
-PICO_INTERNAL void PicoPowerMCD(void)
-{
- int fmt_size = sizeof(formatted_bram);
- memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
- memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
- memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
- memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
- memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
-}
-
-PICO_INTERNAL int PicoResetMCD(void)
-{
- memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
- memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
- memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
-
- *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
- Pico_mcd->m.state_flags |= 1; // s68k reset pending
- Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
-
- Reset_CD();
- LC89510_Reset();
- gfx_cd_reset();
-#ifdef _ASM_CD_MEMORY_C
- //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
-#endif
-
- // use SRam.data for RAM cart
- if (PicoOpt & POPT_EN_MCD_RAMCART) {
- if (SRam.data == NULL)
- SRam.data = calloc(1, 0x12000);
- }
- else if (SRam.data != NULL) {
- free(SRam.data);
- SRam.data = NULL;
- }
- SRam.start = SRam.end = 0; // unused
-
- return 0;
-}
-
-static __inline void SekRunS68k(int cyc)
-{
- int cyc_do;
- SekCycleAimS68k+=cyc;
- if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return;
-#if defined(EMU_CORE_DEBUG)
- SekCycleCntS68k+=CM_compareRun(cyc_do, 1);
-#elif defined(EMU_C68K)
- PicoCpuCS68k.cycles=cyc_do;
- CycloneRun(&PicoCpuCS68k);
- SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles;
-#elif defined(EMU_M68K)
- m68k_set_context(&PicoCpuMS68k);
- SekCycleCntS68k+=m68k_execute(cyc_do);
- m68k_set_context(&PicoCpuMM68k);
-#elif defined(EMU_F68K)
- g_m68kcontext=&PicoCpuFS68k;
- SekCycleCntS68k+=fm68k_emulate(cyc_do, 0, 0);
- g_m68kcontext=&PicoCpuFM68k;
-#endif
-}
-
-#define PS_STEP_M68K ((488<<16)/20) // ~24
-//#define PS_STEP_S68K 13
-
-#if defined(_ASM_CD_PICO_C)
-extern void SekRunPS(int cyc_m68k, int cyc_s68k);
-#elif defined(EMU_F68K)
-static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
-{
- SekCycleAim+=cyc_m68k;
- SekCycleAimS68k+=cyc_s68k;
- fm68k_emulate(0, 1, 0);
-}
-#else
-static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
-{
- int cycn, cycn_s68k, cyc_do;
- SekCycleAim+=cyc_m68k;
- SekCycleAimS68k+=cyc_s68k;
-
-// fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
-// SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
-
- /* loop 488 downto 0 in steps of PS_STEP */
- for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
- {
- cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
- if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
-#if defined(EMU_C68K)
- PicoCpuCM68k.cycles = cyc_do;
- CycloneRun(&PicoCpuCM68k);
- SekCycleCnt += cyc_do - PicoCpuCM68k.cycles;
-#elif defined(EMU_M68K)
- m68k_set_context(&PicoCpuMM68k);
- SekCycleCnt += m68k_execute(cyc_do);
-#elif defined(EMU_F68K)
- g_m68kcontext = &PicoCpuFM68k;
- SekCycleCnt += fm68k_emulate(cyc_do, 0, 0);
-#endif
- }
- if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
-#if defined(EMU_C68K)
- PicoCpuCS68k.cycles = cyc_do;
- CycloneRun(&PicoCpuCS68k);
- SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles;
-#elif defined(EMU_M68K)
- m68k_set_context(&PicoCpuMS68k);
- SekCycleCntS68k += m68k_execute(cyc_do);
-#elif defined(EMU_F68K)
- g_m68kcontext = &PicoCpuFS68k;
- SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0);
-#endif
- }
- }
-}
-#endif
-
-
-static __inline void check_cd_dma(void)
-{
- int ddx;
-
- if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
-
- ddx = Pico_mcd->s68k_regs[4] & 7;
- if (ddx < 2) return; // invalid
- if (ddx < 4) {
- Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
- return;
- }
- if (ddx == 6) return; // invalid
-
- Update_CDC_TRansfer(ddx); // now go and do the actual transfer
-}
-
-static __inline void update_chips(void)
-{
- int counter_timer, int3_set;
- int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
-
- // 75Hz CDC update
- if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
- Pico_mcd->m.counter75hz -= counter75hz_lim;
- Check_CD_Command();
- }
-
- // update timers
- counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
- Pico_mcd->m.timer_stopwatch += counter_timer;
- if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
- Pico_mcd->m.timer_int3 -= counter_timer;
- if (Pico_mcd->m.timer_int3 < 0) {
- if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
- elprintf(EL_INTS, "s68k: timer irq 3");
- SekInterruptS68k(3);
- Pico_mcd->m.timer_int3 += int3_set << 16;
- }
- // is this really what happens if irq3 is masked out?
- Pico_mcd->m.timer_int3 &= 0xffffff;
- }
- }
-
- // update gfx chip
- if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
- gfx_cd_update();
-}
-
-
-#define PICO_CD
-#define CPUS_RUN(m68k_cycles,s68k_cycles) \
-{ \
- if ((PicoOpt&POPT_EN_MCD_PSYNC) && (Pico_mcd->m.busreq&3) == 1) { \
- SekRunPS(m68k_cycles, s68k_cycles); /* "better/perfect sync" */ \
- } else { \
- SekRunM68k(m68k_cycles); \
- if ((Pico_mcd->m.busreq&3) == 1) /* no busreq/no reset */ \
- SekRunS68k(s68k_cycles); \
- } \
-}
-#include "../pico_cmn.c"
-
-
-PICO_INTERNAL void PicoFrameMCD(void)
-{
- if (!(PicoOpt&POPT_ALT_RENDERER))
- PicoFrameStart();
-
- PicoFrameHints();
-}
-
-
#include "../pico_int.h"
-int SekCycleCntS68k=0; // cycles done in this frame
-int SekCycleAimS68k=0; // cycle aim
+unsigned int SekCycleCntS68k;
+unsigned int SekCycleAimS68k;
/* context */
sprintf(dstrp, "mode set 4: %02x\n", (r=reg[0xC])); MVP;
sprintf(dstrp, "interlace: %i%i, cells: %i, shadow: %i\n", bit(r,2), bit(r,1), (r&0x80) ? 40 : 32, bit(r,3)); MVP;
sprintf(dstrp, "scroll size: w: %i, h: %i SRAM: %i; eeprom: %i (%i)\n", reg[0x10]&3, (reg[0x10]&0x30)>>4,
- !!(SRam.flags & SRF_ENABLED), !!(SRam.flags & SRF_EEPROM), SRam.eeprom_type); MVP;
+ !!(SRam.flags & SRF_ENABLED), !!(SRam.flags & SRF_EEPROM), SRam.eeprom_type); MVP;
sprintf(dstrp, "sram range: %06x-%06x, reg: %02x\n", SRam.start, SRam.end, Pico.m.sram_reg); MVP;
sprintf(dstrp, "pend int: v:%i, h:%i, vdp status: %04x\n", bit(pv->pending_ints,5), bit(pv->pending_ints,4), pv->status); MVP;
- sprintf(dstrp, "pal: %i, hw: %02x, frame#: %i, cycles: %i\n", Pico.m.pal, Pico.m.hardware, Pico.m.frame_count, SekCyclesDoneT()); MVP;
+ sprintf(dstrp, "pal: %i, hw: %02x, frame#: %i, cycles: %i\n", Pico.m.pal, Pico.m.hardware, Pico.m.frame_count, SekCyclesDone()); MVP;
sprintf(dstrp, "M68k: PC: %06x, SR: %04x, irql: %i\n", SekPc, SekSr, SekIrqLevel); MVP;
-#if defined(EMU_C68K)
- sprintf(dstrp - 1, ", st_flg: %x\n", PicoCpuCM68k.state_flags); MVP;
-#endif
for (r = 0; r < 8; r++) {
sprintf(dstrp, "d%i=%08x, a%i=%08x\n", r, SekDar(r), r, SekDar(r+8)); MVP;
}
}
#endif
+#if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)
+static FILE *tl_f;
+
+void tl_write(const void *ptr, size_t size)
+{
+ if (tl_f == NULL)
+ tl_f = fopen("tracelog", "wb");
+
+ fwrite(ptr, 1, size, tl_f);
+}
+
+void tl_write_uint(unsigned char ctl, unsigned int v)
+{
+ tl_write(&ctl, sizeof(ctl));
+ tl_write(&v, sizeof(v));
+}
+
+int tl_read(void *ptr, size_t size)
+{
+ if (tl_f == NULL)
+ tl_f = fopen("tracelog", "rb");
+
+ return fread(ptr, 1, size, tl_f);
+}
+
+int tl_read_uint(void *ptr)
+{
+ return tl_read(ptr, 4);
+}
+#endif
+
// vim:shiftwidth=2:ts=2:expandtab
void PDebugZ80Frame(void);
void PDebugCPUStep(void);
+#if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)
+enum ctl_byte {
+ CTL_68K_SLAVE = 0x02,
+ CTL_68K_PC = 0x04,
+ CTL_68K_SR = 0x05,
+ CTL_68K_CYCLES = 0x06,
+ CTL_68K_R = 0x10, // .. 0x20
+ CTL_MASTERSLAVE = 0x80,
+ CTL_EA = 0x82,
+ CTL_EAVAL = 0x83,
+ CTL_M68KPC = 0x84,
+ CTL_CYCLES = 0x85,
+ CTL_SH2_R = 0x90, // .. 0xa8
+};
+
+void tl_write(const void *ptr, size_t size);
+void tl_write_uint(unsigned char ctl, unsigned int v);
+int tl_read(void *ptr, size_t size);
+int tl_read_uint(void *ptr);
+#endif
\r
for (line = DrawScanline; line < to; line++)\r
{\r
- if (line >= 224) break;\r
PicoLine(line, offs, sh, bgc);\r
}\r
\r
- if (line >= 224) {\r
- DrawScanline = 240;\r
- return;\r
- }\r
-\r
// last line\r
if (line <= to)\r
{\r
unsigned int scyc = Pico.m.eeprom_cycle, ssa = Pico.m.eeprom_slave;\r
\r
elprintf(EL_EEPROM, "eeprom: scl/sda: %i/%i -> %i/%i, newtime=%i", (sreg&2)>>1, sreg&1,\r
- (d&2)>>1, d&1, SekCyclesDoneT() - last_write);\r
+ (d&2)>>1, d&1, SekCyclesDone() - last_write);\r
saddr &= 0x1fff;\r
\r
if(sreg & d & 2) {\r
void EEPROM_write16(unsigned int d)\r
{\r
// this diff must be at most 16 for NBA Jam to work\r
- if (SekCyclesDoneT() - last_write < 16) {\r
+ if (SekCyclesDone() - last_write < 16) {\r
// just update pending state\r
elprintf(EL_EEPROM, "eeprom: skip because cycles=%i",\r
- SekCyclesDoneT() - last_write);\r
+ SekCyclesDone() - last_write);\r
EEPROM_upd_pending(d);\r
} else {\r
int srs = Pico.m.eeprom_status;\r
EEPROM_write_do(srs >> 6); // execute pending\r
EEPROM_upd_pending(d);\r
if ((srs ^ Pico.m.eeprom_status) & 0xc0) // update time only if SDA/SCL changed\r
- last_write = SekCyclesDoneT();\r
+ last_write = SekCyclesDone();\r
}\r
}\r
\r
EEPROM_write_do(Pico.m.eeprom_status>>6);\r
\r
sreg = Pico.m.eeprom_status; saddr = Pico.m.eeprom_addr&0x1fff; scyc = Pico.m.eeprom_cycle; ssa = Pico.m.eeprom_slave;\r
- interval = SekCyclesDoneT() - last_write;\r
+ interval = SekCyclesDone() - last_write;\r
d = (sreg>>6)&1; // use SDA as "open bus"\r
\r
// NBA Jam is nasty enough to read <before> raising the SCL and starting the new cycle.\r
cyclone_checkpc:
ldr r1, [r7, #0x60] @ membase
sub r0, r0, r1
- bic r0, r0, #0xff000000
- bics r0, r0, #1
+ and r3, r0, #0xff000000
+ bic r0, r0, #1
+ bics r2, r0, #0xff000000
beq crashed
ldr r1, [r7, #0x6c] @ read16 map
- mov r2, r0, lsr #M68K_MEM_SHIFT
+ mov r2, r2, lsr #M68K_MEM_SHIFT
ldr r1, [r1, r2, lsl #2]
movs r1, r1, lsl #1
bcs crashed
+ sub r1, r1, r3
str r1, [r7, #0x60] @ membase
add r0, r0, r1
bx lr
Stop_CD();
PicoCartUnload();
PicoAHW = 0;
+ PicoQuirks = 0;
if (media_type == PM_CD)
{
}
}
+ if (PicoQuirks & PQUIRK_FORCE_6BTN)
+ PicoSetInputDevice(0, PICO_INPUT_PAD_6BTN);
+
out:
if (rom_data)
free(rom_data);
for (i = start_addr >> shift; i <= end_addr >> shift; i++) {\r
map[i] = addr >> 1;\r
if (is_func)\r
- map[i] |= (uptr)1 << (sizeof(addr) * 8 - 1);\r
+ map[i] |= MAP_FLAG;\r
}\r
}\r
\r
\r
addr = (uptr)m68k_unmapped_read8;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_read8_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_read8_map[i] = (addr >> 1) | MAP_FLAG;\r
\r
addr = (uptr)m68k_unmapped_read16;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_read16_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_read16_map[i] = (addr >> 1) | MAP_FLAG;\r
\r
addr = (uptr)m68k_unmapped_write8;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_write8_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_write8_map[i] = (addr >> 1) | MAP_FLAG;\r
\r
addr = (uptr)m68k_unmapped_write16;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_write16_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_write16_map[i] = (addr >> 1) | MAP_FLAG;\r
}\r
\r
MAKE_68K_READ8(m68k_read8, m68k_read8_map)\r
// -----------------------------------------------------------------\r
// memmap helpers\r
\r
-#ifndef _ASM_MEMORY_C\r
-static\r
-#endif\r
-int PadRead(int i)\r
+static u32 read_pad_3btn(int i, u32 out_bits)\r
{\r
- int pad,value,data_reg;\r
- pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
- data_reg=Pico.ioports[i+1];\r
+ u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
+ u32 value;\r
\r
- // orr the bits, which are set as output\r
- value = data_reg&(Pico.ioports[i+4]|0x80);\r
+ if (out_bits & 0x40) // TH\r
+ value = pad & 0x3f; // ?1CB RLDU\r
+ else\r
+ value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r
\r
- if (PicoOpt & POPT_6BTN_PAD)\r
- {\r
- int phase = Pico.m.padTHPhase[i];\r
-\r
- if(phase == 2 && !(data_reg&0x40)) { // TH\r
- value|=(pad&0xc0)>>2; // ?0SA 0000\r
- return value;\r
- } else if(phase == 3) {\r
- if(data_reg&0x40)\r
- value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
- else\r
- value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
- return value;\r
- }\r
+ value |= out_bits & 0x40;\r
+ return value;\r
+}\r
+\r
+static u32 read_pad_6btn(int i, u32 out_bits)\r
+{\r
+ u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
+ int phase = Pico.m.padTHPhase[i];\r
+ u32 value;\r
+\r
+ if (phase == 2 && !(out_bits & 0x40)) {\r
+ value = (pad & 0xc0) >> 2; // ?0SA 0000\r
+ goto out;\r
+ }\r
+ else if(phase == 3) {\r
+ if (out_bits & 0x40)\r
+ return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ\r
+ else\r
+ return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111\r
+ goto out;\r
}\r
\r
- if(data_reg&0x40) // TH\r
- value|=(pad&0x3f); // ?1CB RLDU\r
- else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
+ if (out_bits & 0x40) // TH\r
+ value = pad & 0x3f; // ?1CB RLDU\r
+ else\r
+ value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r
\r
- return value; // will mirror later\r
+out:\r
+ value |= out_bits & 0x40;\r
+ return value;\r
}\r
\r
-#ifndef _ASM_MEMORY_C\r
+static u32 read_nothing(int i, u32 out_bits)\r
+{\r
+ return 0xff;\r
+}\r
+\r
+typedef u32 (port_read_func)(int index, u32 out_bits);\r
+\r
+static port_read_func *port_readers[3] = {\r
+ read_pad_3btn,\r
+ read_pad_3btn,\r
+ read_nothing\r
+};\r
+\r
+static NOINLINE u32 port_read(int i)\r
+{\r
+ u32 data_reg = Pico.ioports[i + 1];\r
+ u32 ctrl_reg = Pico.ioports[i + 4] | 0x80;\r
+ u32 in, out;\r
+\r
+ out = data_reg & ctrl_reg;\r
+ out |= 0x7f & ~ctrl_reg; // pull-ups\r
+\r
+ in = port_readers[i](i, out);\r
+\r
+ return (in & ~ctrl_reg) | (data_reg & ctrl_reg);\r
+}\r
\r
-static u32 io_ports_read(u32 a)\r
+void PicoSetInputDevice(int port, enum input_device device)\r
+{\r
+ port_read_func *func;\r
+\r
+ if (port < 0 || port > 2)\r
+ return;\r
+\r
+ switch (device) {\r
+ case PICO_INPUT_PAD_3BTN:\r
+ func = read_pad_3btn;\r
+ break;\r
+\r
+ case PICO_INPUT_PAD_6BTN:\r
+ func = read_pad_6btn;\r
+ break;\r
+\r
+ default:\r
+ func = read_nothing;\r
+ break;\r
+ }\r
+\r
+ port_readers[port] = func;\r
+}\r
+\r
+NOINLINE u32 io_ports_read(u32 a)\r
{\r
u32 d;\r
a = (a>>1) & 0xf;\r
switch (a) {\r
case 0: d = Pico.m.hardware; break; // Hardware value (Version register)\r
- case 1: d = PadRead(0); break;\r
- case 2: d = PadRead(1); break;\r
+ case 1: d = port_read(0); break;\r
+ case 2: d = port_read(1); break;\r
+ case 3: d = port_read(2); break;\r
default: d = Pico.ioports[a]; break; // IO ports can be used as RAM\r
}\r
return d;\r
}\r
\r
-static void NOINLINE io_ports_write(u32 a, u32 d)\r
+NOINLINE void io_ports_write(u32 a, u32 d)\r
{\r
a = (a>>1) & 0xf;\r
\r
// 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
- if (1 <= a && a <= 2 && (PicoOpt & POPT_6BTN_PAD))\r
+ if (1 <= a && a <= 2)\r
{\r
Pico.m.padDelay[a - 1] = 0;\r
if (!(Pico.ioports[a] & 0x40) && (d & 0x40))\r
Pico.ioports[a] = d;\r
}\r
\r
-#endif // _ASM_MEMORY_C\r
+// lame..\r
+static int z80_cycles_from_68k(void)\r
+{\r
+ return z80_cycle_aim\r
+ + cycles_68k_to_z80(SekCyclesDone() - last_z80_sync);\r
+}\r
\r
void NOINLINE ctl_write_z80busreq(u32 d)\r
{\r
{\r
if (d)\r
{\r
- z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r
+ z80_cycle_cnt = z80_cycles_from_68k();\r
}\r
else\r
{\r
- z80stopCycle = SekCyclesDone();\r
if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) {\r
pprof_start(m68k);\r
- PicoSyncZ80(z80stopCycle);\r
+ PicoSyncZ80(SekCyclesDone());\r
pprof_end_sub(m68k);\r
}\r
}\r
}\r
else\r
{\r
- z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r
+ z80_cycle_cnt = z80_cycles_from_68k();\r
z80_reset();\r
}\r
Pico.m.z80_reset = d;\r
}\r
\r
if ((a & 0x4000) == 0x0000) { // z80 RAM\r
- SekCyclesBurn(2); // hack\r
+ SekCyclesBurnRun(2); // FIXME hack\r
Pico.zram[a & 0x1fff] = (u8)d;\r
return;\r
}\r
timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r
if (ym2612.OPN.ST.mode & 1) {\r
// this is not right, should really be done on overflow only\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
timer_a_next_oflow = (cycles << 8) + timer_a_step;\r
}\r
elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r
//ym2612.OPN.ST.TBT = 0;\r
timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r
if (ym2612.OPN.ST.mode & 2) {\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
timer_b_next_oflow = (cycles << 8) + timer_b_step;\r
}\r
elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r
return 0;\r
case 0x27: { /* mode, timer control */\r
int old_mode = ym2612.OPN.ST.mode;\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
ym2612.OPN.ST.mode = d;\r
\r
elprintf(EL_YMTIMER, "st mode %02x", d);\r
\r
static u32 ym2612_read_local_68k(void)\r
{\r
- int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;\r
+ int xcycles = z80_cycles_from_68k() << 8;\r
\r
ym2612_read_local();\r
\r
#endif\r
}\r
\r
+// vim:shiftwidth=2:ts=2:expandtab\r
typedef u32 (cpu68k_read_f)(u32 a);
typedef void (cpu68k_write_f)(u32 a, u32 d);
+extern u32 m68k_read8(u32 a);
+extern u32 m68k_read16(u32 a);
+extern void m68k_write8(u32 a, u8 d);
+extern void m68k_write16(u32 a, u16 d);
+
// z80
#define Z80_MEM_SHIFT 13
extern uptr z80_read_map [0x10000 >> Z80_MEM_SHIFT];
void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub);
void m68k_map_unmap(int start_addr, int end_addr);
-#define map_flag_set(x) ((x) & ((uptr)1 << (sizeof(uptr) * 8 - 1)))
+#define MAP_FLAG ((uptr)1 << (sizeof(uptr) * 8 - 1))
+#define map_flag_set(x) ((x) & MAP_FLAG)
#define MAKE_68K_READ8(name, map) \
u32 name(u32 a) \
.equ SRR_MAPPED, (1 << 0)\r
.equ SRR_READONLY, (1 << 1)\r
.equ SRF_EEPROM, (1 << 1)\r
-.equ POPT_6BTN_PAD, (1 << 5)\r
.equ POPT_EN_32X, (1 << 20)\r
\r
.text\r
PicoRead8_io: @ u32 a, u32 d\r
bic r2, r0, #0x001f @ most commonly we get i/o port read,\r
cmp r2, #0xa10000 @ so check for it first\r
- bne m_read8_not_io\r
-\r
-m_read8_misc_io:\r
- ands r0, r0, #0x1e\r
- beq m_read8_misc_hwreg\r
- cmp r0, #4\r
- movlt r0, #0\r
- moveq r0, #1\r
- ble PadRead\r
- ldr r3, =(Pico+0x22000)\r
- mov r0, r0, lsr #1 @ other IO ports (Pico.ioports[a])\r
- ldrb r0, [r3, r0]\r
- bx lr\r
-\r
-m_read8_misc_hwreg:\r
- ldr r3, =(Pico+0x22200)\r
- ldrb r0, [r3, #0x0f] @ Pico.m.hardware\r
- bx lr\r
+ beq io_ports_read\r
\r
m_read8_not_io:\r
and r2, r0, #0xfc00\r
cmp r2, #0xa10000 @ so check for it first\r
bne m_read16_not_io\r
stmfd sp!,{lr}\r
- bl m_read8_misc_io @ same as read8\r
+ bl io_ports_read @ same as read8\r
orr r0, r0, r0, lsl #8 @ only has bytes mirrored\r
ldmfd sp!,{pc}\r
\r
bic r2, r0, #0x1e @ most commonly we get i/o port write,\r
eor r2, r2, #0xa10000 @ so check for it first\r
eors r2, r2, #1\r
- bne m_write8_not_io\r
-\r
-m_write8_io:\r
- ldr r2, =PicoOpt\r
- and r0, r0, #0x1e\r
- ldr r2, [r2]\r
- ldr r3, =(Pico+0x22000) @ Pico.ioports\r
- tst r2, #POPT_6BTN_PAD\r
- beq m_write8_io_done\r
- cmp r0, #2\r
- cmpne r0, #4\r
- bne m_write8_io_done @ not likely to happen\r
- add r2, r3, #0x200 @ Pico+0x22200\r
- mov r12,#0\r
- cmp r0, #2\r
- streqb r12,[r2,#0x18]\r
- strneb r12,[r2,#0x19] @ Pico.m.padDelay[i] = 0\r
- tst r1, #0x40 @ TH\r
- beq m_write8_io_done\r
- ldrb r12,[r3, r0, lsr #1]\r
- tst r12,#0x40\r
- bne m_write8_io_done\r
- cmp r0, #2\r
- ldreqb r12,[r2,#0x0a]\r
- ldrneb r12,[r2,#0x0b] @ Pico.m.padTHPhase\r
- add r12,r12,#1\r
- streqb r12,[r2,#0x0a]\r
- strneb r12,[r2,#0x0b] @ Pico.m.padTHPhase\r
-m_write8_io_done:\r
- strb r1, [r3, r0, lsr #1]\r
- bx lr\r
+ beq io_ports_write\r
\r
m_write8_not_io:\r
tst r0, #1\r
PicoWrite16_io: @ u32 a, u32 d\r
bic r2, r0, #0x1f @ most commonly we get i/o port write,\r
cmp r2, #0xa10000 @ so check for it first\r
- beq m_write8_io\r
+ beq io_ports_write\r
\r
m_write16_not_io:\r
and r2, r0, #0xff00\r
int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r
int PicoPadInt[2]; // internal copy\r
int PicoAHW; // active addon hardware: PAHW_*\r
+int PicoQuirks; // game-specific quirks\r
int PicoRegionOverride; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
int PicoAutoRgnOrder;\r
\r
Pico.video.pending_ints=0;\r
z80_reset();\r
\r
+ // my MD1 VA6 console has this in IO\r
+ Pico.ioports[1] = Pico.ioports[2] = Pico.ioports[3] = 0xff;\r
+\r
// default VDP register values (based on Fusion)\r
Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
Pico.video.reg[0xc] = 0x81;\r
if (Pico.romsize <= 0)\r
return 1;\r
\r
-#ifdef DRC_CMP\r
+#if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)\r
PicoOpt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;\r
#endif\r
\r
SekReset();\r
// s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
SekSetRealTAS(PicoAHW & PAHW_MCD);\r
- SekCycleCntT=0;\r
-\r
- if (PicoAHW & PAHW_MCD)\r
- // needed for MCD to reset properly, probably some bug hides behind this..\r
- memset(Pico.ioports,0,sizeof(Pico.ioports));\r
+ SekCycleCnt = SekCycleAim = 0;\r
\r
Pico.m.dirtyPal = 1;\r
\r
\r
#include "pico_cmn.c"\r
\r
-int z80stopCycle;\r
-int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r
+unsigned int last_z80_sync; /* in 68k cycles */\r
+int z80_cycle_cnt;\r
int z80_cycle_aim;\r
int z80_scanline;\r
int z80_scanline_cycles; /* cycles done until z80_scanline */\r
\r
/* sync z80 to 68k */\r
-PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)\r
+PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)\r
{\r
int cnt;\r
- z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);\r
+ z80_cycle_aim += cycles_68k_to_z80(m68k_cycles_done - last_z80_sync);\r
cnt = z80_cycle_aim - z80_cycle_cnt;\r
+ last_z80_sync = m68k_cycles_done;\r
\r
pprof_start(z80);\r
\r
- elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,\r
- z80_cycle_aim, z80_cycle_aim / 228);\r
+ elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt,\r
+ z80_cycle_cnt, z80_cycle_cnt / 288,\r
+ z80_cycle_aim, z80_cycle_aim / 288);\r
\r
if (cnt > 0)\r
z80_cycle_cnt += z80_run(cnt);\r
#define POPT_EN_Z80 (1<< 2)\r
#define POPT_EN_STEREO (1<< 3)\r
#define POPT_ALT_RENDERER (1<< 4) // 00 00x0\r
-#define POPT_6BTN_PAD (1<< 5)\r
+// unused (1<< 5)\r
// unused (1<< 6)\r
#define POPT_ACC_SPRITES (1<< 7)\r
#define POPT_DIS_32C_BORDER (1<< 8) // 00 0x00\r
#define PAHW_PICO (1<<3)\r
#define PAHW_SMS (1<<4)\r
extern int PicoAHW; // Pico active hw\r
+\r
+#define PQUIRK_FORCE_6BTN (1<<0)\r
+extern int PicoQuirks;\r
+\r
extern int PicoSkipFrame; // skip rendering frame, but still do sound (if enabled) and emulation stuff\r
extern int PicoRegionOverride; // override the region detection 0: auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
extern int PicoAutoRgnOrder; // packed priority list of regions, for example 0x148 means this detection order: EUR, USA, JAP\r
typedef union { int vint; void *vptr; } pint_ret_t;\r
void PicoGetInternal(pint_t which, pint_ret_t *ret);\r
\r
-// cd/Pico.c\r
+// cd/mcd.c\r
extern void (*PicoMCDopenTray)(void);\r
extern void (*PicoMCDcloseTray)(void);\r
extern int PicoCDBuffers;\r
\r
extern unsigned char media_id_header[0x100];\r
\r
+// memory.c\r
+enum input_device {\r
+ PICO_INPUT_NOTHING,\r
+ PICO_INPUT_PAD_3BTN,\r
+ PICO_INPUT_PAD_6BTN,\r
+};\r
+void PicoSetInputDevice(int port, enum input_device device);\r
+\r
#ifdef __cplusplus\r
} // End of extern "C"\r
#endif\r
/*
- * common code for pico.c and cd/pico.c
- * (C) notaz, 2007-2009
+ * common code for base/cd/32x
+ * (C) notaz, 2007-2009,2013
*
* This work is licensed under the terms of MAME license.
* See COPYING file in the top-level directory.
#define CYCLES_M68K_LINE 488 // suitable for both PAL/NTSC
#define CYCLES_M68K_VINT_LAG 68
#define CYCLES_M68K_ASD 148
-#define CYCLES_S68K_LINE 795
-#define CYCLES_S68K_VINT_LAG 111
-#define CYCLES_S68K_ASD 241
// pad delay (for 6 button pads)
-#define PAD_DELAY \
- if (PicoOpt&POPT_6BTN_PAD) { \
- if(Pico.m.padDelay[0]++ > 25) Pico.m.padTHPhase[0]=0; \
- if(Pico.m.padDelay[1]++ > 25) Pico.m.padTHPhase[1]=0; \
- }
+#define PAD_DELAY() { \
+ if(Pico.m.padDelay[0]++ > 25) Pico.m.padTHPhase[0]=0; \
+ if(Pico.m.padDelay[1]++ > 25) Pico.m.padTHPhase[1]=0; \
+}
// CPUS_RUN
#ifndef CPUS_RUN
-#define CPUS_RUN(m68k_cycles,s68k_cycles) \
+#define CPUS_RUN(m68k_cycles) \
SekRunM68k(m68k_cycles)
#endif
-static __inline void SekRunM68k(int cyc)
+// sync m68k to SekCycleAim
+static void SekSyncM68k(void)
{
int cyc_do;
pprof_start(m68k);
pevt_log_m68k_o(EVT_RUN_START);
- SekCycleAim+=cyc;
- if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0)
- goto out;
-
-#if defined(EMU_CORE_DEBUG)
- // this means we do run-compare
- SekCycleCnt+=CM_compareRun(cyc_do, 0);
-#elif defined(EMU_C68K)
- PicoCpuCM68k.cycles=cyc_do;
- CycloneRun(&PicoCpuCM68k);
- SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
+ while ((cyc_do = SekCycleAim - SekCycleCnt) > 0) {
+ SekCycleCnt += cyc_do;
+
+#if defined(EMU_C68K)
+ PicoCpuCM68k.cycles = cyc_do;
+ CycloneRun(&PicoCpuCM68k);
+ SekCycleCnt -= PicoCpuCM68k.cycles;
#elif defined(EMU_M68K)
- SekCycleCnt+=m68k_execute(cyc_do);
+ SekCycleCnt += m68k_execute(cyc_do) - cyc_do;
#elif defined(EMU_F68K)
- SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);
+ SekCycleCnt += fm68k_emulate(cyc_do, 0, 0) - cyc_do;
#endif
+ }
-out:
+ SekCyclesLeft = 0;
+
+ SekTrace(0);
pevt_log_m68k_o(EVT_RUN_END);
pprof_end(m68k);
}
+static inline void SekRunM68k(int cyc)
+{
+ SekCycleAim += cyc;
+ SekSyncM68k();
+}
+
static int PicoFrameHints(void)
{
struct PicoVideo *pv=&Pico.video;
int lines, y, lines_vis = 224, line_sample, skip, vcnt_wrap;
+ unsigned int cycles;
int hint; // Hint counter
pevt_log_m68k_o(EVT_FRAME_START);
line_sample = 93;
}
- SekCyclesReset();
z80_resetCycles();
-#ifdef PICO_CD
- SekCyclesResetS68k();
-#endif
PsndDacLine = 0;
emustatus &= ~1;
//dprintf("-hint: %i", hint);
// This is to make active scan longer (needed for Double Dragon 2, mainly)
- CPUS_RUN(CYCLES_M68K_ASD, CYCLES_S68K_ASD);
+ CPUS_RUN(CYCLES_M68K_ASD);
for (y = 0; y < lines_vis; y++)
{
Pico.video.status|=0x200;
}
- PAD_DELAY
-#ifdef PICO_CD
- check_cd_dma();
-#endif
+ PAD_DELAY();
// H-Interrupts:
if (--hint < 0) // y <= lines_vis: Comix Zone, Golden Axe
hint=pv->reg[10]; // Reload H-Int counter
pv->pending_ints|=0x10;
if (pv->reg[0]&0x10) {
- elprintf(EL_INTS, "hint: @ %06x [%i]", SekPc, SekCycleCnt);
+ elprintf(EL_INTS, "hint: @ %06x [%i]", SekPc, SekCyclesDone());
SekInterrupt(4);
}
}
// get samples from sound chips
if ((y == 224 || y == line_sample) && PsndOut)
{
+ cycles = SekCyclesDone();
+
if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80))
- PicoSyncZ80(SekCycleCnt);
+ PicoSyncZ80(cycles);
if (ym2612.dacen && PsndDacLine <= y)
PsndDoDAC(y);
+#ifdef PICO_CD
+ pcd_sync_s68k(cycles, 0);
+#endif
#ifdef PICO_32X
- p32x_sync_sh2s(SekCyclesDoneT2());
+ p32x_sync_sh2s(cycles);
#endif
PsndGetSamples(y);
}
// Run scanline:
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
- CPUS_RUN(CYCLES_M68K_LINE, CYCLES_S68K_LINE);
+ CPUS_RUN(CYCLES_M68K_LINE);
-#ifdef PICO_CD
- update_chips();
-#else
if (PicoLineHook) PicoLineHook();
-#endif
pevt_log_m68k_o(EVT_NEXT_LINE);
}
Pico.video.status|=0x200;
memcpy(PicoPadInt, PicoPad, sizeof(PicoPadInt));
- PAD_DELAY
-#ifdef PICO_CD
- check_cd_dma();
-#endif
+ PAD_DELAY();
// Last H-Int:
if (--hint < 0)
{
hint=pv->reg[10]; // Reload H-Int counter
pv->pending_ints|=0x10;
- //printf("rhint: %i @ %06x [%i|%i]\n", hint, SekPc, y, SekCycleCnt);
+ //printf("rhint: %i @ %06x [%i|%i]\n", hint, SekPc, y, SekCyclesDone());
if (pv->reg[0]&0x10) SekInterrupt(4);
}
// there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
// also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
// also delay between last H-int and V-int (Golden Axe 3)
- CPUS_RUN(CYCLES_M68K_VINT_LAG, CYCLES_S68K_VINT_LAG);
+ CPUS_RUN(CYCLES_M68K_VINT_LAG);
if (pv->reg[1]&0x20) {
- elprintf(EL_INTS, "vint: @ %06x [%i]", SekPc, SekCycleCnt);
+ elprintf(EL_INTS, "vint: @ %06x [%i]", SekPc, SekCyclesDone());
SekInterrupt(6);
}
+
+ cycles = SekCyclesDone();
if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80)) {
- PicoSyncZ80(SekCycleCnt);
+ PicoSyncZ80(cycles);
elprintf(EL_INTS, "zint");
z80_int();
}
+#ifdef PICO_CD
+ pcd_sync_s68k(cycles, 0);
+#endif
#ifdef PICO_32X
- p32x_sync_sh2s(SekCyclesDoneT2());
+ p32x_sync_sh2s(cycles);
p32x_start_blank();
#endif
// Run scanline:
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
- CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG - CYCLES_M68K_ASD,
- CYCLES_S68K_LINE - CYCLES_S68K_VINT_LAG - CYCLES_S68K_ASD);
+ CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG - CYCLES_M68K_ASD);
-#ifdef PICO_CD
- update_chips();
-#else
if (PicoLineHook) PicoLineHook();
-#endif
pevt_log_m68k_o(EVT_NEXT_LINE);
lines = scanlines_total;
pv->v_counter = (pv->v_counter << 1) | 1;
pv->v_counter &= 0xff;
- PAD_DELAY
-#ifdef PICO_CD
- check_cd_dma();
-#endif
+ PAD_DELAY();
// Run scanline:
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
- CPUS_RUN(CYCLES_M68K_LINE, CYCLES_S68K_LINE);
+ CPUS_RUN(CYCLES_M68K_LINE);
-#ifdef PICO_CD
- update_chips();
-#else
if (PicoLineHook) PicoLineHook();
-#endif
pevt_log_m68k_o(EVT_NEXT_LINE);
}
- // sync z80
+ // sync cpus
+ cycles = SekCyclesDone();
if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80))
- PicoSyncZ80(Pico.m.pal ? 151809 : 127671); // cycles adjusted for converter
+ PicoSyncZ80(cycles);
if (PsndOut && ym2612.dacen && PsndDacLine <= lines-1)
PsndDoDAC(lines-1);
+#ifdef PICO_CD
+ pcd_sync_s68k(cycles, 0);
+#endif
#ifdef PICO_32X
- p32x_sync_sh2s(SekCyclesDoneT2());
+ p32x_sync_sh2s(cycles);
#endif
timers_cycle();
#undef PAD_DELAY
#undef CPUS_RUN
+// vim:shiftwidth=2:ts=2:expandtab
#ifdef EMU_C68K\r
#include "../cpu/cyclone/Cyclone.h"\r
extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;\r
-#define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run\r
-#define SekCyclesLeft \\r
- (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
-#define SekCyclesLeftS68k \\r
- ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles)\r
-#define SekEndTimeslice(after) PicoCpuCM68k.cycles=after\r
-#define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after\r
+#define SekCyclesLeft PicoCpuCM68k.cycles // cycles left for this run\r
+#define SekCyclesLeftS68k PicoCpuCS68k.cycles\r
#define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)\r
#define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)\r
-#define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])\r
+#define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])\r
+#define SekDarS68k(x) (x < 8 ? PicoCpuCS68k.d[x] : PicoCpuCS68k.a[x - 8])\r
#define SekSr CycloneGetSr(&PicoCpuCM68k)\r
+#define SekSrS68k CycloneGetSr(&PicoCpuCS68k)\r
#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }\r
#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }\r
#define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1)\r
#define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)\r
-#define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
+#define SekShouldInterrupt() (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
\r
#define SekInterrupt(i) PicoCpuCM68k.irq=i\r
#define SekIrqLevel PicoCpuCM68k.irq\r
\r
-#ifdef EMU_M68K\r
-#define EMU_CORE_DEBUG\r
-#endif\r
#endif\r
\r
#ifdef EMU_F68K\r
#include "../cpu/fame/fame.h"\r
extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;\r
-#define SekCyclesLeftNoMCD PicoCpuFM68k.io_cycle_counter\r
-#define SekCyclesLeft \\r
- (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
-#define SekCyclesLeftS68k \\r
- ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter)\r
-#define SekEndTimeslice(after) PicoCpuFM68k.io_cycle_counter=after\r
-#define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after\r
+#define SekCyclesLeft PicoCpuFM68k.io_cycle_counter\r
+#define SekCyclesLeftS68k PicoCpuFS68k.io_cycle_counter\r
#define SekPc fm68k_get_pc(&PicoCpuFM68k)\r
#define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)\r
-#define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)\r
+#define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)\r
+#define SekDarS68k(x) (x < 8 ? PicoCpuFS68k.dreg[x].D : PicoCpuFS68k.areg[x - 8].D)\r
#define SekSr PicoCpuFM68k.sr\r
+#define SekSrS68k PicoCpuFS68k.sr\r
#define SekSetStop(x) { \\r
PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \\r
if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \\r
}\r
#define SekIsStoppedM68k() (PicoCpuFM68k.execinfo&FM68K_HALTED)\r
#define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)\r
-#define SekShouldInterrupt fm68k_would_interrupt()\r
+#define SekShouldInterrupt() fm68k_would_interrupt()\r
\r
#define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq\r
#define SekIrqLevel PicoCpuFM68k.interrupts[0]\r
\r
-#ifdef EMU_M68K\r
-#define EMU_CORE_DEBUG\r
-#endif\r
#endif\r
\r
#ifdef EMU_M68K\r
#include "../cpu/musashi/m68kcpu.h"\r
extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;\r
#ifndef SekCyclesLeft\r
-#define SekCyclesLeftNoMCD PicoCpuMM68k.cyc_remaining_cycles\r
-#define SekCyclesLeft \\r
- (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)\r
-#define SekCyclesLeftS68k \\r
- ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles)\r
-#define SekEndTimeslice(after) SET_CYCLES(after)\r
-#define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after\r
+#define SekCyclesLeft PicoCpuMM68k.cyc_remaining_cycles\r
+#define SekCyclesLeftS68k PicoCpuMS68k.cyc_remaining_cycles\r
#define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)\r
#define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)\r
-#define SekDar(x) PicoCpuMM68k.dar[x]\r
-#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)\r
+#define SekDar(x) PicoCpuMM68k.dar[x]\r
+#define SekDarS68k(x) PicoCpuMS68k.dar[x]\r
+#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)\r
+#define SekSrS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_SR)\r
#define SekSetStop(x) { \\r
if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \\r
else PicoCpuMM68k.stopped=0; \\r
}\r
#define SekIsStoppedM68k() (PicoCpuMM68k.stopped==STOP_LEVEL_STOP)\r
#define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)\r
-#define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK)\r
+#define SekShouldInterrupt() (CPU_INT_LEVEL > FLAG_INT_MASK)\r
\r
#define SekInterrupt(irq) { \\r
void *oldcontext = m68ki_cpu_p; \\r
#endif\r
#endif // EMU_M68K\r
\r
-extern int SekCycleCnt; // cycles done in this frame\r
-extern int SekCycleAim; // cycle aim\r
-extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame\r
-\r
-#define SekCyclesReset() { \\r
- SekCycleCntT+=SekCycleAim; \\r
- SekCycleCnt-=SekCycleAim; \\r
- SekCycleAim=0; \\r
+// while running, cnt represents target of current timeslice\r
+// while not in SekRun(), it's actual cycles done\r
+// (but always use SekCyclesDone() if you need current position)\r
+// cnt may change if timeslice is ended prematurely or extended,\r
+// so we use SekCycleAim for the actual target\r
+extern unsigned int SekCycleCnt;\r
+extern unsigned int SekCycleAim;\r
+\r
+// number of cycles done (can be checked anywhere)\r
+#define SekCyclesDone() (SekCycleCnt - SekCyclesLeft)\r
+\r
+// burn cycles while not in SekRun() and while in\r
+#define SekCyclesBurn(c) SekCycleCnt += c\r
+#define SekCyclesBurnRun(c) { \\r
+ SekCyclesLeft -= c; \\r
+ if (SekCyclesLeft < 0) \\r
+ SekCyclesLeft = 0; \\r
}\r
-#define SekCyclesBurn(c) SekCycleCnt+=c\r
-#define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // number of cycles done in this frame (can be checked anywhere)\r
-#define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom\r
-#define SekCyclesDoneT2() (SekCycleCntT + SekCycleCnt) // same as above but not from memhandlers\r
\r
+// note: sometimes may extend timeslice to delay an irq\r
#define SekEndRun(after) { \\r
- SekCycleCnt -= SekCyclesLeft - (after); \\r
- if (SekCycleCnt < 0) SekCycleCnt = 0; \\r
- SekEndTimeslice(after); \\r
+ SekCycleCnt -= SekCyclesLeft - (after); \\r
+ SekCyclesLeft = after; \\r
}\r
\r
+extern unsigned int SekCycleCntS68k;\r
+extern unsigned int SekCycleAimS68k;\r
+\r
#define SekEndRunS68k(after) { \\r
- SekCycleCntS68k -= SekCyclesLeftS68k - (after); \\r
- if (SekCycleCntS68k < 0) SekCycleCntS68k = 0; \\r
- SekEndTimesliceS68k(after); \\r
+ if (SekCyclesLeftS68k > (after)) { \\r
+ SekCycleCntS68k -= SekCyclesLeftS68k - (after); \\r
+ SekCyclesLeftS68k = after; \\r
+ } \\r
}\r
\r
-extern int SekCycleCntS68k;\r
-extern int SekCycleAimS68k;\r
+#define SekCyclesDoneS68k() (SekCycleCntS68k - SekCyclesLeftS68k)\r
\r
-#define SekCyclesResetS68k() { \\r
- SekCycleCntS68k-=SekCycleAimS68k; \\r
- SekCycleAimS68k=0; \\r
-}\r
-#define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)\r
-\r
-#ifdef EMU_CORE_DEBUG\r
-extern int dbg_irq_level;\r
-#undef SekEndTimeslice\r
-#undef SekCyclesBurn\r
-#undef SekEndRun\r
-#undef SekInterrupt\r
-#define SekEndTimeslice(c)\r
-#define SekCyclesBurn(c) c\r
-#define SekEndRun(c)\r
-#define SekInterrupt(irq) dbg_irq_level=irq\r
-#endif\r
+// compare cycles, handling overflows\r
+// check if a > b\r
+#define CYCLES_GT(a, b) \\r
+ ((int)((a) - (b)) > 0)\r
+// check if a >= b\r
+#define CYCLES_GE(a, b) \\r
+ ((int)((a) - (b)) >= 0)\r
\r
// ----------------------- Z80 CPU -----------------------\r
\r
#define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles))\r
#define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)\r
#define z80_int() drZ80.Z80_IRQ = 1\r
+#define z80_int() drZ80.Z80_IRQ = 1\r
+#define z80_nmi() drZ80.Z80IF |= 8\r
\r
#define z80_cyclesLeft drZ80.cycles\r
#define z80_pc() (drZ80.Z80PC - drZ80.Z80PC_BASE)\r
#define z80_run(cycles) Cz80_Exec(&CZ80, cycles)\r
#define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)\r
#define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)\r
+#define z80_nmi() Cz80_Set_IRQ(&CZ80, IRQ_LINE_NMI, 0)\r
\r
#define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles)\r
#define z80_pc() Cz80_Get_Reg(&CZ80, CZ80_PC)\r
#define z80_run(cycles) (cycles)\r
#define z80_run_nr(cycles)\r
#define z80_int()\r
+#define z80_nmi()\r
\r
#endif\r
\r
#define Z80_STATE_SIZE 0x60\r
\r
-extern int z80stopCycle; /* in 68k cycles */\r
+extern unsigned int last_z80_sync;\r
extern int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r
extern int z80_cycle_aim;\r
extern int z80_scanline;\r
extern int z80_scanline_cycles; /* cycles done until z80_scanline */\r
\r
#define z80_resetCycles() \\r
+ last_z80_sync = SekCyclesDone(); \\r
z80_cycle_cnt = z80_cycle_aim = z80_scanline = z80_scanline_cycles = 0;\r
\r
#define z80_cyclesDone() \\r
} \\r
} while (0)\r
# define sh2_cycles_left(sh2) (sh2)->icount\r
+# define sh2_burn_cycles(sh2, n) (sh2)->icount -= n\r
# define sh2_pc(sh2) (sh2)->ppc\r
#else\r
# define sh2_end_run(sh2, after_) do { \\r
} \\r
} while (0)\r
# define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12)\r
+# define sh2_burn_cycles(sh2, n) (sh2)->sr -= ((n) << 12)\r
# define sh2_pc(sh2) (sh2)->pc\r
#endif\r
\r
#define sh2_set_vbr(c, v) \\r
{ if (c) ssh2.vbr = v; else msh2.vbr = v; }\r
\r
+#define elprintf_sh2(sh2, w, f, ...) \\r
+ elprintf(w,"%csh2 "f,(sh2)->is_slave?'s':'m',##__VA_ARGS__)\r
+\r
// ---------------------------------------------------------\r
\r
// main oscillator clock which controls timing\r
{\r
unsigned char carthw[0x10];\r
unsigned char io_ctl;\r
- unsigned char pad[0x4f];\r
+ unsigned char nmi_state;\r
+ unsigned char pad[0x4e];\r
};\r
\r
// some assembly stuff depend on these, do not touch!\r
unsigned short vsram[0x40]; // 0x22180\r
\r
unsigned char *rom; // 0x22200\r
- unsigned int romsize; // 0x22204\r
+ unsigned int romsize; // 0x22204 (on 32bits)\r
\r
struct PicoMisc m;\r
struct PicoVideo video;\r
} ch[8];\r
};\r
\r
+#define PCD_ST_S68K_RST 1\r
+\r
struct mcd_misc\r
{\r
unsigned short hint_vector;\r
- unsigned char busreq;\r
+ unsigned char busreq; // not s68k_regs[1]\r
unsigned char s68k_pend_ints;\r
- unsigned int state_flags; // 04: emu state: reset_pending\r
- unsigned int counter75hz;\r
- unsigned int pad0;\r
- int timer_int3; // 10\r
- unsigned int timer_stopwatch;\r
+ unsigned int state_flags; // 04\r
+ unsigned int stopwatch_base_c;\r
+ unsigned short m68k_poll_a;\r
+ unsigned short m68k_poll_cnt;\r
+ unsigned short s68k_poll_a;\r
+ unsigned short s68k_poll_cnt;\r
+ unsigned int s68k_poll_clk;\r
unsigned char bcram_reg; // 18: battery-backed RAM cart register\r
- unsigned char pad2;\r
+ unsigned char dmna_ret_2m;\r
unsigned short pad3;\r
- int pad[9];\r
+ int pad4[9];\r
};\r
\r
typedef struct\r
unsigned char pcm_ram[0x10000];\r
unsigned char pcm_ram_b[0x10][0x1000];\r
};\r
+ // FIXME: should be short\r
unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs\r
unsigned char bram[0x2000]; // 110200: 8K\r
struct mcd_misc m; // 112200: misc\r
#define P32XP_FULL (1<<15) // PWM pulse\r
#define P32XP_EMPTY (1<<14)\r
\r
-#define P32XF_68KCPOLL (1 << 0)\r
-#define P32XF_68KVPOLL (1 << 1)\r
+#define P32XF_68KCPOLL (1 << 0)\r
+#define P32XF_68KVPOLL (1 << 1)\r
+#define P32XF_Z80_32X_IO (1 << 7) // z80 does 32x io\r
\r
#define P32XI_VRES (1 << 14/2) // IRL/2\r
#define P32XI_VINT (1 << 12/2)\r
// peripheral reg access\r
#define PREG8(regs,offs) ((unsigned char *)regs)[offs ^ 3]\r
\r
-// real one is 4*2, but we use more because we don't lockstep\r
-#define DMAC_FIFO_LEN (4*4)\r
+#define DMAC_FIFO_LEN (4*2)\r
#define PWM_BUFF_LEN 1024 // in one channel samples\r
\r
#define SH2_DRCBLK_RAM_SHIFT 1\r
unsigned char sh2irqi[2]; // individual\r
unsigned int sh2irqs; // common irqs\r
unsigned short dmac_fifo[DMAC_FIFO_LEN];\r
+ unsigned int pad[4];\r
unsigned int dmac0_fifo_ptr;\r
- unsigned int pad;\r
+ unsigned short vdp_fbcr_fake;\r
+ unsigned short pad2;\r
unsigned char comm_dirty_68k;\r
unsigned char comm_dirty_sh2;\r
unsigned char pwm_irq_cnt;\r
#ifdef DRC_SH2\r
unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];\r
#endif\r
- unsigned char sh2_rom_m[0x800];\r
- unsigned char sh2_rom_s[0x400];\r
+ union {\r
+ unsigned char b[0x800];\r
+ unsigned short w[0x800/2];\r
+ } sh2_rom_m;\r
+ union {\r
+ unsigned char b[0x400];\r
+ unsigned short w[0x400/2];\r
+ } sh2_rom_s;\r
unsigned short pal[0x100];\r
unsigned short pal_native[0x100]; // converted to native (for renderer)\r
signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame\r
- signed short pwm_fifo[2][4]; // [0] - current, others - fifo entries\r
+ signed short pwm_current[2]; // current converted samples\r
+ unsigned short pwm_fifo[2][4]; // [0] - current raw, others - fifo entries\r
};\r
\r
// area.c\r
unsigned int PicoRead16_io(unsigned int a);\r
void PicoWrite8_io(unsigned int a, unsigned int d);\r
void PicoWrite16_io(unsigned int a, unsigned int d);\r
-void p32x_dreq1_trigger(void);\r
\r
// pico/memory.c\r
PICO_INTERNAL void PicoMemSetupPico(void);\r
\r
// cd/memory.c\r
PICO_INTERNAL void PicoMemSetupCD(void);\r
-void PicoMemStateLoaded(void);\r
+void pcd_state_loaded_mem(void);\r
\r
// pico.c\r
extern struct Pico Pico;\r
extern void (*PicoLineHook)(void);\r
PICO_INTERNAL int CheckDMA(void);\r
PICO_INTERNAL void PicoDetectRegion(void);\r
-PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done);\r
+PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done);\r
+\r
+// cd/mcd.c\r
+#define PCDS_IEN1 (1<<1)\r
+#define PCDS_IEN2 (1<<2)\r
+#define PCDS_IEN3 (1<<3)\r
+#define PCDS_IEN4 (1<<4)\r
+#define PCDS_IEN5 (1<<5)\r
+#define PCDS_IEN6 (1<<6)\r
\r
-// cd/pico.c\r
PICO_INTERNAL void PicoInitMCD(void);\r
PICO_INTERNAL void PicoExitMCD(void);\r
PICO_INTERNAL void PicoPowerMCD(void);\r
PICO_INTERNAL int PicoResetMCD(void);\r
PICO_INTERNAL void PicoFrameMCD(void);\r
\r
+enum pcd_event {\r
+ PCD_EVENT_CDC,\r
+ PCD_EVENT_TIMER3,\r
+ PCD_EVENT_GFX,\r
+ PCD_EVENT_DMA,\r
+ PCD_EVENT_COUNT,\r
+};\r
+extern unsigned int pcd_event_times[PCD_EVENT_COUNT];\r
+void pcd_event_schedule(unsigned int now, enum pcd_event event, int after);\r
+void pcd_event_schedule_s68k(enum pcd_event event, int after);\r
+unsigned int pcd_cycles_m68k_to_s68k(unsigned int c);\r
+int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync);\r
+void pcd_state_loaded(void);\r
+\r
// pico/pico.c\r
PICO_INTERNAL void PicoInitPico(void);\r
PICO_INTERNAL void PicoReratePico(void);\r
void SekStepM68k(void);\r
void SekInitIdleDet(void);\r
void SekFinishIdleDet(void);\r
+#if defined(CPU_CMP_R) || defined(CPU_CMP_W)\r
+void SekTrace(int is_s68k);\r
+#else\r
+#define SekTrace(x)\r
+#endif\r
\r
// cd/sek.c\r
PICO_INTERNAL void SekInitS68k(void);\r
enum p32x_event {\r
P32X_EVENT_PWM,\r
P32X_EVENT_FILLEND,\r
+ P32X_EVENT_HINT,\r
P32X_EVENT_COUNT,\r
};\r
-extern unsigned int event_times[P32X_EVENT_COUNT];\r
+extern unsigned int p32x_event_times[P32X_EVENT_COUNT];\r
\r
void Pico32xInit(void);\r
void PicoPower32x(void);\r
void p32x_sync_sh2s(unsigned int m68k_target);\r
void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target);\r
void p32x_update_irls(SH2 *active_sh2, int m68k_cycles);\r
+void p32x_trigger_irq(SH2 *sh2, int m68k_cycles, unsigned int mask);\r
+void p32x_update_cmd_irq(SH2 *sh2, int m68k_cycles);\r
void p32x_reset_sh2s(void);\r
void p32x_event_schedule(unsigned int now, enum p32x_event event, int after);\r
void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after);\r
+void p32x_schedule_hint(SH2 *sh2, int m68k_cycles);\r
\r
// 32x/memory.c\r
struct Pico32xMem *Pico32xMem;\r
void p32x_pwm_ctl_changed(void);\r
void p32x_pwm_schedule(unsigned int m68k_now);\r
void p32x_pwm_schedule_sh2(SH2 *sh2);\r
+void p32x_pwm_sync_to_sh2(SH2 *sh2);\r
void p32x_pwm_irq_event(unsigned int m68k_now);\r
void p32x_pwm_state_loaded(void);\r
\r
void p32x_dreq1_trigger(void);\r
void p32x_timers_recalc(void);\r
void p32x_timers_do(unsigned int m68k_slice);\r
+void sh2_peripheral_reset(SH2 *sh2);\r
unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);\r
unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);\r
unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);\r
#define EL_32X 0x00080000\r
#define EL_PWM 0x00100000 /* 32X PWM stuff (LOTS of output) */\r
#define EL_32XP 0x00200000 /* 32X peripherals */\r
+#define EL_CD 0x00400000 /* MCD */\r
\r
#define EL_STATUS 0x40000000 /* status messages */\r
#define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */\r
void pevt_dump(void);\r
\r
#define pevt_log_m68k(e) \\r
- pevt_log(SekCyclesDoneT(), EVT_M68K, e)\r
+ pevt_log(SekCyclesDone(), EVT_M68K, e)\r
#define pevt_log_m68k_o(e) \\r
- pevt_log(SekCyclesDoneT2(), EVT_M68K, e)\r
+ pevt_log(SekCyclesDone(), EVT_M68K, e)\r
#define pevt_log_sh2(sh2, e) \\r
pevt_log(sh2_cycles_done_m68k(sh2), EVT_MSH2 + (sh2)->is_slave, e)\r
#define pevt_log_sh2_o(sh2, e) \\r
#include "memory.h"\r
\r
\r
-int SekCycleCnt=0; // cycles done in this frame\r
-int SekCycleAim=0; // cycle aim\r
-unsigned int SekCycleCntT=0;\r
+unsigned int SekCycleCnt;\r
+unsigned int SekCycleAim;\r
\r
\r
/* context */\r
#endif\r
\r
*(unsigned int *)(cpu+0x40) = pc;\r
- *(unsigned int *)(cpu+0x50) = SekCycleCntT;\r
+ *(unsigned int *)(cpu+0x50) =\r
+ is_sub ? SekCycleCntS68k : SekCycleCnt;\r
}\r
\r
PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub)\r
context->execinfo &= ~FM68K_HALTED;\r
if (cpu[0x4d]&1) context->execinfo |= FM68K_HALTED;\r
#endif\r
- SekCycleCntT = *(unsigned int *)(cpu+0x50);\r
+ if (is_sub)\r
+ SekCycleCntS68k = *(unsigned int *)(cpu+0x50);\r
+ else\r
+ SekCycleCnt = *(unsigned int *)(cpu+0x50);\r
}\r
\r
\r
\r
static unsigned short **idledet_ptrs = NULL;\r
static int idledet_count = 0, idledet_bads = 0;\r
-int idledet_start_frame = 0;\r
+static int idledet_start_frame = 0;\r
\r
#if 0\r
#define IDLE_STATS 1\r
#endif\r
}\r
\r
+int SekIsIdleReady(void)\r
+{\r
+ return (Pico.m.frame_count >= idledet_start_frame);\r
+}\r
+\r
int SekIsIdleCode(unsigned short *dst, int bytes)\r
{\r
// printf("SekIsIdleCode %04x %i\n", *dst, bytes);\r
return 1;\r
break;\r
case 4:\r
- if ( (*dst & 0xfff8) == 0x4a10 || // tst.b ($aX) // there should be no need to wait\r
- (*dst & 0xfff8) == 0x4a28 || // tst.b ($xxxx,a0) // for byte change anywhere\r
- (*dst & 0xff3f) == 0x4a38 || // tst.x ($xxxx.w); tas ($xxxx.w)\r
- (*dst & 0xc1ff) == 0x0038 || // move.x ($xxxx.w), dX\r
- (*dst & 0xf13f) == 0xb038) // cmp.x ($xxxx.w), dX\r
+ if ( (*dst & 0xff3f) == 0x4a38 || // tst.x ($xxxx.w); tas ($xxxx.w)\r
+ (*dst & 0xc1ff) == 0x0038 || // move.x ($xxxx.w), dX\r
+ (*dst & 0xf13f) == 0xb038) // cmp.x ($xxxx.w), dX\r
+ return 1;\r
+ if (PicoAHW & (PAHW_MCD|PAHW_32X))\r
+ break;\r
+ // with no addons, there should be no need to wait\r
+ // for byte change anywhere\r
+ if ( (*dst & 0xfff8) == 0x4a10 || // tst.b ($aX)\r
+ (*dst & 0xfff8) == 0x4a28) // tst.b ($xxxx,a0)\r
return 1;\r
break;\r
case 6:\r
return 1;\r
break;\r
case 12:\r
- if ((*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
+ if (PicoAHW & (PAHW_MCD|PAHW_32X))\r
+ break;\r
+ if ( (*dst & 0xf1f8) == 0x3010 && // move.w (aX), dX\r
(dst[1]&0xf100) == 0x0000 && // arithmetic\r
(dst[3]&0xf100) == 0x0000) // arithmetic\r
return 1;\r
is_main68k = ctx == &PicoCpuFM68k;\r
#endif\r
pc &= ~0xff000000;\r
+ if (!(newop&0x200))\r
elprintf(EL_IDLE, "idle: patch %06x %04x %04x %c %c #%i", pc, oldop, newop,\r
(newop&0x200)?'n':'y', is_main68k?'m':'s', idledet_count);\r
\r
}\r
\r
\r
+#if defined(CPU_CMP_R) || defined(CPU_CMP_W)\r
+#include "debug.h"\r
+\r
+struct ref_68k {\r
+ u32 dar[16];\r
+ u32 pc;\r
+ u32 sr;\r
+ u32 cycles;\r
+ u32 pc_prev;\r
+};\r
+struct ref_68k ref_68ks[2];\r
+static int current_68k;\r
+\r
+void SekTrace(int is_s68k)\r
+{\r
+ struct ref_68k *x68k = &ref_68ks[is_s68k];\r
+ u32 pc = is_s68k ? SekPcS68k : SekPc;\r
+ u32 sr = is_s68k ? SekSrS68k : SekSr;\r
+ u32 cycles = is_s68k ? SekCycleCntS68k : SekCycleCnt;\r
+ u32 r;\r
+ u8 cmd;\r
+#ifdef CPU_CMP_W\r
+ int i;\r
+\r
+ if (is_s68k != current_68k) {\r
+ current_68k = is_s68k;\r
+ cmd = CTL_68K_SLAVE | current_68k;\r
+ tl_write(&cmd, sizeof(cmd));\r
+ }\r
+ if (pc != x68k->pc) {\r
+ x68k->pc = pc;\r
+ tl_write_uint(CTL_68K_PC, x68k->pc);\r
+ }\r
+ if (sr != x68k->sr) {\r
+ x68k->sr = sr;\r
+ tl_write_uint(CTL_68K_SR, x68k->sr);\r
+ }\r
+ for (i = 0; i < 16; i++) {\r
+ r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
+ if (r != x68k->dar[i]) {\r
+ x68k->dar[i] = r;\r
+ tl_write_uint(CTL_68K_R + i, r);\r
+ }\r
+ }\r
+ tl_write_uint(CTL_68K_CYCLES, cycles);\r
+#else\r
+ int i, bad = 0;\r
+\r
+ while (1)\r
+ {\r
+ int ret = tl_read(&cmd, sizeof(cmd));\r
+ if (ret == 0) {\r
+ elprintf(EL_STATUS, "EOF");\r
+ exit(1);\r
+ }\r
+ switch (cmd) {\r
+ case CTL_68K_SLAVE:\r
+ case CTL_68K_SLAVE + 1:\r
+ current_68k = cmd & 1;\r
+ break;\r
+ case CTL_68K_PC:\r
+ tl_read_uint(&x68k->pc);\r
+ break;\r
+ case CTL_68K_SR:\r
+ tl_read_uint(&x68k->sr);\r
+ break;\r
+ case CTL_68K_CYCLES:\r
+ tl_read_uint(&x68k->cycles);\r
+ goto breakloop;\r
+ default:\r
+ if (CTL_68K_R <= cmd && cmd < CTL_68K_R + 0x10)\r
+ tl_read_uint(&x68k->dar[cmd - CTL_68K_R]);\r
+ else\r
+ elprintf(EL_STATUS, "invalid cmd: %02x", cmd);\r
+ }\r
+ }\r
+\r
+breakloop:\r
+ if (is_s68k != current_68k) {\r
+ printf("bad 68k: %d %d\n", is_s68k, current_68k);\r
+ bad = 1;\r
+ }\r
+ if (cycles != x68k->cycles) {\r
+ printf("bad cycles: %u %u\n", cycles, x68k->cycles);\r
+ bad = 1;\r
+ }\r
+ if ((pc ^ x68k->pc) & 0xffffff) {\r
+ printf("bad PC: %08x %08x\n", pc, x68k->pc);\r
+ bad = 1;\r
+ }\r
+ if (sr != x68k->sr) {\r
+ printf("bad SR: %03x %03x\n", sr, x68k->sr);\r
+ bad = 1;\r
+ }\r
+ for (i = 0; i < 16; i++) {\r
+ r = is_s68k ? SekDarS68k(i) : SekDar(i);\r
+ if (r != x68k->dar[i]) {\r
+ printf("bad %c%d: %08x %08x\n", i < 8 ? 'D' : 'A', i & 7,\r
+ r, x68k->dar[i]);\r
+ bad = 1;\r
+ }\r
+ }\r
+ if (bad) {\r
+ for (i = 0; i < 8; i++)\r
+ printf("D%d: %08x A%d: %08x\n", i, x68k->dar[i],\r
+ i, x68k->dar[i + 8]);\r
+ printf("PC: %08x, %08x\n", x68k->pc, x68k->pc_prev);\r
+\r
+ PDebugDumpMem();\r
+ exit(1);\r
+ }\r
+ x68k->pc_prev = x68k->pc;\r
+#endif\r
+}\r
+#endif // CPU_CMP_*\r
+\r
#if defined(EMU_M68K) && M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER\r
static unsigned char op_flags[0x400000/2] = { 0, };\r
static int atexit_set = 0;\r
op_flags[REG_PC/2] = 1;\r
}\r
#endif\r
+\r
+// vim:shiftwidth=2:ts=2:expandtab\r
* - remaining status flags (OVR/COL)
* - RAM support in mapper
* - region support
- * - Pause button (NMI)
* - SN76496 DAC-like usage
* - H counter
*/
int skip = PicoSkipFrame;
int lines_vis = 192;
int hint; // Hint counter
+ int nmi;
int y;
+ nmi = (PicoPad[0] >> 7) & 1;
+ if (!Pico.ms.nmi_state && nmi)
+ z80_nmi();
+ Pico.ms.nmi_state = nmi;
+
PicoFrameStartMode4();
hint = pv->reg[0x0a];
CHUNK_32X_EVT,\r
CHUNK_32X_FIRST = CHUNK_MSH2,\r
CHUNK_32X_LAST = CHUNK_32X_EVT,\r
+ // add new stuff here\r
+ CHUNK_CD_EVT = 50,\r
//\r
CHUNK_DEFAULT_COUNT,\r
- CHUNK_CARTHW_ = CHUNK_CARTHW, // defined in PicoInt\r
+ CHUNK_CARTHW_ = CHUNK_CARTHW, // 64 (defined in PicoInt)\r
} chunk_name_e;\r
\r
-static const char * const chunk_names[] = {\r
+static const char * const chunk_names[CHUNK_DEFAULT_COUNT] = {\r
"INVALID!",\r
"M68K state",\r
"RAM",\r
}\r
\r
#define CHECKED_WRITE(name,len,data) { \\r
- if (PicoStateProgressCB && name < CHUNK_DEFAULT_COUNT) { \\r
+ if (PicoStateProgressCB && name < CHUNK_DEFAULT_COUNT && chunk_names[name]) { \\r
strncpy(sbuff + 9, chunk_names[name], sizeof(sbuff) - 9); \\r
PicoStateProgressCB(sbuff); \\r
} \\r
}\r
\r
#define CHECKED_WRITE_BUFF(name,buff) { \\r
- if (PicoStateProgressCB && name < CHUNK_DEFAULT_COUNT) { \\r
+ if (PicoStateProgressCB && name < CHUNK_DEFAULT_COUNT && chunk_names[name]) { \\r
strncpy(sbuff + 9, chunk_names[name], sizeof(sbuff) - 9); \\r
PicoStateProgressCB(sbuff); \\r
} \\r
SekPackCpu(buff, 1);\r
if (Pico_mcd->s68k_regs[3] & 4) // 1M mode?\r
wram_1M_to_2M(Pico_mcd->word_ram2M);\r
- Pico_mcd->m.hint_vector = *(unsigned short *)(Pico_mcd->bios + 0x72);\r
+ memcpy(&Pico_mcd->m.hint_vector, Pico_mcd->bios + 0x72,\r
+ sizeof(Pico_mcd->m.hint_vector));\r
\r
CHECKED_WRITE_BUFF(CHUNK_S68K, buff);\r
CHECKED_WRITE_BUFF(CHUNK_PRG_RAM, Pico_mcd->prg_ram);\r
CHECKED_WRITE_BUFF(CHUNK_SCD, Pico_mcd->scd);\r
CHECKED_WRITE_BUFF(CHUNK_RC, Pico_mcd->rot_comp);\r
CHECKED_WRITE_BUFF(CHUNK_MISC_CD, Pico_mcd->m);\r
+ memset(buff, 0, 0x40);\r
+ memcpy(buff, pcd_event_times, sizeof(pcd_event_times));\r
+ CHECKED_WRITE(CHUNK_CD_EVT, 0x40, buff);\r
\r
if (Pico_mcd->s68k_regs[3] & 4) // convert back\r
wram_2M_to_1M(Pico_mcd->word_ram2M);\r
CHECKED_WRITE_BUFF(CHUNK_32XPAL, Pico32xMem->pal);\r
\r
memset(buff, 0, 0x40);\r
- memcpy(buff, event_times, sizeof(event_times));\r
+ memcpy(buff, p32x_event_times, sizeof(p32x_event_times));\r
CHECKED_WRITE(CHUNK_32X_EVT, 0x40, buff);\r
}\r
#endif\r
R_ERROR_RETURN("bad header");\r
CHECKED_READ(4, &ver);\r
\r
+ memset(pcd_event_times, 0, sizeof(pcd_event_times));\r
+ memset(p32x_event_times, 0, sizeof(p32x_event_times));\r
+\r
while (!areaEof(file))\r
{\r
CHECKED_READ(1, &chunk);\r
case CHUNK_RC: CHECKED_READ_BUFF(Pico_mcd->rot_comp); break;\r
case CHUNK_MISC_CD: CHECKED_READ_BUFF(Pico_mcd->m); break;\r
\r
+ case CHUNK_CD_EVT:\r
+ CHECKED_READ_BUFF(buff);\r
+ memcpy(pcd_event_times, buff, sizeof(pcd_event_times));\r
+ break;\r
+\r
// 32x stuff\r
#ifndef NO_32X\r
case CHUNK_MSH2:\r
\r
case CHUNK_32X_EVT:\r
CHECKED_READ_BUFF(buff);\r
- memcpy(event_times, buff, sizeof(event_times));\r
+ memcpy(p32x_event_times, buff, sizeof(p32x_event_times));\r
break;\r
#endif\r
default:\r
if (PicoAHW & PAHW_SMS)\r
PicoStateLoadedMS();\r
\r
- if (PicoAHW & PAHW_MCD)\r
- {\r
- PicoMemStateLoaded();\r
-\r
- if (!(Pico_mcd->s68k_regs[0x36] & 1) && (Pico_mcd->scd.Status_CDC & 1))\r
- cdda_start_play();\r
- }\r
-\r
if (PicoAHW & PAHW_32X)\r
Pico32xStateLoaded(1);\r
\r
z80_unpack(buff_z80);\r
\r
// due to dep from 68k cycles..\r
+ SekCycleAim = SekCycleCnt;\r
if (PicoAHW & PAHW_32X)\r
Pico32xStateLoaded(0);\r
+ if (PicoAHW & PAHW_MCD)\r
+ {\r
+ SekCycleAimS68k = SekCycleCntS68k;\r
+ pcd_state_loaded();\r
+\r
+ if (!(Pico_mcd->s68k_regs[0x36] & 1) && (Pico_mcd->scd.Status_CDC & 1))\r
+ cdda_start_play();\r
+ }\r
\r
return 0;\r
}\r
SekCyclesDone(), SekPc);\r
\r
Pico.m.dma_xfers += len;\r
- if ((PicoAHW & PAHW_MCD) && (PicoOpt & POPT_EN_MCD_PSYNC)) SekCyclesBurn(CheckDMA());\r
- else SekEndTimeslice(SekCyclesLeftNoMCD - CheckDMA());\r
+ SekCyclesBurnRun(CheckDMA());\r
\r
if ((source&0xe00000)==0xe00000) { // Ram\r
pd=(u16 *)(Pico.ram+(source&0xfffe));\r
pvid->lwrite_cnt++;\r
if (pvid->lwrite_cnt >= 4) pvid->status|=0x100; // FIFO full\r
if (pvid->lwrite_cnt > 4) {\r
- SekCyclesBurn(32); // penalty // 488/12-8\r
- if (SekCycleCnt>=SekCycleAim) SekEndRun(0);\r
+ SekCyclesBurnRun(32); // penalty // 488/12-8\r
}\r
elprintf(EL_ASVDP, "VDP data write: %04x [%06x] {%i} #%i @ %06x", d, Pico.video.addr,\r
Pico.video.type, pvid->lwrite_cnt, SekPc);\r
update_irq:\r
#ifndef EMU_CORE_DEBUG\r
// update IRQ level\r
- if (!SekShouldInterrupt) // hack\r
+ if (!SekShouldInterrupt()) // hack\r
{\r
int lines, pints, irq=0;\r
lines = (pvid->reg[1] & 0x20) | (pvid->reg[0] & 0x10);\r
LDFLAGS += -lreadline
endif
endif
+ifeq "$(cpu_cmp)" "1"
+ifdef cpu_cmp_w
+DEFINES += CPU_CMP_W
+else
+DEFINES += CPU_CMP_R
+endif # cpu_cmp_w
+endif
ifeq "$(pprof)" "1"
DEFINES += PPROF
SRCS_COMMON += $(R)platform/linux/pprof.c
endif
ifeq "$(asm_cdpico)" "1"
DEFINES += _ASM_CD_PICO_C
-SRCS_COMMON += $(R)pico/cd/pico_arm.s
+SRCS_COMMON += $(R)pico/cd/mcd_arm.s
endif
ifeq "$(asm_cdmemory)" "1"
DEFINES += _ASM_CD_MEMORY_C
DEFINES += NO_SMS
endif
# CD
-SRCS_COMMON += $(R)pico/cd/pico.c $(R)pico/cd/memory.c $(R)pico/cd/sek.c \
+SRCS_COMMON += $(R)pico/cd/mcd.c $(R)pico/cd/memory.c $(R)pico/cd/sek.c \
$(R)pico/cd/LC89510.c $(R)pico/cd/cd_sys.c $(R)pico/cd/cd_file.c \
$(R)pico/cd/cue.c $(R)pico/cd/gfx_cd.c $(R)pico/cd/misc.c \
$(R)pico/cd/pcm.c $(R)pico/cd/buffering.c
SRCS_COMMON += $(R)platform/libpicofe/linux/host_dasm.c
LDFLAGS += -lbfd -lopcodes -liberty
endif
-ifeq "$(drc_debug_interp)" "1"
-DEFINES += DRC_DEBUG_INTERP
-use_sh2mame = 1
-endif
endif # use_sh2drc
-#
-ifeq "$(use_sh2mame)" "1"
SRCS_COMMON += $(R)cpu/sh2/mame/sh2pico.c
-endif
endif # !no_32x
OBJS_COMMON := $(SRCS_COMMON:.c=.o)
@echo "Cyclone submodule is missing, please run 'git submodule update --init'"
@false
-$(FR)cpu/cyclone/Cyclone.s:
+$(FR)cpu/cyclone/Cyclone.s: $(FR)cpu/cyclone_config.h
@echo building Cyclone...
- @make -C $(R)cpu/cyclone/ CONFIG_FILE='\"../cyclone_config.h\"'
+ @make -C $(R)cpu/cyclone/ CONFIG_FILE=../cyclone_config.h
+
+$(FR)cpu/cyclone/Cyclone.s: $(FR)cpu/cyclone/*.cpp $(FR)cpu/cyclone/*.h
$(FR)cpu/musashi/m68kops.c:
@make -C $(R)cpu/musashi
return 0;
return 1;
- case MA_OPT2_GAMMA:
- if (strcasecmp(var, "Gamma correction") != 0) return 0;
- currentConfig.gamma = (int) (atof(val) * 100.0);
- return 1;
-
case MA_CDOPT_READAHEAD:
if (strcasecmp(var, "ReadAhead buffer") != 0) return 0;
PicoCDBuffers = atoi(val) / 2;
int g_screen_width = 320;\r
int g_screen_height = 240;\r
\r
-char *PicoConfigFile = "config.cfg";\r
+const char *PicoConfigFile = "config2.cfg";\r
currentConfig_t currentConfig, defaultConfig;\r
int state_slot = 0;\r
int config_slot = 0, config_slot_current = 0;\r
break;\r
}\r
\r
+ // make quirks visible in UI\r
+ if (PicoQuirks & PQUIRK_FORCE_6BTN)\r
+ currentConfig.input_dev0 = PICO_INPUT_PAD_6BTN;\r
+\r
menu_romload_end();\r
menu_romload_started = 0;\r
\r
// additional movie stuff\r
if (movie_data)\r
{\r
- if (movie_data[0x14] == '6')\r
- PicoOpt |= POPT_6BTN_PAD; // 6 button pad\r
- else PicoOpt &= ~POPT_6BTN_PAD;\r
+ enum input_device indev = (movie_data[0x14] == '6') ?\r
+ PICO_INPUT_PAD_6BTN : PICO_INPUT_PAD_3BTN;\r
+ PicoSetInputDevice(0, indev);\r
+ PicoSetInputDevice(1, indev);\r
+\r
PicoOpt |= POPT_DIS_VDP_FIFO; // no VDP fifo timing\r
if (movie_data[0xF] >= 'A') {\r
if (movie_data[0x16] & 0x80) {\r
if (currentConfig.EmuOpt & EOPT_EN_SRAM)\r
emu_save_load_game(1, 1);\r
\r
+ // state autoload?\r
+ if (g_autostateld_opt) {\r
+ int time, newest = 0, newest_slot = -1;\r
+ int slot;\r
+\r
+ for (slot = 0; slot < 10; slot++) {\r
+ if (emu_check_save_file(slot, &time)) {\r
+ if (time > newest) {\r
+ newest = time;\r
+ newest_slot = slot;\r
+ }\r
+ }\r
+ }\r
+\r
+ if (newest_slot >= 0) {\r
+ lprintf("autoload slot %d\n", newest_slot);\r
+ state_slot = newest_slot;\r
+ emu_save_load_game(1, 0);\r
+ }\r
+ else {\r
+ lprintf("no save to autoload.\n");\r
+ }\r
+ }\r
+\r
retval = 1;\r
out:\r
if (menu_romload_started)\r
void emu_prep_defconfig(void)\r
{\r
memset(&defaultConfig, 0, sizeof(defaultConfig));\r
- defaultConfig.EmuOpt = 0x9d | EOPT_RAM_TIMINGS|EOPT_EN_CD_LEDS;\r
+ defaultConfig.EmuOpt = 0x9d | EOPT_EN_CD_LEDS;\r
defaultConfig.s_PicoOpt = POPT_EN_STEREO|POPT_EN_FM|POPT_EN_PSG|POPT_EN_Z80 |\r
POPT_EN_MCD_PCM|POPT_EN_MCD_CDDA|POPT_EN_MCD_GFX |\r
POPT_EN_SVP_DRC|POPT_ACC_SPRITES |\r
defaultConfig.s_PicoCDBuffers = 0;\r
defaultConfig.confirm_save = EOPT_CONFIRM_SAVE;\r
defaultConfig.Frameskip = -1; // auto\r
+ defaultConfig.input_dev0 = PICO_INPUT_PAD_3BTN;\r
+ defaultConfig.input_dev1 = PICO_INPUT_PAD_3BTN;\r
defaultConfig.volume = 50;\r
defaultConfig.gamma = 100;\r
defaultConfig.scaling = 0;\r
}\r
}\r
\r
-static int try_ropen_file(const char *fname)\r
+static int try_ropen_file(const char *fname, int *time)\r
{\r
+ struct stat st;\r
FILE *f;\r
\r
f = fopen(fname, "rb");\r
if (f) {\r
+ if (time != NULL) {\r
+ *time = 0;\r
+ if (fstat(fileno(f), &st) == 0)\r
+ *time = (int)st.st_mtime;\r
+ }\r
fclose(f);\r
return 1;\r
}\r
return 0;\r
}\r
\r
-char *emu_get_save_fname(int load, int is_sram, int slot)\r
+char *emu_get_save_fname(int load, int is_sram, int slot, int *time)\r
{\r
char *saveFname = static_buff;\r
char ext[16];\r
if (!load)\r
return saveFname;\r
\r
- if (try_ropen_file(saveFname))\r
+ if (try_ropen_file(saveFname, time))\r
return saveFname;\r
\r
romfname_ext(saveFname, sizeof(static_buff), NULL, ext);\r
- if (try_ropen_file(saveFname))\r
+ if (try_ropen_file(saveFname, time))\r
return saveFname;\r
}\r
else\r
}\r
else {\r
romfname_ext(saveFname, sizeof(static_buff), "mds" PATH_SEP, ext);\r
- if (try_ropen_file(saveFname))\r
+ if (try_ropen_file(saveFname, time))\r
return saveFname;\r
\r
romfname_ext(saveFname, sizeof(static_buff), NULL, ext);\r
- if (try_ropen_file(saveFname))\r
+ if (try_ropen_file(saveFname, time))\r
return saveFname;\r
\r
// try the other ext\r
strcat(ext, ext_othr);\r
\r
romfname_ext(saveFname, sizeof(static_buff), "mds"PATH_SEP, ext);\r
- if (try_ropen_file(saveFname))\r
+ if (try_ropen_file(saveFname, time))\r
return saveFname;\r
}\r
}\r
\r
int emu_check_save_file(int slot, int *time)\r
{\r
- return emu_get_save_fname(1, 0, slot) ? 1 : 0;\r
+ return emu_get_save_fname(1, 0, slot, time) ? 1 : 0;\r
}\r
\r
int emu_save_load_game(int load, int sram)\r
char *saveFname;\r
\r
// make save filename\r
- saveFname = emu_get_save_fname(load, sram, state_slot);\r
+ saveFname = emu_get_save_fname(load, sram, state_slot, NULL);\r
if (saveFname == NULL) {\r
if (!sram)\r
emu_status_msg(load ? "LOAD FAILED (missing file)" : "SAVE FAILED");\r
filter_old = currentConfig.filter;\r
}\r
\r
+printf("-- gamma %d\n", currentConfig.gamma);\r
plat_target_gamma_set(currentConfig.gamma, 0);\r
\r
pemu_loop_prep();\r
}\r
\r
-static void skip_frame(int do_audio)\r
-{\r
- PicoSkipFrame = do_audio ? 1 : 2;\r
- PicoFrame();\r
- PicoSkipFrame = 0;\r
-}\r
-\r
/* our tick here is 1 us right now */\r
#define ms_to_ticks(x) (unsigned int)(x * 1000)\r
#define get_ticks() plat_get_ticks_us()\r
\r
void emu_loop(void)\r
{\r
- int pframes_done; /* "period" frames, used for sync */\r
int frames_done, frames_shown; /* actual frames for fps counter */\r
- int target_fps, target_frametime;\r
- unsigned int timestamp_base = 0, timestamp_fps;\r
+ int target_frametime_x3;\r
+ unsigned int timestamp_x3 = 0;\r
+ unsigned int timestamp_aim_x3 = 0;\r
+ unsigned int timestamp_fps_x3 = 0;\r
char *notice_msg = NULL;\r
char fpsbuff[24];\r
- int i;\r
+ int fskip_cnt = 0;\r
\r
fpsbuff[0] = 0;\r
\r
pemu_sound_start();\r
\r
/* number of ticks per frame */\r
- if (Pico.m.pal) {\r
- target_fps = 50;\r
- target_frametime = ms_to_ticks(1000) / 50;\r
- } else {\r
- target_fps = 60;\r
- target_frametime = ms_to_ticks(1000) / 60 + 1;\r
- }\r
+ if (Pico.m.pal)\r
+ target_frametime_x3 = 3 * ms_to_ticks(1000) / 50;\r
+ else\r
+ target_frametime_x3 = 3 * ms_to_ticks(1000) / 60;\r
\r
- timestamp_fps = get_ticks();\r
reset_timing = 1;\r
-\r
- frames_done = frames_shown = pframes_done = 0;\r
-\r
- plat_video_wait_vsync();\r
+ frames_done = frames_shown = 0;\r
\r
/* loop with resync every 1 sec. */\r
while (engineState == PGS_Running)\r
{\r
- unsigned int timestamp;\r
- int diff, diff_lim;\r
+ int skip = 0;\r
+ int diff;\r
\r
pprof_start(main);\r
\r
- timestamp = get_ticks();\r
if (reset_timing) {\r
reset_timing = 0;\r
- timestamp_base = timestamp;\r
- pframes_done = 0;\r
+ plat_video_wait_vsync();\r
+ timestamp_aim_x3 = get_ticks() * 3;\r
+ timestamp_fps_x3 = timestamp_aim_x3;\r
+ fskip_cnt = 0;\r
}\r
+ else if (currentConfig.EmuOpt & EOPT_NO_FRMLIMIT) {\r
+ timestamp_aim_x3 = get_ticks() * 3;\r
+ }\r
+\r
+ timestamp_x3 = get_ticks() * 3;\r
\r
// show notice_msg message?\r
if (notice_msg_time != 0)\r
{\r
static int noticeMsgSum;\r
- if (timestamp - ms_to_ticks(notice_msg_time) > ms_to_ticks(STATUS_MSG_TIMEOUT)) {\r
+ if (timestamp_x3 - ms_to_ticks(notice_msg_time) * 3\r
+ > ms_to_ticks(STATUS_MSG_TIMEOUT) * 3)\r
+ {\r
notice_msg_time = 0;\r
plat_status_msg_clear();\r
notice_msg = NULL;\r
- } else {\r
+ }\r
+ else {\r
int sum = noticeMsg[0] + noticeMsg[1] + noticeMsg[2];\r
if (sum != noticeMsgSum) {\r
plat_status_msg_clear();\r
}\r
\r
// second changed?\r
- if (timestamp - timestamp_fps >= ms_to_ticks(1000))\r
+ if (timestamp_x3 - timestamp_fps_x3 >= ms_to_ticks(1000) * 3)\r
{\r
#ifdef BENCHMARK\r
static int bench = 0, bench_fps = 0, bench_fps_s = 0, bfp = 0, bf[4];\r
sprintf(fpsbuff, "%02i/%02i/%02i", frames_shown, bench_fps_s, (bf[0]+bf[1]+bf[2]+bf[3])>>2);\r
printf("%s\n", fpsbuff);\r
#else\r
- if (currentConfig.EmuOpt & EOPT_SHOW_FPS) {\r
- sprintf(fpsbuff, "%02i/%02i", frames_shown, frames_done);\r
- if (fpsbuff[5] == 0) { fpsbuff[5] = fpsbuff[6] = ' '; fpsbuff[7] = 0; }\r
- }\r
+ if (currentConfig.EmuOpt & EOPT_SHOW_FPS)\r
+ sprintf(fpsbuff, "%02i/%02i ", frames_shown, frames_done);\r
#endif\r
frames_shown = frames_done = 0;\r
- timestamp_fps += ms_to_ticks(1000);\r
+ timestamp_fps_x3 += ms_to_ticks(1000) * 3;\r
}\r
#ifdef PFRAMES\r
sprintf(fpsbuff, "%i", Pico.m.frame_count);\r
#endif\r
\r
- if (timestamp - timestamp_base >= ms_to_ticks(1000))\r
- {\r
- if ((currentConfig.EmuOpt & EOPT_NO_FRMLIMIT) && currentConfig.Frameskip >= 0)\r
- pframes_done = 0;\r
- else\r
- pframes_done -= target_fps;\r
- if (pframes_done < -2) {\r
- /* don't drag more than 2 frames behind */\r
- pframes_done = -2;\r
- timestamp_base = timestamp - 2 * target_frametime;\r
- }\r
- else\r
- timestamp_base += ms_to_ticks(1000);\r
- }\r
+ diff = timestamp_aim_x3 - timestamp_x3;\r
\r
- diff = timestamp - timestamp_base;\r
- diff_lim = (pframes_done + 1) * target_frametime;\r
-\r
- if (currentConfig.Frameskip >= 0) // frameskip enabled\r
+ if (currentConfig.Frameskip >= 0) // frameskip enabled (or 0)\r
{\r
- for (i = 0; i < currentConfig.Frameskip; i++) {\r
- emu_update_input();\r
- skip_frame(1);\r
- pframes_done++; frames_done++;\r
- diff_lim += target_frametime;\r
-\r
- if (!(currentConfig.EmuOpt & (EOPT_NO_FRMLIMIT|EOPT_EXT_FRMLIMIT))) {\r
- timestamp = get_ticks();\r
- diff = timestamp - timestamp_base;\r
- if (!reset_timing && diff < diff_lim) // we are too fast\r
- plat_wait_till_us(timestamp_base + diff_lim);\r
- }\r
+ if (fskip_cnt < currentConfig.Frameskip) {\r
+ fskip_cnt++;\r
+ skip = 1;\r
+ }\r
+ else {\r
+ fskip_cnt = 0;\r
}\r
}\r
- else if (diff > diff_lim)\r
+ else if (diff < -target_frametime_x3)\r
{\r
/* no time left for this frame - skip */\r
/* limit auto frameskip to 8 */\r
- if (frames_done / 8 <= frames_shown) {\r
- emu_update_input();\r
- skip_frame(diff < diff_lim + target_frametime * 16);\r
- pframes_done++; frames_done++;\r
- continue;\r
- }\r
+ if (frames_done / 8 <= frames_shown)\r
+ skip = 1;\r
+ }\r
+\r
+ // don't go in debt too much\r
+ while (diff < -target_frametime_x3 * 3) {\r
+ timestamp_aim_x3 += target_frametime_x3;\r
+ diff = timestamp_aim_x3 - timestamp_x3;\r
}\r
\r
emu_update_input();\r
- PicoFrame();\r
- pemu_finalize_frame(fpsbuff, notice_msg);\r
+ if (skip) {\r
+ int do_audio = diff > -target_frametime_x3 * 2;\r
+ PicoSkipFrame = do_audio ? 1 : 2;\r
+ PicoFrame();\r
+ PicoSkipFrame = 0;\r
+ }\r
+ else {\r
+ PicoFrame();\r
+ pemu_finalize_frame(fpsbuff, notice_msg);\r
+ frames_shown++;\r
+ }\r
+ frames_done++;\r
+ timestamp_aim_x3 += target_frametime_x3;\r
\r
- if (!flip_after_sync)\r
+ if (!skip && !flip_after_sync)\r
plat_video_flip();\r
\r
/* frame limiter */\r
- if (!reset_timing && !(currentConfig.EmuOpt & (EOPT_NO_FRMLIMIT|EOPT_EXT_FRMLIMIT)))\r
+ if (!skip && !reset_timing\r
+ && !(currentConfig.EmuOpt & (EOPT_NO_FRMLIMIT|EOPT_EXT_FRMLIMIT)))\r
{\r
- timestamp = get_ticks();\r
- diff = timestamp - timestamp_base;\r
+ unsigned int timestamp = get_ticks();\r
+ diff = timestamp_aim_x3 - timestamp * 3;\r
\r
// sleep or vsync if we are still too fast\r
- if (diff < diff_lim)\r
- {\r
+ if (diff > target_frametime_x3 && (currentConfig.EmuOpt & EOPT_VSYNC)) {\r
// we are too fast\r
- plat_wait_till_us(timestamp_base + diff_lim - target_frametime / 4);\r
- if (currentConfig.EmuOpt & EOPT_VSYNC)\r
- plat_video_wait_vsync();\r
+ plat_video_wait_vsync();\r
+ timestamp = get_ticks();\r
+ diff = timestamp * 3 - timestamp_aim_x3;\r
+ }\r
+ if (diff > target_frametime_x3) {\r
+ // still too fast\r
+ plat_wait_till_us(timestamp + (diff - target_frametime_x3) / 3);\r
}\r
}\r
\r
- if (flip_after_sync)\r
+ if (!skip && flip_after_sync)\r
plat_video_flip();\r
\r
- pframes_done++; frames_done++; frames_shown++;\r
-\r
pprof_end(main);\r
}\r
\r
#define EOPT_SHOW_FPS (1<<1)
#define EOPT_EN_SOUND (1<<2)
#define EOPT_GZIP_SAVES (1<<3)
-#define EOPT_MMUHACK (1<<4)
#define EOPT_NO_AUTOSVCFG (1<<5)
#define EOPT_16BPP (1<<7) // depreceted for .renderer
-#define EOPT_RAM_TIMINGS (1<<8)
#define EOPT_EN_CD_LEDS (1<<10)
#define EOPT_A_SN_GAMMA (1<<12)
#define EOPT_VSYNC (1<<13)
int s_PicoAutoRgnOrder;
int s_PicoCDBuffers;
int Frameskip;
+ int input_dev0;
+ int input_dev1;
int confirm_save;
int CPUclock;
int volume;
} currentConfig_t;
extern currentConfig_t currentConfig, defaultConfig;
-extern char *PicoConfigFile;
+extern const char *PicoConfigFile;
extern int state_slot;
extern int config_slot, config_slot_current;
extern unsigned char *movie_data;
int emu_read_config(const char *rom_fname, int no_defaults);
int emu_write_config(int game);
-char *emu_get_save_fname(int load, int is_sram, int slot);
+char *emu_get_save_fname(int load, int is_sram, int slot, int *time);
int emu_check_save_file(int slot, int *time);
void emu_text_out8 (int x, int y, const char *text);
#include <cpu/debug.h>\r
\r
\r
-extern char *PicoConfigFile;\r
static int load_state_slot = -1;\r
char **g_argv;\r
\r
*/
#include <stdio.h>
#include <string.h>
+#include <time.h>
#include "emu.h"
#include "menu_pico.h"
#else
#define MENU_OPTIONS_GFX
#define MENU_OPTIONS_ADV
-#define menu_main_plat_draw NULL
#endif
static void make_bg(int no_scale)
const char *fname;
void *tmp_state;
- fname = emu_get_save_fname(1, 0, slot);
+ fname = emu_get_save_fname(1, 0, slot, NULL);
if (!fname)
return;
static int mh_saveloadcfg(int id, int keys);
static const char *mgn_saveloadcfg(int id, int *offs);
+const char *indev_names[] = { "none", "3 button pad", "6 button pad", NULL };
+
static menu_entry e_menu_keyconfig[] =
{
mee_handler_id("Player 1", MA_CTRL_PLAYER1, key_config_loop_wrap),
mee_handler_id("Player 2", MA_CTRL_PLAYER2, key_config_loop_wrap),
mee_handler_id("Emulator controls", MA_CTRL_EMU, key_config_loop_wrap),
- mee_onoff ("6 button pad", MA_OPT_6BUTTON_PAD, PicoOpt, POPT_6BTN_PAD),
+ mee_enum ("Input device 1", MA_OPT_INPUT_DEV0, currentConfig.input_dev0, indev_names),
+ mee_enum ("Input device 2", MA_OPT_INPUT_DEV1, currentConfig.input_dev1, indev_names),
mee_range ("Turbo rate", MA_CTRL_TURBO_RATE, currentConfig.turbo_rate, 1, 30),
mee_range ("Analog deadzone", MA_CTRL_DEADZONE, currentConfig.analog_deadzone, 1, 99),
mee_cust_nosave("Save global config", MA_OPT_SAVECFG, mh_saveloadcfg, mgn_saveloadcfg),
me_enable(e_menu_keyconfig, MA_OPT_SAVECFG_GAME, PicoGameLoaded);
me_loop(e_menu_keyconfig, &sel);
+
+ PicoSetInputDevice(0, currentConfig.input_dev0);
+ PicoSetInputDevice(1, currentConfig.input_dev1);
+
return 0;
}
mee_onoff ("Don't save last used ROM", MA_OPT2_NO_LAST_ROM, currentConfig.EmuOpt, EOPT_NO_AUTOSVCFG),
mee_onoff ("Disable idle loop patching",MA_OPT2_NO_IDLE_LOOPS,PicoOpt, POPT_DIS_IDLE_DET),
mee_onoff ("Disable frame limiter", MA_OPT2_NO_FRAME_LIMIT,currentConfig.EmuOpt, EOPT_NO_FRMLIMIT),
+ mee_onoff ("Enable dynarecs", MA_OPT2_SVP_DYNAREC, PicoOpt, POPT_EN_SVP_DRC),
+ mee_onoff ("Status line in main menu", MA_OPT2_STATUS_LINE, currentConfig.EmuOpt, EOPT_SHOW_RTC),
MENU_OPTIONS_ADV
mee_end,
};
// ------------ gfx options menu ------------
-static const char h_gamma[] = "Gamma/brightness adjustment (default 100)";
+static const char h_gamma[] = "Gamma/brightness adjustment (default 1.00)";
+
+static const char *mgn_aopt_gamma(int id, int *offs)
+{
+ sprintf(static_buff, "%i.%02i", currentConfig.gamma / 100, currentConfig.gamma % 100);
+ return static_buff;
+}
static menu_entry e_menu_gfx_options[] =
{
mee_enum ("Video output mode", MA_OPT_VOUT_MODE, plat_target.vout_method, men_dummy),
mee_enum ("Renderer", MA_OPT_RENDERER, currentConfig.renderer, renderer_names),
mee_enum ("Filter", MA_OPT3_FILTERING, currentConfig.filter, men_dummy),
- mee_range_h("Gamma adjustment", MA_OPT3_GAMMA, currentConfig.gamma, 1, 200, h_gamma),
+ mee_range_cust_h("Gamma correction", MA_OPT2_GAMMA, currentConfig.gamma, 1, 300, mgn_aopt_gamma, h_gamma),
MENU_OPTIONS_GFX
mee_end,
};
static int menu_loop_options(int id, int keys)
{
static int sel = 0;
- int i;
- i = me_id2offset(e_menu_options, MA_OPT_CPU_CLOCKS);
- e_menu_options[i].enabled = e_menu_options[i].name[0] ? 1 : 0;
me_enable(e_menu_options, MA_OPT_SAVECFG_GAME, PicoGameLoaded);
me_enable(e_menu_options, MA_OPT_LOADCFG, config_slot != config_slot_current);
// ------------ main menu ------------
static const char credits[] =
- "PicoDrive v" VERSION " (c) notaz, 2006-2011\n\n\n"
+ "PicoDrive v" VERSION " (c) notaz, 2006-2013\n\n\n"
"Credits:\n"
"fDave: Cyclone 68000 core,\n"
" base code of PicoDrive\n"
"MAME devs: YM2612 and SN76496 cores\n"
"Inder, ketchupgun: graphics\n"
#ifdef __GP2X__
- "rlyeh and others: minimal SDK\n"
"Squidge: mmuhack\n"
"Dzz: ARM940 sample\n"
#endif
" Charles MacDonald, Haze,\n"
" Stephane Dallongeville,\n"
" Lordus, Exophase, Rokas,\n"
- " Nemesis, Tasco Deluxe";
+ " Eke, Nemesis, Tasco Deluxe";
+
+static void menu_main_draw_status(void)
+{
+ static time_t last_bat_read = 0;
+ static int last_bat_val = -1;
+ unsigned short *bp = g_screen_ptr;
+ int bat_h = me_mfont_h * 2 / 3;
+ int i, u, w, wfill, batt_val;
+ struct tm *tmp;
+ time_t ltime;
+ char time_s[16];
+
+ if (!(currentConfig.EmuOpt & EOPT_SHOW_RTC))
+ return;
+
+ ltime = time(NULL);
+ tmp = gmtime(<ime);
+ strftime(time_s, sizeof(time_s), "%H:%M", tmp);
+
+ text_out16(g_screen_width - me_mfont_w * 6, me_mfont_h + 2, time_s);
+
+ if (ltime - last_bat_read > 10) {
+ last_bat_read = ltime;
+ last_bat_val = batt_val = plat_target_bat_capacity_get();
+ }
+ else
+ batt_val = last_bat_val;
+
+ if (batt_val < 0 || batt_val > 100)
+ return;
+
+ /* battery info */
+ bp += (me_mfont_h * 2 + 2) * g_screen_width + g_screen_width - me_mfont_w * 3 - 3;
+ for (i = 0; i < me_mfont_w * 2; i++)
+ bp[i] = menu_text_color;
+ for (i = 0; i < me_mfont_w * 2; i++)
+ bp[i + g_screen_width * bat_h] = menu_text_color;
+ for (i = 0; i <= bat_h; i++)
+ bp[i * g_screen_width] =
+ bp[i * g_screen_width + me_mfont_w * 2] = menu_text_color;
+ for (i = 2; i < bat_h - 1; i++)
+ bp[i * g_screen_width - 1] =
+ bp[i * g_screen_width - 2] = menu_text_color;
+
+ w = me_mfont_w * 2 - 1;
+ wfill = batt_val * w / 100;
+ for (u = 1; u < bat_h; u++)
+ for (i = 0; i < wfill; i++)
+ bp[(w - i) + g_screen_width * u] = menu_text_color;
+}
static int main_menu_handler(int id, int keys)
{
menu_enter(PicoGameLoaded);
in_set_config_int(0, IN_CFG_BLOCKING, 1);
- me_loop_d(e_menu_main, &sel, NULL, menu_main_plat_draw);
+ me_loop_d(e_menu_main, &sel, NULL, menu_main_draw_status);
if (PicoGameLoaded) {
if (engineState == PGS_Menu)
static menu_entry e_menu_hidden[] =
{
mee_onoff("Accurate sprites", MA_OPT_ACC_SPRITES, PicoOpt, 0x080),
+ mee_onoff("autoload savestates", MA_OPT_AUTOLOAD_SAVE, g_autostateld_opt, 1),
mee_end,
};
menu_init_base();
+ i = 0;
+#if defined(_SVP_DRC) || defined(DRC_SH2)
+ i = 1;
+#endif
+ me_enable(e_menu_adv_options, MA_OPT2_SVP_DYNAREC, i);
+
i = me_id2offset(e_menu_gfx_options, MA_OPT_VOUT_MODE);
e_menu_gfx_options[i].data = plat_target.vout_methods;
me_enable(e_menu_gfx_options, MA_OPT_VOUT_MODE,
me_enable(e_menu_gfx_options, MA_OPT3_FILTERING,
plat_target.hwfilters != NULL);
- me_enable(e_menu_gfx_options, MA_OPT3_GAMMA,
+ me_enable(e_menu_gfx_options, MA_OPT2_GAMMA,
plat_target.gamma_set != NULL);
+
+ i = me_id2offset(e_menu_options, MA_OPT_CPU_CLOCKS);
+ e_menu_options[i].enabled = 0;
+ if (plat_target.cpu_clock_set != NULL) {
+ e_menu_options[i].name = "CPU clock";
+ e_menu_options[i].enabled = 1;
+ }
}
MA_OPT_ENABLE_SOUND,
MA_OPT_SOUND_QUALITY,
MA_OPT_ARM940_SOUND,
- MA_OPT_6BUTTON_PAD,
+ MA_OPT_INPUT_DEV0,
+ MA_OPT_INPUT_DEV1,
MA_OPT_REGION,
MA_OPT_SRAM_STATES,
MA_OPT_CONFIRM_STATES,
MA_OPT_ROTATION, /* uiq */
MA_OPT_TEARING_FIX, /* wiz */
MA_OPT_VOUT_MODE,
+ MA_OPT_AUTOLOAD_SAVE,
MA_OPT2_GAMMA,
MA_OPT2_A_SN_GAMMA,
MA_OPT2_DBLBUFF, /* giz */
MA_OPT2_GZIP_STATES,
MA_OPT2_NO_LAST_ROM,
MA_OPT2_RAMTIMINGS, /* gp2x */
- MA_OPT2_SQUIDGEHACK, /* gp2x */
MA_OPT2_STATUS_LINE, /* psp */
MA_OPT2_NO_FRAME_LIMIT, /* psp */
MA_OPT2_SVP_DYNAREC,
MA_OPT3_PRES_FULLSCR,
MA_OPT3_FILTERING,
MA_OPT3_VSYNC,
- MA_OPT3_GAMMA,
MA_OPT3_BLACKLVL,
MA_OPT3_LAYER_X,
MA_OPT3_LAYER_Y,
return retval;
}
-void mp3_start_play(void *f_, int pos)
+void mp3_start_play(void *f_, int pos1024)
{
unsigned char buf[2048];
FILE *f = f_;
if (!(PicoOpt & POPT_EN_MCD_CDDA) || f == NULL) // cdda disabled or no file?
return;
- ret = mp3dec_start();
- if (ret != 0)
- return;
-
- decoder_active = 1;
-
- mp3_current_file = f;
fseek(f, 0, SEEK_END);
mp3_file_len = ftell(f);
}
// seek..
- if (pos) {
+ if (pos1024 != 0) {
unsigned long long pos64 = mp3_file_len - mp3_file_pos;
- pos64 *= pos;
+ pos64 *= pos1024;
mp3_file_pos += pos64 >> 10;
}
+ ret = mp3dec_start(f, mp3_file_pos);
+ if (ret != 0) {
+ return;
+ }
+
+ mp3_current_file = f;
+ decoder_active = 1;
+
mp3dec_decode(mp3_current_file, &mp3_file_pos, mp3_file_len);
}
} else {
int ret, left = 1152 - cdda_out_pos;
- mix_samples(buffer, cdda_out_buffer + cdda_out_pos * 2,
- (left >> shr) * 2);
+ if (left > 0)
+ mix_samples(buffer, cdda_out_buffer + cdda_out_pos * 2,
+ (left >> shr) * 2);
ret = mp3dec_decode(mp3_current_file, &mp3_file_pos,
mp3_file_len);
int mp3_find_sync_word(const unsigned char *buf, int size);
/* decoder */
-int mp3dec_start(void);
+int mp3dec_start(FILE *f, int fpos_start);
int mp3dec_decode(FILE *f, int *file_pos, int file_len);
extern unsigned short mpeg1_l3_bitrates[16];
#include <stdio.h>
#include "mp3.h"
-int mp3dec_start(void)
+int mp3dec_start(FILE *f, int fpos_start)
{
return -1;
}
return 0;
}
-int mp3dec_start(void)
+int mp3dec_start(FILE *f, int fpos_start)
{
// must re-init decoder for new track
if (mp3dec)
return 0;
}
-int mp3dec_start(void)
+int mp3dec_start(FILE *f, int fpos_start)
{
void (*avcodec_register_all)(void);
AVCodec *(*avcodec_find_decoder)(enum CodecID id);
#include <fcntl.h>\r
#include <errno.h>\r
\r
-#include "code940/940shared.h"\r
-#include "soc_mmsp2.h"\r
-#include "soc.h"\r
+#include "../libpicofe/input.h"\r
+#include "../libpicofe/gp2x/soc_mmsp2.h"\r
+#include "../libpicofe/gp2x/soc.h"\r
#include "../common/mp3.h"\r
#include "../common/arm_utils.h"\r
-#include "../common/menu.h"\r
+#include "../common/menu_pico.h"\r
#include "../common/emu.h"\r
-#include "../common/input.h"\r
#include "../../pico/pico_int.h"\r
#include "../../pico/sound/ym2612.h"\r
#include "../../pico/sound/mix.h"\r
+#include "code940/940shared.h"\r
+#include "plat.h"\r
+#include "940ctl.h"\r
\r
static unsigned char *shared_mem = 0;\r
static _940_data_t *shared_data = 0;\r
\r
\r
#define CHECK_BUSY(job) \\r
- (gp2x_memregs[0x3b46>>1] & (1<<(job-1)))\r
+ (memregs[0x3b46>>1] & (1<<(job-1)))\r
\r
static void wait_busy_940(int job)\r
{\r
int i;\r
\r
job--;\r
- for (i = 0; (gp2x_memregs[0x3b46>>1] & (1<<job)) && i < 0x10000; i++)\r
+ for (i = 0; (memregs[0x3b46>>1] & (1<<job)) && i < 0x10000; i++)\r
spend_cycles(8*1024); // tested to be best for mp3 dec\r
if (i < 0x10000) return;\r
\r
for (i = 0; i < 8; i++)\r
printf("%i ", shared_ctl->vstarts[i]);\r
printf(")\n");\r
- printf("irq pending flags: DUALCPU %04x, SRCPND %08lx (see 26), INTPND %08lx\n",\r
- gp2x_memregs[0x3b46>>1], gp2x_memregl[0x4500>>2], gp2x_memregl[0x4510>>2]);\r
+ printf("irq pending flags: DUALCPU %04x, SRCPND %08x (see 26), INTPND %08x\n",\r
+ memregs[0x3b46>>1], memregl[0x4500>>2], memregl[0x4510>>2]);\r
printf("last lr: %08x, lastjob: %i\n", shared_ctl->last_lr, shared_ctl->lastjob);\r
printf("trying to interrupt..\n");\r
- gp2x_memregs[0x3B3E>>1] = 0xffff;\r
- for (i = 0; gp2x_memregs[0x3b46>>1] && i < 0x10000; i++)\r
+ memregs[0x3B3E>>1] = 0xffff;\r
+ for (i = 0; memregs[0x3b46>>1] && i < 0x10000; i++)\r
spend_cycles(8*1024);\r
printf("i = 0x%x\n", i);\r
- printf("irq pending flags: DUALCPU %04x, SRCPND %08lx (see 26), INTPND %08lx\n",\r
- gp2x_memregs[0x3b46>>1], gp2x_memregl[0x4500>>2], gp2x_memregl[0x4510>>2]);\r
+ printf("irq pending flags: DUALCPU %04x, SRCPND %08x (see 26), INTPND %08x\n",\r
+ memregs[0x3b46>>1], memregl[0x4500>>2], memregl[0x4510>>2]);\r
printf("last lr: %08x, lastjob: %i\n", shared_ctl->last_lr, shared_ctl->lastjob);\r
\r
- me_update_msg("940 crashed, too much overclock?");\r
+ menu_update_msg("940 crashed, too much overclock?");\r
engineState = PGS_Menu;\r
crashed_940 = 1;\r
}\r
\r
// generate interrupt for this job\r
job--;\r
- gp2x_memregs[(0x3B20+job*2)>>1] = 1;\r
+ memregs[(0x3B20+job*2)>>1] = 1;\r
\r
-// printf("added %i, pending %04x\n", job+1, gp2x_memregs[0x3b46>>1]);\r
+// printf("added %i, pending %04x\n", job+1, memregs[0x3b46>>1]);\r
}\r
\r
\r
reset940(1, 2);\r
pause940(1);\r
\r
- gp2x_memregs[0x3B40>>1] = 0; // disable DUALCPU interrupts for 920\r
- gp2x_memregs[0x3B42>>1] = 1; // enable DUALCPU interrupts for 940\r
+ memregs[0x3B40>>1] = 0; // disable DUALCPU interrupts for 920\r
+ memregs[0x3B42>>1] = 1; // enable DUALCPU interrupts for 940\r
\r
- gp2x_memregl[0x4504>>2] = 0; // make sure no FIQs will be generated\r
- gp2x_memregl[0x4508>>2] = ~(1<<26); // unmask DUALCPU ints in the undocumented 940's interrupt controller\r
+ memregl[0x4504>>2] = 0; // make sure no FIQs will be generated\r
+ memregl[0x4508>>2] = ~(1<<26); // unmask DUALCPU ints in the undocumented 940's interrupt controller\r
\r
\r
if (crashed_940)\r
text_out16(10, 100, "failed to open required file:");\r
text_out16(10, 110, CODE940_FILE);\r
gp2x_video_flip2();\r
- in_menu_wait(PBTN_MOK|PBTN_MBACK, 100);\r
+ in_menu_wait(PBTN_MOK|PBTN_MBACK, NULL, 100);\r
printf("failed to open %s\n", binpath);\r
exit(1);\r
}\r
\r
internal_reset();\r
\r
- loaded_mp3 = 0;\r
+ loaded_mp3 = NULL;\r
\r
- gp2x_memregs[0x3B46>>1] = 0xffff; // clear pending DUALCPU interrupts for 940\r
- gp2x_memregl[0x4500>>2] = 0xffffffff; // clear pending IRQs in SRCPND\r
- gp2x_memregl[0x4510>>2] = 0xffffffff; // clear pending IRQs in INTPND\r
+ memregs[0x3B46>>1] = 0xffff; // clear pending DUALCPU interrupts for 940\r
+ memregl[0x4500>>2] = 0xffffffff; // clear pending IRQs in SRCPND\r
+ memregl[0x4510>>2] = 0xffffffff; // clear pending IRQs in INTPND\r
\r
/* start the 940 */\r
reset940(0, 2);\r
\r
/***********************************************************/\r
\r
-static int mp3_samples_ready = 0, mp3_buffer_offs = 0;\r
-static int mp3_play_bufsel = 0, mp3_job_started = 0;\r
+// FIXME: double buffering no longer used..\r
\r
-void mp3_update(int *buffer, int length, int stereo)\r
+int mp3dec_decode(FILE *f, int *file_pos, int file_len)\r
{\r
- int length_mp3;\r
-\r
if (!(PicoOpt & POPT_EXT_FM)) {\r
- mp3_update_local(buffer, length, stereo);\r
- return;\r
+ //mp3_update_local(buffer, length, stereo);\r
+ return 0;\r
}\r
\r
// check if playback was started, track not ended\r
- if (loaded_mp3 == NULL || shared_ctl->mp3_offs >= shared_ctl->mp3_len)\r
- return;\r
-\r
- length_mp3 = length;\r
- if (PsndRate == 22050) length_mp3 <<= 1; // mp3s are locked to 44100Hz stereo\r
- else if (PsndRate == 11025) length_mp3 <<= 2; // so make length 44100ish\r
-\r
- /* do we have to wait? */\r
- if (mp3_job_started && mp3_samples_ready < length_mp3) {\r
- if (CHECK_BUSY(JOB940_MP3DECODE)) wait_busy_940(JOB940_MP3DECODE);\r
- mp3_job_started = 0;\r
- mp3_samples_ready += 1152;\r
+ if (loaded_mp3 == NULL || shared_ctl->mp3_offs >= shared_ctl->mp3_len) {\r
+ *file_pos = file_len;\r
+ return 1;\r
}\r
\r
- /* mix mp3 data, only stereo */\r
- if (mp3_samples_ready >= length_mp3)\r
- {\r
- int shr = 0;\r
- void (*mix_samples)(int *dest_buf, short *mp3_buf, int count) = mix_16h_to_32;\r
- if (PsndRate == 22050) { mix_samples = mix_16h_to_32_s1; shr = 1; }\r
- else if (PsndRate == 11025) { mix_samples = mix_16h_to_32_s2; shr = 2; }\r
+ /* do we have to wait? */\r
+ if (CHECK_BUSY(JOB940_MP3DECODE))\r
+ wait_busy_940(JOB940_MP3DECODE);\r
\r
- if (1152 - mp3_buffer_offs >= length_mp3) {\r
- mix_samples(buffer, shared_data->mp3_buffer[mp3_play_bufsel] + mp3_buffer_offs*2, length<<1);\r
+ memcpy(cdda_out_buffer,\r
+ shared_data->mp3_buffer[shared_ctl->mp3_buffsel],\r
+ sizeof(cdda_out_buffer));\r
\r
- mp3_buffer_offs += length_mp3;\r
- } else {\r
- // collect samples from both buffers..\r
- int left = 1152 - mp3_buffer_offs;\r
- if (mp3_play_bufsel == 0)\r
- {\r
- mix_samples(buffer, shared_data->mp3_buffer[0] + mp3_buffer_offs*2, length<<1);\r
- mp3_buffer_offs = length_mp3 - left;\r
- mp3_play_bufsel = 1;\r
- } else {\r
- mix_samples(buffer, shared_data->mp3_buffer[1] + mp3_buffer_offs*2, (left>>shr)<<1);\r
- mp3_buffer_offs = length_mp3 - left;\r
- mix_samples(buffer + ((left>>shr)<<1),\r
- shared_data->mp3_buffer[0], (mp3_buffer_offs>>shr)<<1);\r
- mp3_play_bufsel = 0;\r
- }\r
- }\r
- mp3_samples_ready -= length_mp3;\r
- }\r
+ *file_pos = shared_ctl->mp3_offs;\r
\r
- // ask to decode more if we already can\r
- if (!mp3_job_started)\r
- {\r
- mp3_job_started = 1;\r
- shared_ctl->mp3_buffsel ^= 1;\r
+ if (shared_ctl->mp3_offs < shared_ctl->mp3_len) {\r
+ // ask to decode more\r
+ //shared_ctl->mp3_buffsel ^= 1;\r
add_job_940(JOB940_MP3DECODE);\r
}\r
-}\r
\r
+ return 0;\r
+}\r
\r
-void mp3_start_play(void *f_, int pos) // pos is 0-1023\r
+int mp3dec_start(FILE *f, int fpos_start)\r
{\r
- int byte_offs = 0;\r
- FILE *f = f_;\r
-\r
- if (!(PicoOpt & POPT_EN_MCD_CDDA) || f == NULL)\r
- return;\r
-\r
if (!(PicoOpt & POPT_EXT_FM)) {\r
- mp3_start_play_local(f, pos);\r
- return;\r
+ //mp3_start_play_local(f, pos);\r
+ return -1;\r
}\r
\r
if (loaded_mp3 != f)\r
}\r
fseek(f, 0, SEEK_SET);\r
fread(mp3_mem, 1, MP3_SIZE_MAX, f);\r
- if (!feof(f)) printf("Warning: mp3 was too large, not all data loaded.\n");\r
+ if (!feof(f))\r
+ printf("Warning: mp3 was too large, not all data loaded.\n");\r
shared_ctl->mp3_len = ftell(f);\r
loaded_mp3 = f;\r
\r
- if (PicoOpt & POPT_EXT_FM) {\r
- // as we are going to change 940's cacheable area, we must invalidate it's cache..\r
- if (CHECK_BUSY(JOB940_MP3DECODE)) wait_busy_940(JOB940_MP3DECODE);\r
- add_job_940(JOB940_INVALIDATE_DCACHE);\r
- }\r
+ // as we are going to change 940's cacheable area,\r
+ // we must invalidate it's cache..\r
+ if (CHECK_BUSY(JOB940_MP3DECODE))\r
+ wait_busy_940(JOB940_MP3DECODE);\r
+ add_job_940(JOB940_INVALIDATE_DCACHE);\r
reset_timing = 1;\r
}\r
\r
- // seek..\r
- if (pos) {\r
- byte_offs = (shared_ctl->mp3_len << 6) >> 10;\r
- byte_offs *= pos;\r
- byte_offs >>= 6;\r
- }\r
- printf(" mp3 pos1024: %i, byte_offs %i/%i\n", pos, byte_offs, shared_ctl->mp3_len);\r
+ shared_ctl->mp3_offs = fpos_start;\r
+ shared_ctl->mp3_buffsel = 0;\r
\r
- shared_ctl->mp3_offs = byte_offs;\r
+ add_job_940(JOB940_MP3RESET);\r
+ if (CHECK_BUSY(JOB940_MP3RESET))\r
+ wait_busy_940(JOB940_MP3RESET);\r
\r
- // reset buffer pointers and stuff..\r
- mp3_samples_ready = mp3_buffer_offs = mp3_play_bufsel = 0;\r
- mp3_job_started = 0;\r
- shared_ctl->mp3_buffsel = 1; // will change to 0 on first decode\r
+ // because we decode ahea, need to start now\r
+ if (shared_ctl->mp3_offs < shared_ctl->mp3_len) {\r
+ add_job_940(JOB940_MP3DECODE);\r
+ }\r
\r
- add_job_940(JOB940_MP3RESET);\r
- if (CHECK_BUSY(JOB940_MP3RESET)) wait_busy_940(JOB940_MP3RESET);\r
+ return 0;\r
}\r
\r
-CROSS ?= arm-linux-\r
-\r
-# settings\r
-use_cyclone = 1\r
-#use_musashi = 1\r
-use_drz80 = 1\r
-use_sh2drc = 1\r
-#use_sh2mame = 1\r
-\r
-asm_memory = 1\r
-asm_render = 1\r
-asm_ym2612 = 1\r
-asm_misc = 1\r
-asm_cdpico = 1\r
-asm_cdmemory = 1\r
-asm_32xdraw = 1\r
-#profile = 1\r
-#drc_debug = 3\r
-\r
--include Makefile.local\r
-\r
-ifeq "$(debug_cyclone)" "1"\r
-use_cyclone = 1\r
-use_musashi = 1\r
-endif\r
-ifeq "$(use_musashi)" "1"\r
-# due to CPU stop flag acces\r
-asm_cdpico = 0\r
-asm_cdmemory = 0\r
-endif\r
-\r
-ARCH = arm\r
-DEFINES += ARM __GP2X__ IN_GP2X IN_EVDEV # BENCHMARK\r
-CFLAGS += -Wall -Winline -I../.. -I.\r
-ifeq ($(DEBUG),)\r
-CFLAGS += -O3 -fomit-frame-pointer -fstrict-aliasing -ffast-math\r
-endif\r
-CFLAGS += -mcpu=arm920t -mtune=arm920t\r
-ASFLAGS = -mcpu=arm920t -mfloat-abi=soft\r
-LDFLAGS += -lm -lpng\r
-\r
-CC = $(CROSS)gcc\r
-STRIP = $(CROSS)strip\r
-AS = $(CROSS)as\r
-LD = $(CROSS)ld\r
-OBJCOPY = $(CROSS)objcopy\r
-\r
-# frontend\r
-OBJS += plat.o warm.o pollux_set.o soc.o soc_mmsp2.o soc_pollux.o soc_dummy.o emu.o in_gp2x.o\r
-# 940 core control\r
-OBJS += 940ctl.o\r
-\r
-# ARM stuff\r
-OBJS += pico/carthw/svp/compiler.o pico/carthw/svp/stub_arm.o\r
-OBJS += pico/sound/mix_arm.o\r
-\r
-# common\r
-OBJS += platform/common/emu.o platform/common/menu_pico.o platform/common/fonts.o platform/common/config.o \\r
- platform/common/arm_utils.o platform/common/arm_linux.o platform/common/readpng.o \\r
- platform/common/mp3_helix.o platform/common/input.o platform/common/main.o platform/common/mp3.o \\r
- platform/linux/sndout_oss.o platform/linux/plat.o platform/linux/in_evdev.o\r
-\r
-# unzip\r
-OBJS += unzip/unzip.o unzip/unzip_stream.o\r
-# zlib\r
-OBJS += zlib/gzio.o zlib/inffast.o zlib/inflate.o zlib/inftrees.o zlib/trees.o \\r
- zlib/deflate.o zlib/crc32.o zlib/adler32.o zlib/zutil.o zlib/compress.o\r
-\r
-vpath %.c = ../..\r
-vpath %.s = ../..\r
-vpath %.S = ../..\r
-\r
-DIRS += platform/gp2x platform/linux zlib unzip \r
-\r
-\r
-all: mkdirs PicoDrive\r
-\r
-include ../common/common.mak\r
-include ../common/common_arm.mak\r
-include ../common/revision.mak\r
-\r
-CFLAGS += $(addprefix -D,$(DEFINES))\r
-\r
-# partial linking helps profiled builds due to section merging\r
-PicoDrive.o : $(OBJS) ../common/helix/$(CROSS)helix-mp3.a\r
- $(LD) -r -o $@ $^\r
-\r
-# still using static, dynamic linking slows Wiz 1-10%\r
-# also libm on F100 is not compatible\r
-PicoDrive : PicoDrive.o\r
- @echo ">>>" $@\r
- $(CC) -static -o $@ $(CFLAGS) $^ $(LDFLAGS) -Wl,-Map=$@.map\r
-ifeq ($(DEBUG),)\r
- $(STRIP) $@\r
-endif\r
-\r
-up: PicoDrive\r
- @cp -v PicoDrive /mnt/gp2x/mnt/sd/emus/PicoDrive/\r
-\r
-clean: tidy\r
- $(RM) PicoDrive\r
-tidy:\r
- $(RM) $(OBJS)\r
-\r
readme.txt: ../../tools/textfilter ../base_readme.txt\r
../../tools/textfilter ../base_readme.txt $@ GP2X\r
\r
-# ----------- release -----------\r
VER ?= $(shell head -n 1 version.h | sed 's/.*"\(.*\)\.\(.*\)".*/\1\2/g')\r
CODE940 = code940/pico940_v3.bin\r
\r
\r
$(CODE940):\r
make -C code940/\r
-\r
#include "../../../pico/sound/ym2612.h"\r
-#include "../../common/helix/pub/mp3dec.h"\r
\r
// max 16 jobs, lower num means higher prio\r
enum _940_job_t {\r
typedef struct\r
{\r
YM2612 ym2612; /* current state of the emulated YM2612 */\r
- HMP3Decoder mp3dec; /* mp3 decoder's handle */\r
+ void *mp3dec; /* mp3 decoder's handle */\r
int ym_buffer[44100/50*2]; /* this is where the YM2612 samples will be mixed to */\r
short mp3_buffer[2][1152*2]; /* buffers for mp3 decoder's output */\r
} _940_data_t;\r
#include <stdlib.h>\r
#include <unistd.h>\r
\r
-#include "plat_gp2x.h"\r
-#include "soc.h"\r
-#include "soc_pollux.h"\r
-#include "../common/plat.h"\r
-#include "../common/menu.h"\r
+#include "../libpicofe/gp2x/plat_gp2x.h"\r
+#include "../libpicofe/gp2x/soc.h"\r
+#include "../libpicofe/input.h"\r
+#include "../libpicofe/plat.h"\r
+#include "../libpicofe/gp2x/soc_pollux.h"\r
+#include "../common/menu_pico.h"\r
#include "../common/arm_utils.h"\r
-#include "../common/fonts.h"\r
#include "../common/emu.h"\r
-#include "../common/config.h"\r
-#include "../common/input.h"\r
-#include "../linux/sndout_oss.h"\r
-#include "version.h"\r
+#include "../common/config_file.h"\r
+#include "../common/version.h"\r
+#include "plat.h"\r
\r
#include <pico/pico_int.h>\r
#include <pico/patch.h>\r
#endif\r
\r
\r
-extern int crashed_940;\r
+//extern int crashed_940;\r
\r
-static short __attribute__((aligned(4))) sndBuffer[2*(44100+100)/50];\r
static int osd_fps_x, osd_y, doing_bg_frame;\r
const char *renderer_names[] = { "16bit accurate", " 8bit accurate", " 8bit fast", NULL };\r
const char *renderer_names32x[] = { "accurate", "faster", "fastest", NULL };\r
static int (*emu_scan_begin)(unsigned int num) = NULL;\r
static int (*emu_scan_end)(unsigned int num) = NULL;\r
\r
-extern void *gp2x_screens[4];\r
-\r
\r
void pemu_prep_defconfig(void)\r
{\r
void plat_update_volume(int has_changed, int is_up)\r
{\r
static int prev_frame = 0, wait_frames = 0;\r
- int vol = currentConfig.volume;\r
int need_low_volume = 0;\r
+ int vol = currentConfig.volume;\r
gp2x_soc_t soc;\r
\r
soc = soc_detect();\r
if (need_low_volume && vol < 5 && prev_frame == Pico.m.frame_count - 1 && wait_frames < 12)\r
wait_frames++;\r
else {\r
- if (is_up) {\r
- if (vol < 99) vol++;\r
- } else {\r
- if (vol > 0) vol--;\r
- }\r
wait_frames = 0;\r
- sndout_oss_setvol(vol, vol);\r
- currentConfig.volume = vol;\r
+ plat_target_step_volume(¤tConfig.volume, is_up ? 1 : -1);\r
+ vol = currentConfig.volume;\r
}\r
emu_status_msg("VOL: %02i", vol);\r
prev_frame = Pico.m.frame_count;\r
}\r
}\r
\r
-static void oss_write_nonblocking(int len)\r
+void pemu_sound_start(void)\r
{\r
- // sndout_oss_can_write() is not reliable, only use with no_frmlimit\r
- if ((currentConfig.EmuOpt & EOPT_NO_FRMLIMIT) && !sndout_oss_can_write(len))\r
- return;\r
+ emu_sound_start();\r
\r
- sndout_oss_write_nb(PsndOut, len);\r
-}\r
+ plat_target_step_volume(¤tConfig.volume, 0);\r
\r
-void pemu_sound_start(void)\r
-{\r
+#if 0\r
static int PsndRate_old = 0, PicoOpt_old = 0, pal_old = 0;\r
\r
PsndOut = NULL;\r
PicoOpt_old = PicoOpt;\r
pal_old = Pico.m.pal;\r
}\r
+#endif\r
}\r
\r
static const int sound_rates[] = { 44100, 32000, 22050, 16000, 11025, 8000 };\r
}\r
}\r
\r
-void pemu_sound_wait(void)\r
-{\r
- // don't need to do anything, writes will block by themselves\r
-}\r
-\r
void pemu_forced_frame(int no_scale, int do_emu)\r
{\r
doing_bg_frame = 1;\r
{\r
}\r
\r
-#if 0\r
-static void tga_dump(void)\r
+void plat_video_loop_prepare(void) \r
{\r
-#define BYTE unsigned char\r
-#define WORD unsigned short\r
- struct\r
- {\r
- BYTE IDLength; /* 00h Size of Image ID field */\r
- BYTE ColorMapType; /* 01h Color map type */\r
- BYTE ImageType; /* 02h Image type code */\r
- WORD CMapStart; /* 03h Color map origin */\r
- WORD CMapLength; /* 05h Color map length */\r
- BYTE CMapDepth; /* 07h Depth of color map entries */\r
- WORD XOffset; /* 08h X origin of image */\r
- WORD YOffset; /* 0Ah Y origin of image */\r
- WORD Width; /* 0Ch Width of image */\r
- WORD Height; /* 0Eh Height of image */\r
- BYTE PixelDepth; /* 10h Image pixel size */\r
- BYTE ImageDescriptor; /* 11h Image descriptor byte */\r
- } __attribute__((packed)) TGAHEAD;\r
- static unsigned short oldscr[320*240];\r
- FILE *f; char name[128]; int i;\r
-\r
- memset(&TGAHEAD, 0, sizeof(TGAHEAD));\r
- TGAHEAD.ImageType = 2;\r
- TGAHEAD.Width = 320;\r
- TGAHEAD.Height = 240;\r
- TGAHEAD.PixelDepth = 16;\r
- TGAHEAD.ImageDescriptor = 2<<4; // image starts at top-left\r
-\r
-#define CONV(X) (((X>>1)&0x7fe0)|(X&0x1f)) // 555?\r
-\r
- for (i = 0; i < 320*240; i++)\r
- if(oldscr[i] != CONV(((unsigned short *)g_screen_ptr)[i])) break;\r
- if (i < 320*240)\r
- {\r
- for (i = 0; i < 320*240; i++)\r
- oldscr[i] = CONV(((unsigned short *)g_screen_ptr)[i]);\r
- sprintf(name, "%05i.tga", Pico.m.frame_count);\r
- f = fopen(name, "wb");\r
- if (!f) { printf("!f\n"); exit(1); }\r
- fwrite(&TGAHEAD, 1, sizeof(TGAHEAD), f);\r
- fwrite(oldscr, 1, 320*240*2, f);\r
- fclose(f);\r
- }\r
+ // make sure we are in correct mode\r
+ change_renderer(0);\r
+ vid_reset_mode();\r
}\r
-#endif\r
\r
void pemu_loop_prep(void)\r
{\r
- static int gp2x_old_clock = -1, EmuOpt_old = 0, pal_old = 0;\r
- static int gp2x_old_gamma = 100;\r
- gp2x_soc_t soc;\r
-\r
- soc = soc_detect();\r
-\r
- if ((EmuOpt_old ^ currentConfig.EmuOpt) & EOPT_RAM_TIMINGS) {\r
- if (currentConfig.EmuOpt & EOPT_RAM_TIMINGS)\r
- set_ram_timings();\r
- else\r
- unset_ram_timings();\r
- }\r
-\r
- if (gp2x_old_clock < 0)\r
- gp2x_old_clock = default_cpu_clock;\r
- if (gp2x_old_clock != currentConfig.CPUclock && gp2x_set_cpuclk != NULL) {\r
- printf("changing clock to %i...", currentConfig.CPUclock); fflush(stdout);\r
- gp2x_set_cpuclk(currentConfig.CPUclock);\r
- gp2x_old_clock = currentConfig.CPUclock;\r
- printf(" done\n");\r
- }\r
-\r
- if (gp2x_old_gamma != currentConfig.gamma || ((EmuOpt_old ^ currentConfig.EmuOpt) & EOPT_A_SN_GAMMA)) {\r
- set_lcd_gamma(currentConfig.gamma, !!(currentConfig.EmuOpt & EOPT_A_SN_GAMMA));\r
- gp2x_old_gamma = currentConfig.gamma;\r
- printf("updated gamma to %i, A_SN's curve: %i\n", currentConfig.gamma, !!(currentConfig.EmuOpt&0x1000));\r
- }\r
-\r
- if (((EmuOpt_old ^ currentConfig.EmuOpt) & EOPT_VSYNC) || Pico.m.pal != pal_old) {\r
- if ((currentConfig.EmuOpt & EOPT_VSYNC) || soc == SOCID_POLLUX)\r
- set_lcd_custom_rate(Pico.m.pal);\r
- else if (EmuOpt_old & EOPT_VSYNC)\r
- unset_lcd_custom_rate();\r
- }\r
-\r
if (gp2x_dev_id == GP2X_DEV_CAANOO)\r
- in_set_config_int(in_name_to_id("evdev:pollux-analog"), IN_CFG_ABS_DEAD_ZONE,\r
- currentConfig.analog_deadzone);\r
-\r
- if ((EmuOpt_old ^ currentConfig.EmuOpt) & EOPT_MMUHACK)\r
- gp2x_make_fb_bufferable(currentConfig.EmuOpt & EOPT_MMUHACK);\r
-\r
- EmuOpt_old = currentConfig.EmuOpt;\r
- pal_old = Pico.m.pal;\r
-\r
- // make sure we are in correct mode\r
- change_renderer(0);\r
- vid_reset_mode();\r
+ in_set_config_int(in_name_to_id("evdev:pollux-analog"),\r
+ IN_CFG_ABS_DEAD_ZONE,\r
+ currentConfig.analog_deadzone);\r
\r
// dirty buffers better go now than during gameplay\r
sync();\r
sleep(0);\r
-\r
- pemu_sound_start();\r
}\r
\r
void pemu_loop_end(void)\r
+++ /dev/null
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <unistd.h>
-
-#include "../common/input.h"
-#include "in_gp2x.h"
-
-#define IN_GP2X_PREFIX "gp2x:"
-#define IN_GP2X_NBUTTONS 32
-
-/* note: in_gp2x hadles combos (if 2 btns have the same bind,
- * both must be pressed for action to happen) */
-static int in_gp2x_combo_keys = 0;
-static int in_gp2x_combo_acts = 0;
-static int gpiodev = -1; /* Wiz only */
-
-static int (*in_gp2x_get_bits)(void);
-
-static const char *in_gp2x_keys[IN_GP2X_NBUTTONS] = {
- [0 ... IN_GP2X_NBUTTONS-1] = NULL,
- [GP2X_BTN_UP] = "Up", [GP2X_BTN_LEFT] = "Left",
- [GP2X_BTN_DOWN] = "Down", [GP2X_BTN_RIGHT] = "Right",
- [GP2X_BTN_START] = "Start", [GP2X_BTN_SELECT] = "Select",
- [GP2X_BTN_L] = "L", [GP2X_BTN_R] = "R",
- [GP2X_BTN_A] = "A", [GP2X_BTN_B] = "B",
- [GP2X_BTN_X] = "X", [GP2X_BTN_Y] = "Y",
- [GP2X_BTN_VOL_DOWN] = "VOL DOWN",
- [GP2X_BTN_VOL_UP] = "VOL UP",
- [GP2X_BTN_PUSH] = "PUSH"
-};
-
-
-static int in_gp2x_get_mmsp2_bits(void)
-{
- extern volatile unsigned short *gp2x_memregs;
- int value;
- value = gp2x_memregs[0x1198>>1] & 0xff; // GPIO M
- if (value == 0xFD) value = 0xFA;
- if (value == 0xF7) value = 0xEB;
- if (value == 0xDF) value = 0xAF;
- if (value == 0x7F) value = 0xBE;
- value |= gp2x_memregs[0x1184>>1] & 0xFF00; // GPIO C
- value |= gp2x_memregs[0x1186>>1] << 16; // GPIO D
- value = ~value & 0x08c0ff55;
-
- return value;
-}
-
-static int in_gp2x_get_wiz_bits(void)
-{
- int r, value = 0;
- r = read(gpiodev, &value, 4);
- if (value & 0x02)
- value |= 0x05;
- if (value & 0x08)
- value |= 0x14;
- if (value & 0x20)
- value |= 0x50;
- if (value & 0x80)
- value |= 0x41;
-
- /* convert to GP2X style */
- value &= 0x7ff55;
- if (value & (1 << 16))
- value |= 1 << GP2X_BTN_VOL_UP;
- if (value & (1 << 17))
- value |= 1 << GP2X_BTN_VOL_DOWN;
- if (value & (1 << 18))
- value |= 1 << GP2X_BTN_PUSH;
- value &= ~0x70000;
-
- return value;
-}
-
-#ifdef FAKE_IN_GP2X
-volatile unsigned short *gp2x_memregs;
-int gp2x_dev_id = -1;
-
-static int in_gp2x_get_fake_bits(void)
-{
- extern int current_keys;
- return current_keys;
-}
-#endif
-
-static void in_gp2x_probe(void)
-{
- switch (gp2x_dev_id)
- {
- case GP2X_DEV_GP2X:
- in_gp2x_get_bits = in_gp2x_get_mmsp2_bits;
- break;
- case GP2X_DEV_WIZ:
- gpiodev = open("/dev/GPIO", O_RDONLY);
- if (gpiodev < 0) {
- perror("in_gp2x: couldn't open /dev/GPIO");
- return;
- }
- in_gp2x_get_bits = in_gp2x_get_wiz_bits;
- break;
- // we'll use evdev for Caanoo
- default:
-#ifdef FAKE_IN_GP2X
- in_gp2x_get_bits = in_gp2x_get_fake_bits;
- break;
-#endif
- return;
- }
-
- in_register(IN_GP2X_PREFIX "GP2X pad", -1, NULL,
- IN_GP2X_NBUTTONS, in_gp2x_keys, 1);
-}
-
-static void in_gp2x_free(void *drv_data)
-{
- if (gpiodev >= 0) {
- close(gpiodev);
- gpiodev = -1;
- }
-}
-
-static const char * const *
-in_gp2x_get_key_names(int *count)
-{
- *count = IN_GP2X_NBUTTONS;
- return in_gp2x_keys;
-}
-
-/* ORs result with pressed buttons */
-static int in_gp2x_update(void *drv_data, const int *binds, int *result)
-{
- int type_start = 0;
- int i, t, keys;
-
- keys = in_gp2x_get_bits();
-
- if (keys & in_gp2x_combo_keys) {
- result[IN_BINDTYPE_EMU] = in_combos_do(keys, binds, GP2X_BTN_PUSH,
- in_gp2x_combo_keys, in_gp2x_combo_acts);
- type_start = IN_BINDTYPE_PLAYER12;
- }
-
- for (i = 0; keys; i++, keys >>= 1) {
- if (!(keys & 1))
- continue;
-
- for (t = type_start; t < IN_BINDTYPE_COUNT; t++)
- result[t] |= binds[IN_BIND_OFFS(i, t)];
- }
-
- return 0;
-}
-
-int in_gp2x_update_keycode(void *data, int *is_down)
-{
- static int old_val = 0;
- int val, diff, i;
-
- val = in_gp2x_get_bits();
- diff = val ^ old_val;
- if (diff == 0)
- return -1;
-
- /* take one bit only */
- for (i = 0; i < sizeof(diff)*8; i++)
- if (diff & (1<<i))
- break;
-
- old_val ^= 1 << i;
-
- if (is_down)
- *is_down = !!(val & (1<<i));
- return i;
-}
-
-static const struct {
- short key;
- short pbtn;
-} key_pbtn_map[] =
-{
- { GP2X_BTN_UP, PBTN_UP },
- { GP2X_BTN_DOWN, PBTN_DOWN },
- { GP2X_BTN_LEFT, PBTN_LEFT },
- { GP2X_BTN_RIGHT, PBTN_RIGHT },
- { GP2X_BTN_B, PBTN_MOK },
- { GP2X_BTN_X, PBTN_MBACK },
- { GP2X_BTN_A, PBTN_MA2 },
- { GP2X_BTN_Y, PBTN_MA3 },
- { GP2X_BTN_L, PBTN_L },
- { GP2X_BTN_R, PBTN_R },
- { GP2X_BTN_SELECT, PBTN_MENU },
-};
-
-#define KEY_PBTN_MAP_SIZE (sizeof(key_pbtn_map) / sizeof(key_pbtn_map[0]))
-
-static int in_gp2x_menu_translate(void *drv_data, int keycode)
-{
- int i;
- if (keycode < 0)
- {
- /* menu -> kc */
- keycode = -keycode;
- for (i = 0; i < KEY_PBTN_MAP_SIZE; i++)
- if (key_pbtn_map[i].pbtn == keycode)
- return key_pbtn_map[i].key;
- }
- else
- {
- for (i = 0; i < KEY_PBTN_MAP_SIZE; i++)
- if (key_pbtn_map[i].key == keycode)
- return key_pbtn_map[i].pbtn;
- }
-
- return 0;
-}
-
-#if 0 // TODO: move to pico
-static const struct {
- short code;
- char btype;
- char bit;
-} in_gp2x_defbinds[] =
-{
- /* MXYZ SACB RLDU */
- { BTN_UP, IN_BINDTYPE_PLAYER12, 0 },
- { BTN_DOWN, IN_BINDTYPE_PLAYER12, 1 },
- { BTN_LEFT, IN_BINDTYPE_PLAYER12, 2 },
- { BTN_RIGHT, IN_BINDTYPE_PLAYER12, 3 },
- { BTN_X, IN_BINDTYPE_PLAYER12, 4 }, /* B */
- { BTN_B, IN_BINDTYPE_PLAYER12, 5 }, /* C */
- { BTN_A, IN_BINDTYPE_PLAYER12, 6 }, /* A */
- { BTN_START, IN_BINDTYPE_PLAYER12, 7 },
- { BTN_SELECT, IN_BINDTYPE_EMU, PEVB_MENU },
-// { BTN_Y, IN_BINDTYPE_EMU, PEVB_SWITCH_RND },
- { BTN_L, IN_BINDTYPE_EMU, PEVB_STATE_SAVE },
- { BTN_R, IN_BINDTYPE_EMU, PEVB_STATE_LOAD },
- { BTN_VOL_UP, IN_BINDTYPE_EMU, PEVB_VOL_UP },
- { BTN_VOL_DOWN, IN_BINDTYPE_EMU, PEVB_VOL_DOWN },
- { 0, 0, 0 },
-};
-#endif
-
-/* remove binds of missing keys, count remaining ones */
-static int in_gp2x_clean_binds(void *drv_data, int *binds, int *def_binds)
-{
- int i, count = 0;
-// int eb, have_vol = 0, have_menu = 0;
-
- for (i = 0; i < IN_GP2X_NBUTTONS; i++) {
- int t, offs;
- for (t = 0; t < IN_BINDTYPE_COUNT; t++) {
- offs = IN_BIND_OFFS(i, t);
- if (in_gp2x_keys[i] == NULL)
- binds[offs] = def_binds[offs] = 0;
- if (binds[offs])
- count++;
- }
-#if 0
- eb = binds[IN_BIND_OFFS(i, IN_BINDTYPE_EMU)];
- if (eb & (PEV_VOL_DOWN|PEV_VOL_UP))
- have_vol = 1;
- if (eb & PEV_MENU)
- have_menu = 1;
-#endif
- }
-
- // TODO: move to pico
-#if 0
- /* autobind some important keys, if they are unbound */
- if (!have_vol && binds[GP2X_BTN_VOL_UP] == 0 && binds[GP2X_BTN_VOL_DOWN] == 0) {
- binds[IN_BIND_OFFS(GP2X_BTN_VOL_UP, IN_BINDTYPE_EMU)] = PEV_VOL_UP;
- binds[IN_BIND_OFFS(GP2X_BTN_VOL_DOWN, IN_BINDTYPE_EMU)] = PEV_VOL_DOWN;
- count += 2;
- }
-
- if (!have_menu) {
- binds[IN_BIND_OFFS(GP2X_BTN_SELECT, IN_BINDTYPE_EMU)] = PEV_MENU;
- count++;
- }
-#endif
-
- in_combos_find(binds, GP2X_BTN_PUSH, &in_gp2x_combo_keys, &in_gp2x_combo_acts);
-
- return count;
-}
-
-static const in_drv_t in_gp2x_drv = {
- .prefix = IN_GP2X_PREFIX,
- .probe = in_gp2x_probe,
- .free = in_gp2x_free,
- .get_key_names = in_gp2x_get_key_names,
- .clean_binds = in_gp2x_clean_binds,
- .update = in_gp2x_update,
- .update_keycode = in_gp2x_update_keycode,
- .menu_translate = in_gp2x_menu_translate,
-};
-
-void in_gp2x_init(const struct in_default_bind *defbinds)
-{
- if (gp2x_dev_id == GP2X_DEV_WIZ)
- in_gp2x_keys[GP2X_BTN_START] = "MENU";
-
- in_gp2x_combo_keys = in_gp2x_combo_acts = 0;
-
- in_register_driver(&in_gp2x_drv, defbinds);
-}
-
+++ /dev/null
-
-struct in_default_bind;
-
-void in_gp2x_init(const struct in_default_bind *defbinds);
-
-enum { GP2X_BTN_UP = 0, GP2X_BTN_LEFT = 2, GP2X_BTN_DOWN = 4, GP2X_BTN_RIGHT = 6,
- GP2X_BTN_START = 8, GP2X_BTN_SELECT = 9, GP2X_BTN_L = 10, GP2X_BTN_R = 11,
- GP2X_BTN_A = 12, GP2X_BTN_B = 13, GP2X_BTN_X = 14, GP2X_BTN_Y = 15,
- GP2X_BTN_VOL_UP = 23, GP2X_BTN_VOL_DOWN = 22, GP2X_BTN_PUSH = 27 };
-
-/* FIXME */
-#ifndef GP2X_DEV_GP2X
-extern int gp2x_dev_id;
-#define GP2X_DEV_GP2X 1
-#define GP2X_DEV_WIZ 2
-#define GP2X_DEV_CAANOO 3
-#endif
-#include <time.h>
-#include "soc.h"
-#include "plat_gp2x.h"
-
-static void menu_main_plat_draw(void)
-{
- static time_t last_bat_read = 0;
- static int last_bat_val = -1;
- unsigned short *bp = g_screen_ptr;
- int bat_h = me_mfont_h * 2 / 3;
- int i, u, w, wfill, batt_val;
- struct tm *tmp;
- time_t ltime;
- char time_s[16];
-
- if (!(currentConfig.EmuOpt & EOPT_SHOW_RTC))
- return;
-
- ltime = time(NULL);
- tmp = gmtime(<ime);
- strftime(time_s, sizeof(time_s), "%H:%M", tmp);
-
- text_out16(g_screen_width - me_mfont_w * 6, me_mfont_h + 2, time_s);
-
- if (ltime - last_bat_read > 10) {
- last_bat_read = ltime;
- last_bat_val = batt_val = gp2x_read_battery();
- }
- else
- batt_val = last_bat_val;
-
- if (batt_val < 0 || batt_val > 100)
- return;
-
- /* battery info */
- bp += (me_mfont_h * 2 + 2) * g_screen_width + g_screen_width - me_mfont_w * 3 - 3;
- for (i = 0; i < me_mfont_w * 2; i++)
- bp[i] = menu_text_color;
- for (i = 0; i < me_mfont_w * 2; i++)
- bp[i + g_screen_width * bat_h] = menu_text_color;
- for (i = 0; i <= bat_h; i++)
- bp[i * g_screen_width] =
- bp[i * g_screen_width + me_mfont_w * 2] = menu_text_color;
- for (i = 2; i < bat_h - 1; i++)
- bp[i * g_screen_width - 1] =
- bp[i * g_screen_width - 2] = menu_text_color;
-
- w = me_mfont_w * 2 - 1;
- wfill = batt_val * w / 100;
- for (u = 1; u < bat_h; u++)
- for (i = 0; i < wfill; i++)
- bp[(w - i) + g_screen_width * u] = menu_text_color;
-}
+#include "../libpicofe/gp2x/plat_gp2x.h"
// ------------ gfx options menu ------------
-static const char *mgn_aopt_gamma(int id, int *offs)
-{
- sprintf(static_buff, "%i.%02i", currentConfig.gamma / 100, currentConfig.gamma % 100);
- return static_buff;
-}
-
const char *men_scaling_opts[] = { "OFF", "software", "hardware", NULL };
mee_enum ("Horizontal scaling", MA_OPT_SCALING, currentConfig.scaling, men_scaling_opts), \
mee_enum ("Vertical scaling", MA_OPT_VSCALING, currentConfig.vscaling, men_scaling_opts), \
mee_onoff ("Tearing Fix", MA_OPT_TEARING_FIX, currentConfig.EmuOpt, EOPT_WIZ_TEAR_FIX), \
- mee_range_cust("Gamma correction", MA_OPT2_GAMMA, currentConfig.gamma, 1, 300, mgn_aopt_gamma), \
- mee_onoff ("A_SN's gamma curve", MA_OPT2_A_SN_GAMMA, currentConfig.EmuOpt, EOPT_A_SN_GAMMA), \
+ /*mee_onoff ("A_SN's gamma curve", MA_OPT2_A_SN_GAMMA, currentConfig.EmuOpt, EOPT_A_SN_GAMMA),*/ \
mee_onoff ("Vsync", MA_OPT2_VSYNC, currentConfig.EmuOpt, EOPT_VSYNC),
#define MENU_OPTIONS_ADV \
mee_onoff ("Use second CPU for sound", MA_OPT_ARM940_SOUND, PicoOpt, POPT_EXT_FM), \
- mee_onoff ("RAM overclock", MA_OPT2_RAMTIMINGS, currentConfig.EmuOpt, EOPT_RAM_TIMINGS), \
- mee_onoff ("MMU hack", MA_OPT2_SQUIDGEHACK, currentConfig.EmuOpt, EOPT_MMUHACK), \
- mee_onoff ("SVP dynarec", MA_OPT2_SVP_DYNAREC, PicoOpt, POPT_EN_SVP_DRC), \
- mee_onoff ("Status line in main menu", MA_OPT2_STATUS_LINE, currentConfig.EmuOpt, EOPT_SHOW_RTC),
static menu_entry e_menu_adv_options[];
void gp2x_menu_init(void)
{
- static menu_entry *cpu_clk_ent;
- int i;
-
- i = me_id2offset(e_menu_options, MA_OPT_CPU_CLOCKS);
- cpu_clk_ent = &e_menu_options[i];
-
/* disable by default.. */
me_enable(e_menu_adv_options, MA_OPT_ARM940_SOUND, 0);
me_enable(e_menu_gfx_options, MA_OPT_TEARING_FIX, 0);
me_enable(e_menu_adv_options, MA_OPT_ARM940_SOUND, 1);
me_enable(e_menu_gfx_options, MA_OPT2_GAMMA, 1);
me_enable(e_menu_gfx_options, MA_OPT2_A_SN_GAMMA, 1);
- cpu_clk_ent->name = "GP2X CPU clocks";
break;
case GP2X_DEV_WIZ:
me_enable(e_menu_gfx_options, MA_OPT_TEARING_FIX, 1);
- cpu_clk_ent->name = "Wiz/Caanoo CPU clock";
break;
case GP2X_DEV_CAANOO:
- cpu_clk_ent->name = "Wiz/Caanoo CPU clock";
break;
default:
break;
}
- if (gp2x_set_cpuclk == NULL)
- cpu_clk_ent->name = "";
-
if (gp2x_dev_id != GP2X_DEV_GP2X)
men_scaling_opts[2] = NULL; /* leave only off and sw */
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
+#include <linux/input.h>
-#include "plat_gp2x.h"
-#include "soc.h"
-#include "warm.h"
-#include "../common/plat.h"
-#include "../common/readpng.h"
-#include "../common/menu.h"
#include "../common/emu.h"
-#include "../common/input.h"
-#include "../linux/sndout_oss.h"
+#include "../common/menu_pico.h"
+#include "../common/input_pico.h"
+#include "../libpicofe/input.h"
+#include "../libpicofe/plat.h"
+#include "../libpicofe/linux/in_evdev.h"
+#include "../libpicofe/gp2x/soc.h"
+#include "../libpicofe/gp2x/plat_gp2x.h"
+#include "../libpicofe/gp2x/in_gp2x.h"
+#include "940ctl.h"
+#include "warm.h"
+#include "plat.h"
#include <pico/pico.h>
/* GP2X local */
-int default_cpu_clock;
-int gp2x_dev_id;
int gp2x_current_bpp;
void *gp2x_screens[4];
-#include <linux/input.h>
+void (*gp2x_video_flip)(void);
+void (*gp2x_video_flip2)(void);
+void (*gp2x_video_changemode_ll)(int bpp);
+void (*gp2x_video_setpalette)(int *pal, int len);
+void (*gp2x_video_RGB_setscaling)(int ln_offs, int W, int H);
+void (*gp2x_video_wait_vsync)(void);
-static const char * const caanoo_keys[KEY_MAX + 1] = {
- [0 ... KEY_MAX] = NULL,
- [KEY_UP] = "Up",
- [KEY_LEFT] = "Left",
- [KEY_RIGHT] = "Right",
- [KEY_DOWN] = "Down",
- [BTN_TRIGGER] = "A",
- [BTN_THUMB] = "X",
- [BTN_THUMB2] = "B",
- [BTN_TOP] = "Y",
- [BTN_TOP2] = "L",
- [BTN_PINKIE] = "R",
- [BTN_BASE] = "Home",
- [BTN_BASE2] = "Lock",
- [BTN_BASE3] = "I",
- [BTN_BASE4] = "II",
- [BTN_BASE5] = "Push",
-};
-
-struct in_default_bind in_evdev_defbinds[] =
+static struct in_default_bind in_evdev_defbinds[] =
{
/* MXYZ SACB RLDU */
- { KEY_UP, IN_BINDTYPE_PLAYER12, 0 },
- { KEY_DOWN, IN_BINDTYPE_PLAYER12, 1 },
- { KEY_LEFT, IN_BINDTYPE_PLAYER12, 2 },
- { KEY_RIGHT, IN_BINDTYPE_PLAYER12, 3 },
- { KEY_S, IN_BINDTYPE_PLAYER12, 4 }, /* B */
- { KEY_D, IN_BINDTYPE_PLAYER12, 5 }, /* C */
- { KEY_A, IN_BINDTYPE_PLAYER12, 6 }, /* A */
- { KEY_ENTER, IN_BINDTYPE_PLAYER12, 7 },
+ { KEY_UP, IN_BINDTYPE_PLAYER12, GBTN_UP },
+ { KEY_DOWN, IN_BINDTYPE_PLAYER12, GBTN_DOWN },
+ { KEY_LEFT, IN_BINDTYPE_PLAYER12, GBTN_LEFT },
+ { KEY_RIGHT, IN_BINDTYPE_PLAYER12, GBTN_RIGHT },
+ { KEY_A, IN_BINDTYPE_PLAYER12, GBTN_A },
+ { KEY_S, IN_BINDTYPE_PLAYER12, GBTN_B },
+ { KEY_D, IN_BINDTYPE_PLAYER12, GBTN_C },
+ { KEY_ENTER, IN_BINDTYPE_PLAYER12, GBTN_START },
{ KEY_BACKSLASH, IN_BINDTYPE_EMU, PEVB_MENU },
/* Caanoo */
- { BTN_THUMB, IN_BINDTYPE_PLAYER12, 4 }, /* B */
- { BTN_THUMB2, IN_BINDTYPE_PLAYER12, 5 }, /* C */
- { BTN_TRIGGER, IN_BINDTYPE_PLAYER12, 6 }, /* A */
- { BTN_BASE3, IN_BINDTYPE_PLAYER12, 7 },
+ { BTN_TRIGGER, IN_BINDTYPE_PLAYER12, GBTN_A },
+ { BTN_THUMB, IN_BINDTYPE_PLAYER12, GBTN_B },
+ { BTN_THUMB2, IN_BINDTYPE_PLAYER12, GBTN_C },
+ { BTN_BASE3, IN_BINDTYPE_PLAYER12, GBTN_START },
{ BTN_TOP2, IN_BINDTYPE_EMU, PEVB_STATE_SAVE },
{ BTN_PINKIE, IN_BINDTYPE_EMU, PEVB_STATE_LOAD },
{ BTN_BASE, IN_BINDTYPE_EMU, PEVB_MENU },
{ 0, 0, 0 }
};
+static struct in_default_bind in_gp2x_defbinds[] =
+{
+ { GP2X_BTN_UP, IN_BINDTYPE_PLAYER12, GBTN_UP },
+ { GP2X_BTN_DOWN, IN_BINDTYPE_PLAYER12, GBTN_DOWN },
+ { GP2X_BTN_LEFT, IN_BINDTYPE_PLAYER12, GBTN_LEFT },
+ { GP2X_BTN_RIGHT, IN_BINDTYPE_PLAYER12, GBTN_RIGHT },
+ { GP2X_BTN_A, IN_BINDTYPE_PLAYER12, GBTN_A },
+ { GP2X_BTN_X, IN_BINDTYPE_PLAYER12, GBTN_B },
+ { GP2X_BTN_B, IN_BINDTYPE_PLAYER12, GBTN_C },
+ { GP2X_BTN_START, IN_BINDTYPE_PLAYER12, GBTN_START },
+ { GP2X_BTN_Y, IN_BINDTYPE_EMU, PEVB_SWITCH_RND },
+ { GP2X_BTN_L, IN_BINDTYPE_EMU, PEVB_STATE_SAVE },
+ { GP2X_BTN_R, IN_BINDTYPE_EMU, PEVB_STATE_LOAD },
+ { GP2X_BTN_VOL_DOWN, IN_BINDTYPE_EMU, PEVB_VOL_DOWN },
+ { GP2X_BTN_VOL_UP, IN_BINDTYPE_EMU, PEVB_VOL_UP },
+ { GP2X_BTN_SELECT, IN_BINDTYPE_EMU, PEVB_MENU },
+ { 0, 0, 0 }
+};
+
void gp2x_video_changemode(int bpp)
{
gp2x_video_changemode_ll(bpp);
// switch to 16bpp
gp2x_video_changemode_ll(16);
gp2x_video_RGB_setscaling(0, 320, 240);
+printf("menu_enter\n");
}
void plat_video_menu_begin(void)
gp2x_video_flip2();
}
-void plat_early_init(void)
+void plat_video_menu_leave(void)
{
- gp2x_soc_t soc;
- FILE *f;
-
- soc = soc_detect();
- switch (soc)
- {
- case SOCID_MMSP2:
- default_cpu_clock = 200;
- gp2x_dev_id = GP2X_DEV_GP2X;
- break;
- case SOCID_POLLUX:
- default_cpu_clock = 533;
- f = fopen("/dev/accel", "rb");
- if (f) {
- printf("detected Caanoo\n");
- gp2x_dev_id = GP2X_DEV_CAANOO;
- fclose(f);
- }
- else {
- printf("detected Wiz\n");
- gp2x_dev_id = GP2X_DEV_WIZ;
- }
- break;
- default:
- printf("could not recognize SoC, running in dummy mode.\n");
- break;
- }
+}
+void plat_early_init(void)
+{
// just use gettimeofday until plat_init()
gp2x_get_ticks_ms = plat_get_ticks_ms_good;
gp2x_get_ticks_us = plat_get_ticks_us_good;
void plat_init(void)
{
- gp2x_soc_t soc;
+ warm_init();
- soc = soc_detect();
- switch (soc)
- {
- case SOCID_MMSP2:
- mmsp2_init();
- break;
- case SOCID_POLLUX:
- pollux_init();
+ switch (gp2x_dev_id) {
+ case GP2X_DEV_GP2X:
+ sharedmem940_init();
+ vid_mmsp2_init();
break;
- default:
- dummy_init();
+ case GP2X_DEV_WIZ:
+ case GP2X_DEV_CAANOO:
+ vid_pollux_init();
break;
}
- warm_init();
-
+ g_menuscreen_w = 320;
+ g_menuscreen_h = 240;
gp2x_memset_all_buffers(0, 0, 320*240*2);
+ gp2x_make_fb_bufferable(1);
+
// use buffer2 for menubg to save mem (using only buffers 0, 1 in menu)
g_menubg_ptr = gp2x_screens[2];
- if (gp2x_dev_id == GP2X_DEV_CAANOO)
- in_set_config(in_name_to_id("evdev:pollux-analog"), IN_CFG_KEY_NAMES,
- caanoo_keys, sizeof(caanoo_keys));
-
flip_after_sync = 1;
gp2x_menu_init();
+
+ in_evdev_init(in_evdev_defbinds);
+ in_gp2x_init(in_gp2x_defbinds);
+ in_probe();
+ plat_target_setup_input();
}
void plat_finish(void)
{
- gp2x_soc_t soc;
-
warm_finish();
- soc = soc_detect();
- switch (soc)
- {
- case SOCID_MMSP2:
- mmsp2_finish();
- break;
- case SOCID_POLLUX:
- pollux_finish();
+ switch (gp2x_dev_id) {
+ case GP2X_DEV_GP2X:
+ sharedmem940_finish();
+ vid_mmsp2_finish();
break;
- default:
- dummy_finish();
+ case GP2X_DEV_WIZ:
+ case GP2X_DEV_CAANOO:
+ vid_pollux_finish();
break;
}
}
-
--- /dev/null
+extern void *gp2x_screens[4];
+extern int gp2x_current_bpp;
+
+/* SoC specific functions */
+extern void (*gp2x_video_flip)(void);
+extern void (*gp2x_video_flip2)(void);
+/* negative bpp means rotated mode (for Wiz) */
+extern void (*gp2x_video_changemode_ll)(int bpp);
+extern void (*gp2x_video_setpalette)(int *pal, int len);
+extern void (*gp2x_video_RGB_setscaling)(int ln_offs, int W, int H);
+extern void (*gp2x_video_wait_vsync)(void);
+
+/* ??? */
+void gp2x_video_changemode(int bpp);
+void gp2x_memcpy_all_buffers(void *data, int offset, int len);
+void gp2x_memset_all_buffers(int offset, int byte, int len);
+
+/* vid_*.c */
+void vid_mmsp2_init(void);
+void vid_mmsp2_finish(void);
+
+void vid_pollux_init();
+void vid_pollux_finish();
+
+void gp2x_menu_init(void);
+++ /dev/null
-#ifndef __GP2X_H__
-#define __GP2X_H__
-
-extern int default_cpu_clock;
-
-/* video */
-void gp2x_video_changemode(int bpp);
-void gp2x_memcpy_all_buffers(void *data, int offset, int len);
-void gp2x_memset_all_buffers(int offset, int byte, int len);
-void gp2x_make_fb_bufferable(int yes);
-
-/* input */
-int gp2x_touchpad_read(int *x, int *y);
-
-/* misc */
-enum {
- GP2X_DEV_GP2X = 1,
- GP2X_DEV_WIZ,
- GP2X_DEV_CAANOO,
-};
-extern int gp2x_dev_id;
-extern int gp2x_current_bpp;
-
-unsigned int plat_get_ticks_ms_good(void);
-unsigned int plat_get_ticks_us_good(void);
-
-void gp2x_menu_init(void);
-
-#endif
+++ /dev/null
-/*
- * quick tool to set various timings for Wiz
- *
- * Copyright (c) GraÅžvydas "notaz" Ignotas, 2009
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of the organization nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * HTOTAL: X VTOTAL: 341
- * HSWIDTH: 1 VSWIDTH: 0
- * HASTART: 37 VASTART: 17
- * HAEND: 277 VAEND: 337
- *
- * 120Hz
- * pcd 8, 447: + 594us
- * pcd 9, 397: + 36us
- * pcd 10, 357: - 523us
- * pcd 11, 325: +1153us
- *
- * 'lcd_timings=397,1,37,277,341,0,17,337;dpc_clkdiv0=9'
- * 'ram_timings=2,9,4,1,1,1,1'
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include "pollux_set.h"
-
-/* parse stuff */
-static int parse_lcd_timings(const char *str, void *data)
-{
- int *lcd_timings = data;
- const char *p = str;
- int ret, c;
- ret = sscanf(str, "%d,%d,%d,%d,%d,%d,%d,%d",
- &lcd_timings[0], &lcd_timings[1], &lcd_timings[2], &lcd_timings[3],
- &lcd_timings[4], &lcd_timings[5], &lcd_timings[6], &lcd_timings[7]);
- if (ret != 8)
- return -1;
- /* skip seven commas */
- for (c = 0; c < 7 && *p != 0; p++)
- if (*p == ',')
- c++;
- if (c != 7)
- return -1;
- /* skip last number */
- while ('0' <= *p && *p <= '9')
- p++;
-
- return p - str;
-}
-
-static int parse_ram_timings(const char *str, void *data)
-{
- int *ram_timings = data;
- const char *p = str;
- int ret, c;
- float cas;
-
- ret = sscanf(p, "%f,%d,%d,%d,%d,%d,%d",
- &cas, &ram_timings[1], &ram_timings[2], &ram_timings[3],
- &ram_timings[4], &ram_timings[5], &ram_timings[6]);
- if (ret != 7)
- return -1;
- if (cas == 2)
- ram_timings[0] = 1;
- else if (cas == 2.5)
- ram_timings[0] = 2;
- else if (cas == 3)
- ram_timings[0] = 3;
- else
- return -1;
- for (c = 0; c < 6 && *p != 0; p++)
- if (*p == ',')
- c++;
- if (c != 6)
- return -1;
- while ('0' <= *p && *p <= '9')
- p++;
-
- return p - str;
-}
-
-static int parse_decimal(const char *str, void *data)
-{
- char *ep;
-
- *(int *)data = strtoul(str, &ep, 10);
- if (ep == str)
- return -1;
-
- return ep - str;
-}
-
-/* validate and apply stuff */
-static int apply_lcd_timings(volatile unsigned short *memregs, void *data)
-{
- int *lcd_timings = data;
- int i;
-
- for (i = 0; i < 8; i++) {
- if (lcd_timings[i] & ~0xffff) {
- fprintf(stderr, "pollux_set: invalid lcd timing %d: %d\n", i, lcd_timings[i]);
- return -1;
- }
- }
-
- for (i = 0; i < 8; i++)
- memregs[(0x307c>>1) + i] = lcd_timings[i];
-
- return 0;
-}
-
-static const struct {
- signed char adj; /* how to adjust value passed by user */
- signed short min; /* range of */
- signed short max; /* allowed values (inclusive) */
-}
-ram_ranges[] = {
- { 0, 1, 3 }, /* cas (cl) */
- { -2, 0, 15 }, /* trc */
- { -2, 0, 15 }, /* tras */
- { 0, 0, 15 }, /* twr */
- { 0, 0, 15 }, /* tmrd */
- { 0, 0, 15 }, /* trp */
- { 0, 0, 15 }, /* trcd */
-};
-
-static int apply_ram_timings(volatile unsigned short *memregs, void *data)
-{
- int *ram_timings = data;
- int i, val;
-
- for (i = 0; i < 7; i++)
- {
- ram_timings[i] += ram_ranges[i].adj;
- if (ram_timings[i] < ram_ranges[i].min || ram_timings[i] > ram_ranges[i].max) {
- fprintf(stderr, "pollux_set: invalid RAM timing %d\n", i);
- return -1;
- }
- }
-
- val = memregs[0x14802>>1] & 0x0f00;
- val |= (ram_timings[4] << 12) | (ram_timings[5] << 4) | ram_timings[6];
- memregs[0x14802>>1] = val;
-
- val = memregs[0x14804>>1] & 0x4000;
- val |= (ram_timings[0] << 12) | (ram_timings[1] << 8) |
- (ram_timings[2] << 4) | ram_timings[3];
- val |= 0x8000;
- memregs[0x14804>>1] = val;
-
- for (i = 0; i < 0x100000 && (memregs[0x14804>>1] & 0x8000); i++)
- ;
-
- return 0;
-}
-
-static int apply_dpc_clkdiv0(volatile unsigned short *memregs, void *data)
-{
- int pcd = *(int *)data;
- int tmp;
-
- if ((pcd - 1) & ~0x3f) {
- fprintf(stderr, "pollux_set: invalid lcd clkdiv0: %d\n", pcd);
- return -1;
- }
-
- pcd = (pcd - 1) & 0x3f;
- tmp = memregs[0x31c4>>1];
- memregs[0x31c4>>1] = (tmp & ~0x3f0) | (pcd << 4);
-
- return 0;
-}
-
-static int apply_cpuclk(volatile unsigned short *memregs, void *data)
-{
- volatile unsigned int *memregl = (volatile void *)memregs;
- int mhz = *(int *)data;
- int adiv, mdiv, pdiv, sdiv = 0;
- int i, vf000, vf004;
-
- // m = MDIV, p = PDIV, s = SDIV
- #define SYS_CLK_FREQ 27
- pdiv = 9;
- mdiv = (mhz * pdiv) / SYS_CLK_FREQ;
- if (mdiv & ~0x3ff)
- return -1;
- vf004 = (pdiv<<18) | (mdiv<<8) | sdiv;
-
- // attempt to keep AHB the divider close to 250, but not higher
- for (adiv = 1; mhz / adiv > 250; adiv++)
- ;
-
- vf000 = memregl[0xf000>>2];
- vf000 = (vf000 & ~0x3c0) | ((adiv - 1) << 6);
- memregl[0xf000>>2] = vf000;
- memregl[0xf004>>2] = vf004;
- memregl[0xf07c>>2] |= 0x8000;
- for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++)
- ;
-
- printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv);
- return 0;
-}
-
-static int lcd_timings[8];
-static int ram_timings[7];
-static int dpc_clkdiv0;
-static int cpuclk;
-
-static const char lcd_t_help[] = "htotal,hswidth,hastart,haend,vtotal,vswidth,vastart,vaend";
-static const char ram_t_help[] = "CAS,tRC,tRAS,tWR,tMRD,tRP,tRCD";
-
-static const struct {
- const char *name;
- const char *help;
- int (*parse)(const char *str, void *data);
- int (*apply)(volatile unsigned short *memregs, void *data);
- void *data;
-}
-all_params[] = {
- { "lcd_timings", lcd_t_help, parse_lcd_timings, apply_lcd_timings, lcd_timings },
- { "ram_timings", ram_t_help, parse_ram_timings, apply_ram_timings, ram_timings },
- { "dpc_clkdiv0", "divider", parse_decimal, apply_dpc_clkdiv0, &dpc_clkdiv0 },
- { "clkdiv0", "divider", parse_decimal, apply_dpc_clkdiv0, &dpc_clkdiv0 }, /* alias */
- { "cpuclk", "MHZ", parse_decimal, apply_cpuclk, &cpuclk },
-};
-#define ALL_PARAM_COUNT (sizeof(all_params) / sizeof(all_params[0]))
-
-/*
- * set timings based on preformated string
- * returns 0 on success.
- */
-int pollux_set(volatile unsigned short *memregs, const char *str)
-{
- int parsed_params[ALL_PARAM_COUNT];
- int applied_params[ALL_PARAM_COUNT];
- int applied_something = 0;
- const char *p, *po;
- int i, ret;
-
- if (str == NULL)
- return -1;
-
- memset(parsed_params, 0, sizeof(parsed_params));
- memset(applied_params, 0, sizeof(applied_params));
-
- p = str;
- while (1)
- {
-again:
- while (*p == ';' || *p == ' ')
- p++;
- if (*p == 0)
- break;
-
- for (i = 0; i < ALL_PARAM_COUNT; i++)
- {
- int param_len = strlen(all_params[i].name);
- if (strncmp(p, all_params[i].name, param_len) == 0 && p[param_len] == '=')
- {
- p += param_len + 1;
- ret = all_params[i].parse(p, all_params[i].data);
- if (ret < 0) {
- fprintf(stderr, "pollux_set parser: error at %-10s\n", p);
- fprintf(stderr, " valid format is: <%s>\n", all_params[i].help);
- return -1;
- }
- parsed_params[i] = 1;
- p += ret;
- goto again;
- }
- }
-
- /* Unknown param. Attempt to be forward compatible and ignore it. */
- for (po = p; *p != 0 && *p != ';'; p++)
- ;
-
- fprintf(stderr, "unhandled param: ");
- fwrite(po, 1, p - po, stderr);
- fprintf(stderr, "\n");
- }
-
- /* validate and apply */
- for (i = 0; i < ALL_PARAM_COUNT; i++)
- {
- if (!parsed_params[i])
- continue;
-
- ret = all_params[i].apply(memregs, all_params[i].data);
- if (ret < 0) {
- fprintf(stderr, "pollux_set: failed to apply %s (bad value?)\n",
- all_params[i].name);
- continue;
- }
-
- applied_something = 1;
- applied_params[i] = 1;
- }
-
- if (applied_something)
- {
- int c;
- printf("applied: ");
- for (i = c = 0; i < ALL_PARAM_COUNT; i++)
- {
- if (!applied_params[i])
- continue;
- if (c != 0)
- printf(", ");
- printf("%s", all_params[i].name);
- c++;
- }
- printf("\n");
- }
-
- return 0;
-}
-
-#ifdef BINARY
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-#include <unistd.h>
-
-static void usage(const char *binary)
-{
- int i;
- printf("usage:\n%s <set_str[;set_str[;...]]>\n"
- "set_str:\n", binary);
- for (i = 0; i < ALL_PARAM_COUNT; i++)
- printf(" %s=<%s>\n", all_params[i].name, all_params[i].help);
-}
-
-int main(int argc, char *argv[])
-{
- volatile unsigned short *memregs;
- int ret, memdev;
-
- if (argc != 2) {
- usage(argv[0]);
- return 1;
- }
-
- memdev = open("/dev/mem", O_RDWR);
- if (memdev == -1)
- {
- perror("open(/dev/mem) failed");
- return 1;
- }
-
- memregs = mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0xc0000000);
- if (memregs == MAP_FAILED)
- {
- perror("mmap(memregs) failed");
- close(memdev);
- return 1;
- }
-
- ret = pollux_set(memregs, argv[1]);
-
- munmap((void *)memregs, 0x20000);
- close(memdev);
-
- return ret;
-}
-#endif
+++ /dev/null
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-int pollux_set(volatile unsigned short *memregs, const char *str);
-
-#ifdef __cplusplus
-}
-#endif
+++ /dev/null
-#include <stdio.h>
-#include <string.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-#include <unistd.h>
-
-#include "soc.h"
-
-void (*gp2x_video_flip)(void);
-void (*gp2x_video_flip2)(void);
-void (*gp2x_video_changemode_ll)(int bpp);
-void (*gp2x_video_setpalette)(int *pal, int len);
-void (*gp2x_video_RGB_setscaling)(int ln_offs, int W, int H);
-void (*gp2x_video_wait_vsync)(void);
-
-void (*gp2x_set_cpuclk)(unsigned int mhz);
-
-void (*set_lcd_custom_rate)(int is_pal);
-void (*unset_lcd_custom_rate)(void);
-void (*set_lcd_gamma)(int g100, int A_SNs_curve);
-
-void (*set_ram_timings)(void);
-void (*unset_ram_timings)(void);
-int (*gp2x_read_battery)(void);
-
-unsigned int (*gp2x_get_ticks_ms)(void);
-unsigned int (*gp2x_get_ticks_us)(void);
-
-
-gp2x_soc_t soc_detect(void)
-{
- volatile unsigned short *memregs;
- volatile unsigned int *memregl;
- static gp2x_soc_t ret = -2;
- int pollux_chipname[0x30/4 + 1];
- char *pollux_chipname_c = (char *)pollux_chipname;
- int memdev;
- int i;
-
- if ((int)ret != -2)
- /* already detected */
- return ret;
-
- memdev = open("/dev/mem", O_RDONLY);
- if (memdev == -1)
- {
- perror("open(/dev/mem)");
- ret = -1;
- return -1;
- }
-
- memregs = mmap(0, 0x20000, PROT_READ, MAP_SHARED, memdev, 0xc0000000);
- if (memregs == MAP_FAILED)
- {
- perror("mmap(memregs)");
- close(memdev);
- ret = -1;
- return -1;
- }
- memregl = (volatile void *)memregs;
-
- if (memregs[0x1836>>1] == 0x2330)
- {
- printf("looks like this is MMSP2\n");
- ret = SOCID_MMSP2;
- goto out;
- }
-
- /* perform word reads. Byte reads might also work,
- * but we don't want to play with that. */
- for (i = 0; i < 0x30; i += 4)
- {
- pollux_chipname[i >> 2] = memregl[(0x1f810 + i) >> 2];
- }
- pollux_chipname_c[0x30] = 0;
-
- for (i = 0; i < 0x30; i++)
- {
- unsigned char c = pollux_chipname_c[i];
- if (c < 0x20 || c > 0x7f)
- goto not_pollux_like;
- }
-
- printf("found pollux-like id: \"%s\"\n", pollux_chipname_c);
-
- if (strncmp(pollux_chipname_c, "MAGICEYES-LEAPFROG-LF1000", 25) ||
- strncmp(pollux_chipname_c, "MAGICEYES-POLLUX", 16))
- {
- ret = SOCID_POLLUX;
- goto out;
- }
-
-not_pollux_like:
-out:
- munmap((void *)memregs, 0x20000);
- close(memdev);
- return ret;
-}
-
+++ /dev/null
-typedef enum {
- SOCID_MMSP2 = 1,
- SOCID_POLLUX,
-} gp2x_soc_t;
-
-gp2x_soc_t soc_detect(void);
-
-void mmsp2_init(void);
-void mmsp2_finish(void);
-
-void pollux_init(void);
-void pollux_finish(void);
-
-void dummy_init(void);
-void dummy_finish(void);
-
-/* SoC specific functions */
-extern void (*gp2x_video_flip)(void);
-extern void (*gp2x_video_flip2)(void);
-/* negative bpp means rotated mode (for Wiz) */
-extern void (*gp2x_video_changemode_ll)(int bpp);
-extern void (*gp2x_video_setpalette)(int *pal, int len);
-extern void (*gp2x_video_RGB_setscaling)(int ln_offs, int W, int H);
-extern void (*gp2x_video_wait_vsync)(void);
-
-extern void (*gp2x_set_cpuclk)(unsigned int mhz);
-
-extern void (*set_lcd_custom_rate)(int is_pal);
-extern void (*unset_lcd_custom_rate)(void);
-extern void (*set_lcd_gamma)(int g100, int A_SNs_curve);
-
-extern void (*set_ram_timings)(void);
-extern void (*unset_ram_timings)(void);
-extern int (*gp2x_read_battery)(void);
-
-/* gettimeofday is not suitable for Wiz, at least fw 1.1 or lower */
-extern unsigned int (*gp2x_get_ticks_ms)(void);
-extern unsigned int (*gp2x_get_ticks_us)(void);
+++ /dev/null
-/* dummy code for qemu testing, etc */
-#include <stdlib.h>
-
-#include "soc.h"
-#include "../common/emu.h"
-
-extern void *gp2x_screens[4];
-
-extern unsigned int plat_get_ticks_ms_good(void);
-extern unsigned int plat_get_ticks_us_good(void);
-
-/* video stuff */
-static void gp2x_video_flip_(void)
-{
-}
-
-/* doulblebuffered flip */
-static void gp2x_video_flip2_(void)
-{
-}
-
-static void gp2x_video_changemode_ll_(int bpp)
-{
-}
-
-static void gp2x_video_setpalette_(int *pal, int len)
-{
-}
-
-static void gp2x_video_RGB_setscaling_(int ln_offs, int W, int H)
-{
-}
-
-static void gp2x_video_wait_vsync_(void)
-{
-}
-
-/* RAM timings */
-static void set_ram_timings_(void)
-{
-}
-
-static void unset_ram_timings_(void)
-{
-}
-
-/* LCD refresh */
-static void set_lcd_custom_rate_(int is_pal)
-{
-}
-
-static void unset_lcd_custom_rate_(void)
-{
-}
-
-static void set_lcd_gamma_(int g100, int A_SNs_curve)
-{
-}
-
-static int gp2x_read_battery_(void)
-{
- return 0;
-}
-
-void dummy_init(void)
-{
- int i;
- g_screen_ptr = malloc(320 * 240 * 2);
- for (i = 0; i < array_size(gp2x_screens); i++)
- gp2x_screens[i] = g_screen_ptr;
-
- gp2x_video_flip = gp2x_video_flip_;
- gp2x_video_flip2 = gp2x_video_flip2_;
- gp2x_video_changemode_ll = gp2x_video_changemode_ll_;
- gp2x_video_setpalette = gp2x_video_setpalette_;
- gp2x_video_RGB_setscaling = gp2x_video_RGB_setscaling_;
- gp2x_video_wait_vsync = gp2x_video_wait_vsync_;
-
- set_lcd_custom_rate = set_lcd_custom_rate_;
- unset_lcd_custom_rate = unset_lcd_custom_rate_;
- set_lcd_gamma = set_lcd_gamma_;
-
- set_ram_timings = set_ram_timings_;
- unset_ram_timings = unset_ram_timings_;
- gp2x_read_battery = gp2x_read_battery_;
-
- gp2x_get_ticks_ms = plat_get_ticks_ms_good;
- gp2x_get_ticks_us = plat_get_ticks_us_good;
-}
-
-void dummy_finish(void)
-{
- free(gp2x_screens[0]);
-}
-
+++ /dev/null
-/*
- * PicoDrive
- * (C) notaz, 2006-2009
- *
- * This work is licensed under the terms of MAME license.
- * See COPYING file in the top-level directory.
- */
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <math.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-#include <unistd.h>
-
-#include "soc.h"
-#include "soc_mmsp2.h"
-#include "plat_gp2x.h"
-#include "../common/emu.h"
-#include "../common/plat.h"
-#include "../common/arm_utils.h"
-#include "940ctl.h"
-
-volatile unsigned short *gp2x_memregs;
-volatile unsigned long *gp2x_memregl;
-extern void *gp2x_screens[4];
-static int screensel = 0;
-
-int memdev = -1; /* used by code940 */
-static int touchdev = -1;
-static int touchcal[7] = { 6203, 0, -1501397, 0, -4200, 16132680, 65536 };
-
-#define FRAMEBUFF_SIZE 0x30000
-#define FRAMEBUFF_WHOLESIZE (FRAMEBUFF_SIZE*4) // 320*240*2 + some more
-#define FRAMEBUFF_ADDR0 (0x4000000 - FRAMEBUFF_WHOLESIZE)
-#define FRAMEBUFF_ADDR1 (FRAMEBUFF_ADDR0 + FRAMEBUFF_SIZE)
-#define FRAMEBUFF_ADDR2 (FRAMEBUFF_ADDR1 + FRAMEBUFF_SIZE)
-#define FRAMEBUFF_ADDR3 (FRAMEBUFF_ADDR2 + FRAMEBUFF_SIZE)
-
-static const int gp2x_screenaddrs[4] = { FRAMEBUFF_ADDR0, FRAMEBUFF_ADDR1, FRAMEBUFF_ADDR2, FRAMEBUFF_ADDR3 };
-static int gp2x_screenaddrs_use[4];
-
-static char gamma_was_changed = 0;
-static char cpuclk_was_changed = 0;
-static unsigned short gp2x_screenaddr_old[4];
-static unsigned short memtimex_old[2];
-static unsigned short reg0910;
-
-/* video stuff */
-static void gp2x_video_flip_(void)
-{
- unsigned short lsw = (unsigned short) gp2x_screenaddrs_use[screensel&3];
- unsigned short msw = (unsigned short)(gp2x_screenaddrs_use[screensel&3] >> 16);
-
- gp2x_memregs[0x2910>>1] = msw;
- gp2x_memregs[0x2914>>1] = msw;
- gp2x_memregs[0x290E>>1] = lsw;
- gp2x_memregs[0x2912>>1] = lsw;
-
- // jump to other buffer:
- g_screen_ptr = gp2x_screens[++screensel&3];
-}
-
-/* doulblebuffered flip */
-static void gp2x_video_flip2_(void)
-{
- unsigned short msw = (unsigned short)(gp2x_screenaddrs_use[screensel&1] >> 16);
-
- gp2x_memregs[0x2910>>1] = msw;
- gp2x_memregs[0x2914>>1] = msw;
- gp2x_memregs[0x290E>>1] = 0;
- gp2x_memregs[0x2912>>1] = 0;
-
- // jump to other buffer:
- g_screen_ptr = gp2x_screens[++screensel&1];
-}
-
-static void gp2x_video_changemode_ll_(int bpp)
-{
- gp2x_memregs[0x28DA>>1] = (((bpp+1)/8)<<9)|0xAB; /*8/15/16/24bpp...*/
- gp2x_memregs[0x290C>>1] = 320*((bpp+1)/8); /*line width in bytes*/
-}
-
-static void gp2x_video_setpalette_(int *pal, int len)
-{
- unsigned short *g = (unsigned short *)pal;
- volatile unsigned short *memreg = &gp2x_memregs[0x295A>>1];
-
- gp2x_memregs[0x2958>>1] = 0;
-
- len *= 2;
- while (len--)
- *memreg = *g++;
-}
-
-static void gp2x_video_RGB_setscaling_(int ln_offs, int W, int H)
-{
- float escalaw, escalah;
- int bpp = (gp2x_memregs[0x28DA>>1]>>9)&0x3;
- unsigned short scalw;
-
- // set offset
- gp2x_screenaddrs_use[0] = gp2x_screenaddrs[0] + ln_offs * 320 * bpp;
- gp2x_screenaddrs_use[1] = gp2x_screenaddrs[1] + ln_offs * 320 * bpp;
- gp2x_screenaddrs_use[2] = gp2x_screenaddrs[2] + ln_offs * 320 * bpp;
- gp2x_screenaddrs_use[3] = gp2x_screenaddrs[3] + ln_offs * 320 * bpp;
-
- escalaw = 1024.0; // RGB Horiz LCD
- escalah = 320.0; // RGB Vert LCD
-
- if (gp2x_memregs[0x2800>>1]&0x100) //TV-Out
- {
- escalaw=489.0; // RGB Horiz TV (PAL, NTSC)
- if (gp2x_memregs[0x2818>>1] == 287) //PAL
- escalah=274.0; // RGB Vert TV PAL
- else if (gp2x_memregs[0x2818>>1] == 239) //NTSC
- escalah=331.0; // RGB Vert TV NTSC
- }
-
- // scale horizontal
- scalw = (unsigned short)((float)escalaw *(W/320.0));
- /* if there is no horizontal scaling, vertical doesn't work.
- * Here is a nasty wrokaround... */
- if (H != 240 && W == 320) scalw--;
- gp2x_memregs[0x2906>>1]=scalw;
- // scale vertical
- gp2x_memregl[0x2908>>2]=(unsigned long)((float)escalah *bpp *(H/240.0));
-}
-
-static void gp2x_video_wait_vsync_(void)
-{
- unsigned short v = gp2x_memregs[0x1182>>1];
- while (!((v ^ gp2x_memregs[0x1182>>1]) & 0x10))
- spend_cycles(1024);
-}
-
-/* 940 */
-void pause940(int yes)
-{
- if (yes)
- gp2x_memregs[0x0904>>1] &= 0xFFFE;
- else
- gp2x_memregs[0x0904>>1] |= 1;
-}
-
-void reset940(int yes, int bank)
-{
- gp2x_memregs[0x3B48>>1] = ((yes&1) << 7) | (bank & 0x03);
-}
-
-/*
- * CPU clock
- * Fout = (m * Fin) / (p * 2^s)
- * m = MDIV+8, p = PDIV+2, s = SDIV
- *
- * m = (Fout * p * 2^s) / Fin
- */
-
-#define SYS_CLK_FREQ 7372800
-
-static void gp2x_set_cpuclk_(unsigned int mhz)
-{
- unsigned int mdiv, pdiv, sdiv = 0;
- unsigned int v;
- int i;
-
- pdiv = 3;
- mdiv = (mhz * pdiv * 1000000) / SYS_CLK_FREQ;
- if (mdiv & ~0xff) {
- fprintf(stderr, "invalid cpuclk MHz: %u\n", mhz);
- return;
- }
- v = ((mdiv-8)<<8) | ((pdiv-2)<<2) | sdiv;
- gp2x_memregs[0x910>>1] = v;
-
- for (i = 0; i < 10000; i++)
- if (!(gp2x_memregs[0x902>>1] & 1))
- break;
-
- cpuclk_was_changed = 1;
-}
-
-/* RAM timings */
-#define TIMING_CHECK(t, adj, mask) \
- t += adj; \
- if (t & ~mask) \
- goto bad
-
-static void set_ram_timing_vals(int tCAS, int tRC, int tRAS, int tWR, int tMRD, int tRFC, int tRP, int tRCD)
-{
- int i;
- TIMING_CHECK(tCAS, -2, 0x1);
- TIMING_CHECK(tRC, -1, 0xf);
- TIMING_CHECK(tRAS, -1, 0xf);
- TIMING_CHECK(tWR, -1, 0xf);
- TIMING_CHECK(tMRD, -1, 0xf);
- TIMING_CHECK(tRFC, -1, 0xf);
- TIMING_CHECK(tRP, -1, 0xf);
- TIMING_CHECK(tRCD, -1, 0xf);
-
- /* get spend_cycles() into cache */
- spend_cycles(1);
-
- gp2x_memregs[0x3802>>1] = ((tMRD & 0xF) << 12) | ((tRFC & 0xF) << 8) | ((tRP & 0xF) << 4) | (tRCD & 0xF);
- gp2x_memregs[0x3804>>1] = 0x8000 | ((tCAS & 1) << 12) | ((tRC & 0xF) << 8) | ((tRAS & 0xF) << 4) | (tWR & 0xF);
-
- /* be sure we don't access the mem while it's being reprogrammed */
- spend_cycles(128*1024);
- for (i = 0; i < 8*1024; i++)
- if (!(gp2x_memregs[0x3804>>1] & 0x8000))
- break;
-
- printf("RAM timings set.\n");
- return;
-bad:
- fprintf(stderr, "RAM timings invalid.\n");
-}
-
-static void set_ram_timings_(void)
-{
- /* craigix: --cas 2 --trc 6 --tras 4 --twr 1 --tmrd 1 --trfc 1 --trp 2 --trcd 2 */
- set_ram_timing_vals(2, 6, 4, 1, 1, 1, 2, 2);
-}
-
-static void unset_ram_timings_(void)
-{
- gp2x_memregs[0x3802>>1] = memtimex_old[0];
- gp2x_memregs[0x3804>>1] = memtimex_old[1] | 0x8000;
- printf("RAM timings reset to startup values.\n");
-}
-
-/* LCD refresh */
-typedef struct
-{
- unsigned short reg, valmask, val;
-}
-reg_setting;
-
-/* 120.00 97/0/2/7|25/ 7/ 7/11/37 */
-static const reg_setting lcd_rate_120[] =
-{
- { 0x0914, 0xffff, (97<<8)|(0<<2)|2 }, /* UPLLSETVREG */
- { 0x0924, 0xff00, (2<<14)|(7<<8) }, /* DISPCSETREG */
- { 0x281A, 0x00ff, 25 }, /* .HSWID(T2) */
- { 0x281C, 0x00ff, 7 }, /* .HSSTR(T8) */
- { 0x281E, 0x00ff, 7 }, /* .HSEND(T7) */
- { 0x2822, 0x01ff, 11 }, /* .VSEND (T9) */
- { 0x2826, 0x0ff0, 37<<4 }, /* .DESTR(T3) */
- { 0, 0, 0 }
-};
-
-/* 100.00 96/0/2/7|29/25/53/15/37 */
-static const reg_setting lcd_rate_100[] =
-{
- { 0x0914, 0xffff, (96<<8)|(0<<2)|2 }, /* UPLLSETVREG */
- { 0x0924, 0xff00, (2<<14)|(7<<8) }, /* DISPCSETREG */
- { 0x281A, 0x00ff, 29 }, /* .HSWID(T2) */
- { 0x281C, 0x00ff, 25 }, /* .HSSTR(T8) */
- { 0x281E, 0x00ff, 53 }, /* .HSEND(T7) */
- { 0x2822, 0x01ff, 15 }, /* .VSEND (T9) */
- { 0x2826, 0x0ff0, 37<<4 }, /* .DESTR(T3) */
- { 0, 0, 0 }
-};
-
-static reg_setting lcd_rate_defaults[] =
-{
- { 0x0914, 0xffff, 0 },
- { 0x0924, 0xff00, 0 },
- { 0x281A, 0x00ff, 0 },
- { 0x281C, 0x00ff, 0 },
- { 0x281E, 0x00ff, 0 },
- { 0x2822, 0x01ff, 0 },
- { 0x2826, 0x0ff0, 0 },
- { 0, 0, 0 }
-};
-
-static void get_reg_setting(reg_setting *set)
-{
- for (; set->reg; set++)
- {
- unsigned short val = gp2x_memregs[set->reg >> 1];
- val &= set->valmask;
- set->val = val;
- }
-}
-
-static void set_reg_setting(const reg_setting *set)
-{
- for (; set->reg; set++)
- {
- unsigned short val = gp2x_memregs[set->reg >> 1];
- val &= ~set->valmask;
- val |= set->val;
- gp2x_memregs[set->reg >> 1] = val;
- }
-}
-
-static void set_lcd_custom_rate_(int is_pal)
-{
- if (gp2x_memregs[0x2800>>1] & 0x100) // tv-out
- return;
-
- printf("setting custom LCD refresh (%d Hz)... ", is_pal ? 100 : 120);
- fflush(stdout);
-
- set_reg_setting(is_pal ? lcd_rate_100 : lcd_rate_120);
- printf("done.\n");
-}
-
-static void unset_lcd_custom_rate_(void)
-{
- printf("reset to prev LCD refresh.\n");
- set_reg_setting(lcd_rate_defaults);
-}
-
-static void set_lcd_gamma_(int g100, int A_SNs_curve)
-{
- float gamma = (float) g100 / 100;
- int i;
- gamma = 1 / gamma;
-
- /* enable gamma */
- gp2x_memregs[0x2880>>1] &= ~(1<<12);
-
- gp2x_memregs[0x295C>>1] = 0;
- for (i = 0; i < 256; i++)
- {
- unsigned char g;
- unsigned short s;
- const unsigned short grey50=143, grey75=177, grey25=97;
- double blah;
-
- if (A_SNs_curve)
- {
- // The next formula is all about gaussian interpolation
- blah = (( -128 * exp(-powf((float) i/64.0f + 2.0f , 2.0f))) +
- ( -64 * exp(-powf((float) i/64.0f + 1.0f , 2.0f))) +
- (grey25 * exp(-powf((float) i/64.0f - 1.0f , 2.0f))) +
- (grey50 * exp(-powf((float) i/64.0f - 2.0f , 2.0f))) +
- (grey75 * exp(-powf((float) i/64.0f - 3.0f , 2.0f))) +
- ( 256 * exp(-powf((float) i/64.0f - 4.0f , 2.0f))) +
- ( 320 * exp(-powf((float) i/64.0f - 5.0f , 2.0f))) +
- ( 384 * exp(-powf((float) i/64.0f - 6.0f , 2.0f)))) / 1.772637;
- blah += 0.5;
- }
- else
- {
- blah = i;
- }
-
- g = (unsigned char)(255.0 * pow(blah/255.0, gamma));
- //printf("%d : %d\n", i, g);
- s = (g<<8) | g;
- gp2x_memregs[0x295E>>1]= s;
- gp2x_memregs[0x295E>>1]= g;
- }
-
- gamma_was_changed = 1;
-}
-
-static int gp2x_read_battery_(void)
-{
- return -1; /* TODO? */
-}
-
-/* these are not quite MMSP2 related,
- * more to GP2X F100/F200 consoles themselves. */
-typedef struct ucb1x00_ts_event
-{
- unsigned short pressure;
- unsigned short x;
- unsigned short y;
- unsigned short pad;
- struct timeval stamp;
-} UCB1X00_TS_EVENT;
-
-int gp2x_touchpad_read(int *x, int *y)
-{
- UCB1X00_TS_EVENT event;
- static int zero_seen = 0;
- int retval;
-
- if (touchdev < 0) return -1;
-
- retval = read(touchdev, &event, sizeof(event));
- if (retval <= 0) {
- perror("touch read failed");
- return -1;
- }
- // this is to ignore the messed-up 4.1.x driver
- if (event.pressure == 0) zero_seen = 1;
-
- if (x) *x = (event.x * touchcal[0] + touchcal[2]) >> 16;
- if (y) *y = (event.y * touchcal[4] + touchcal[5]) >> 16;
- // printf("read %i %i %i\n", event.pressure, *x, *y);
-
- return zero_seen ? event.pressure : 0;
-}
-
-static void proc_set(const char *path, const char *val)
-{
- FILE *f;
- char tmp[16];
-
- f = fopen(path, "w");
- if (f == NULL) {
- printf("failed to open: %s\n", path);
- return;
- }
-
- fprintf(f, "0\n");
- fclose(f);
-
- printf("\"%s\" is set to: ", path);
- f = fopen(path, "r");
- if (f == NULL) {
- printf("(open failed)\n");
- return;
- }
-
- fgets(tmp, sizeof(tmp), f);
- printf("%s", tmp);
- fclose(f);
-}
-
-
-void mmsp2_init(void)
-{
- int i;
-
- memdev = open("/dev/mem", O_RDWR);
- if (memdev == -1)
- {
- perror("open(\"/dev/mem\")");
- exit(1);
- }
-
- gp2x_memregs = mmap(0, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0xc0000000);
- if (gp2x_memregs == MAP_FAILED)
- {
- perror("mmap(memregs)");
- exit(1);
- }
- gp2x_memregl = (unsigned long *) gp2x_memregs;
-
- gp2x_memregs[0x2880>>1] &= ~0x383; // disable cursor, subpict, osd, video layers
-
- gp2x_screens[0] = mmap(0, FRAMEBUFF_WHOLESIZE, PROT_WRITE, MAP_SHARED,
- memdev, gp2x_screenaddrs[0]);
- if (gp2x_screens[0] == MAP_FAILED)
- {
- perror("mmap(g_screen_ptr)");
- exit(1);
- }
- printf("framebuffers:\n");
- printf(" %08x -> %p\n", gp2x_screenaddrs[0], gp2x_screens[0]);
- for (i = 1; i < 4; i++)
- {
- gp2x_screens[i] = (char *) gp2x_screens[i - 1] + FRAMEBUFF_SIZE;
- printf(" %08x -> %p\n", gp2x_screenaddrs[i], gp2x_screens[i]);
- }
-
- g_screen_ptr = gp2x_screens[0];
- screensel = 0;
-
- gp2x_screenaddr_old[0] = gp2x_memregs[0x290E>>1];
- gp2x_screenaddr_old[1] = gp2x_memregs[0x2910>>1];
- gp2x_screenaddr_old[2] = gp2x_memregs[0x2912>>1];
- gp2x_screenaddr_old[3] = gp2x_memregs[0x2914>>1];
-
- memcpy(gp2x_screenaddrs_use, gp2x_screenaddrs, sizeof(gp2x_screenaddrs));
-
- /* save startup values: LCD refresh */
- get_reg_setting(lcd_rate_defaults);
-
- /* CPU and RAM timings */
- reg0910 = gp2x_memregs[0x0910>>1];
- memtimex_old[0] = gp2x_memregs[0x3802>>1];
- memtimex_old[1] = gp2x_memregs[0x3804>>1];
-
- /* touchscreen */
- touchdev = open("/dev/touchscreen/wm97xx", O_RDONLY);
- if (touchdev >= 0) {
- FILE *pcf = fopen("/etc/pointercal", "r");
- if (pcf) {
- fscanf(pcf, "%d %d %d %d %d %d %d", &touchcal[0], &touchcal[1],
- &touchcal[2], &touchcal[3], &touchcal[4], &touchcal[5], &touchcal[6]);
- fclose(pcf);
- }
- printf("found touchscreen/wm97xx\n");
- }
-
- /* disable Linux read-ahead */
- proc_set("/proc/sys/vm/max-readahead", "0\n");
- proc_set("/proc/sys/vm/min-readahead", "0\n");
-
- /* code940 portion */
- sharedmem940_init();
-
- gp2x_video_flip = gp2x_video_flip_;
- gp2x_video_flip2 = gp2x_video_flip2_;
- gp2x_video_changemode_ll = gp2x_video_changemode_ll_;
- gp2x_video_setpalette = gp2x_video_setpalette_;
- gp2x_video_RGB_setscaling = gp2x_video_RGB_setscaling_;
- gp2x_video_wait_vsync = gp2x_video_wait_vsync_;
-
- gp2x_set_cpuclk = gp2x_set_cpuclk_;
-
- set_lcd_custom_rate = set_lcd_custom_rate_;
- unset_lcd_custom_rate = unset_lcd_custom_rate_;
- set_lcd_gamma = set_lcd_gamma_;
-
- set_ram_timings = set_ram_timings_;
- unset_ram_timings = unset_ram_timings_;
- gp2x_read_battery = gp2x_read_battery_;
-
- gp2x_get_ticks_ms = plat_get_ticks_ms_good;
- gp2x_get_ticks_us = plat_get_ticks_us_good;
-}
-
-void mmsp2_finish(void)
-{
- reset940(1, 3);
- pause940(1);
- sharedmem940_finish();
-
- gp2x_video_RGB_setscaling_(0, 320, 240);
- gp2x_video_changemode_ll_(16);
-
- gp2x_memregs[0x290E>>1] = gp2x_screenaddr_old[0];
- gp2x_memregs[0x2910>>1] = gp2x_screenaddr_old[1];
- gp2x_memregs[0x2912>>1] = gp2x_screenaddr_old[2];
- gp2x_memregs[0x2914>>1] = gp2x_screenaddr_old[3];
-
- unset_lcd_custom_rate_();
- if (gamma_was_changed)
- set_lcd_gamma_(100, 0);
- unset_ram_timings_();
- if (cpuclk_was_changed)
- gp2x_memregs[0x910>>1] = reg0910;
-
- munmap(gp2x_screens[0], FRAMEBUFF_WHOLESIZE);
- munmap((void *)gp2x_memregs, 0x10000);
- close(memdev);
- if (touchdev >= 0)
- close(touchdev);
-}
-
+++ /dev/null
-
-extern int memdev;
-extern volatile unsigned short *gp2x_memregs;
-extern volatile unsigned long *gp2x_memregl;
-
-/* 940 core */
-void pause940(int yes);
-void reset940(int yes, int bank);
-
+++ /dev/null
-/*
- * PicoDrive
- * (C) notaz, 2009,2010
- *
- * This work is licensed under the terms of MAME license.
- * See COPYING file in the top-level directory.
- */
-/*
- * <random_info=mem_map>
- * 00000000-029fffff linux (42MB)
- * 02a00000-02dfffff fb (4MB, 153600B really used)
- * 02e00000-02ffffff sound dma (2MB)
- * 03000000-03ffffff MPEGDEC (?, 16MB)
- * </random_info>
- */
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <math.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-#include <unistd.h>
-#include <sys/ioctl.h>
-#include <linux/fb.h>
-
-#include "soc.h"
-#include "plat_gp2x.h"
-#include "../common/emu.h"
-#include "../common/plat.h"
-#include "../common/arm_utils.h"
-#include "pollux_set.h"
-
-static volatile unsigned short *memregs;
-static volatile unsigned int *memregl;
-static int memdev = -1;
-static int battdev = -1;
-
-extern void *gp2x_screens[4];
-
-#define fb_buf_count 4
-static unsigned int fb_paddr[fb_buf_count];
-static int fb_work_buf;
-static int fbdev = -1;
-
-static char cpuclk_was_changed = 0;
-static unsigned short memtimex_old[2];
-static unsigned int pllsetreg0_old;
-static unsigned int timer_drift; // count per real second
-static int last_pal_setting = 0;
-
-
-/* misc */
-static void pollux_set_fromenv(const char *env_var)
-{
- const char *set_string;
- set_string = getenv(env_var);
- if (set_string)
- pollux_set(memregs, set_string);
- else
- printf("env var %s not defined.\n", env_var);
-}
-
-/* video stuff */
-static void pollux_video_flip(int buf_count)
-{
- memregl[0x406C>>2] = fb_paddr[fb_work_buf];
- memregl[0x4058>>2] |= 0x10;
- fb_work_buf++;
- if (fb_work_buf >= buf_count)
- fb_work_buf = 0;
- g_screen_ptr = gp2x_screens[fb_work_buf];
-}
-
-static void gp2x_video_flip_(void)
-{
- pollux_video_flip(fb_buf_count);
-}
-
-/* doulblebuffered flip */
-static void gp2x_video_flip2_(void)
-{
- pollux_video_flip(2);
-}
-
-static void gp2x_video_changemode_ll_(int bpp)
-{
- static int prev_bpp = 0;
- int code = 0, bytes = 2;
- int rot_cmd[2] = { 0, 0 };
- unsigned int r;
- char buff[32];
- int ret;
-
- if (bpp == prev_bpp)
- return;
- prev_bpp = bpp;
-
- printf("changemode: %dbpp rot=%d\n", abs(bpp), bpp < 0);
-
- /* negative bpp means rotated mode */
- rot_cmd[0] = (bpp < 0) ? 6 : 5;
- ret = ioctl(fbdev, _IOW('D', 90, int[2]), rot_cmd);
- if (ret < 0)
- perror("rot ioctl failed");
- memregl[0x4004>>2] = (bpp < 0) ? 0x013f00ef : 0x00ef013f;
- memregl[0x4000>>2] |= 1 << 3;
-
- /* the above ioctl resets LCD timings, so set them here */
- snprintf(buff, sizeof(buff), "POLLUX_LCD_TIMINGS_%s", last_pal_setting ? "PAL" : "NTSC");
- pollux_set_fromenv(buff);
-
- switch (abs(bpp))
- {
- case 8:
- code = 0x443a;
- bytes = 1;
- break;
-
- case 15:
- case 16:
- code = 0x4432;
- bytes = 2;
- break;
-
- default:
- printf("unhandled bpp request: %d\n", abs(bpp));
- return;
- }
-
- memregl[0x405c>>2] = bytes;
- memregl[0x4060>>2] = bytes * (bpp < 0 ? 240 : 320);
-
- r = memregl[0x4058>>2];
- r = (r & 0xffff) | (code << 16) | 0x10;
- memregl[0x4058>>2] = r;
-}
-
-static void gp2x_video_setpalette_(int *pal, int len)
-{
- /* pollux palette is 16bpp only.. */
- int i;
- for (i = 0; i < len; i++)
- {
- int c = pal[i];
- c = ((c >> 8) & 0xf800) | ((c >> 5) & 0x07c0) | ((c >> 3) & 0x001f);
- memregl[0x4070>>2] = (i << 24) | c;
- }
-}
-
-static void gp2x_video_RGB_setscaling_(int ln_offs, int W, int H)
-{
- /* maybe a job for 3d hardware? */
-}
-
-static void gp2x_video_wait_vsync_(void)
-{
- while (!(memregl[0x308c>>2] & (1 << 10)))
- spend_cycles(128);
- memregl[0x308c>>2] |= 1 << 10;
-}
-
-/* CPU clock */
-static void gp2x_set_cpuclk_(unsigned int mhz)
-{
- char buff[24];
- snprintf(buff, sizeof(buff), "cpuclk=%u", mhz);
- pollux_set(memregs, buff);
-
- cpuclk_was_changed = 1;
-}
-
-/* RAM timings */
-static void set_ram_timings_(void)
-{
- pollux_set_fromenv("POLLUX_RAM_TIMINGS");
-}
-
-static void unset_ram_timings_(void)
-{
- int i;
-
- memregs[0x14802>>1] = memtimex_old[0];
- memregs[0x14804>>1] = memtimex_old[1] | 0x8000;
-
- for (i = 0; i < 0x100000; i++)
- if (!(memregs[0x14804>>1] & 0x8000))
- break;
-
- printf("RAM timings reset to startup values.\n");
-}
-
-/* LCD refresh */
-static void set_lcd_custom_rate_(int is_pal)
-{
- /* just remember PAL/NTSC. We always set timings in _changemode_ll() */
- last_pal_setting = is_pal;
-}
-
-static void unset_lcd_custom_rate_(void)
-{
-}
-
-static void set_lcd_gamma_(int g100, int A_SNs_curve)
-{
- /* hm, the LCD possibly can do it (but not POLLUX) */
-}
-
-static int gp2x_read_battery_(void)
-{
- unsigned short magic_val = 0;
-
- if (battdev < 0)
- return -1;
- if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
- return -1;
- switch (magic_val) {
- default:
- case 1: return 100;
- case 2: return 66;
- case 3: return 40;
- case 4: return 0;
- }
-}
-
-#define TIMER_BASE3 0x1980
-#define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
-
-static unsigned int gp2x_get_ticks_us_(void)
-{
- TIMER_REG(0x08) = 0x4b; /* run timer, latch value */
- return TIMER_REG(0);
-}
-
-static unsigned int gp2x_get_ticks_ms_(void)
-{
- /* approximate /= 1000 */
- unsigned long long v64;
- v64 = (unsigned long long)gp2x_get_ticks_us_() * 4294968;
- return v64 >> 32;
-}
-
-static void timer_cleanup(void)
-{
- TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */
- TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */
- TIMER_REG(0x00) = 0; /* clear counter */
- TIMER_REG(0x40) = 0; /* clocks off */
- TIMER_REG(0x44) = 0; /* dividers back to default */
-}
-
-/* note: both PLLs are programmed the same way,
- * the databook incorrectly states that PLL1 differs */
-static int decode_pll(unsigned int reg)
-{
- long long v;
- int p, m, s;
-
- p = (reg >> 18) & 0x3f;
- m = (reg >> 8) & 0x3ff;
- s = reg & 0xff;
-
- if (p == 0)
- p = 1;
-
- v = 27000000; // master clock
- v = v * m / (p << s);
- return v;
-}
-
-int pollux_get_real_snd_rate(int req_rate)
-{
- int clk0_src, clk1_src, rate, div;
-
- clk0_src = (memregl[0xdbc4>>2] >> 1) & 7;
- clk1_src = (memregl[0xdbc8>>2] >> 1) & 7;
- if (clk0_src > 1 || clk1_src != 7) {
- fprintf(stderr, "get_real_snd_rate: bad clk sources: %d %d\n", clk0_src, clk1_src);
- return req_rate;
- }
-
- rate = decode_pll(clk0_src ? memregl[0xf008>>2] : memregl[0xf004>>2]);
-
- // apply divisors
- div = ((memregl[0xdbc4>>2] >> 4) & 0x3f) + 1;
- rate /= div;
- div = ((memregl[0xdbc8>>2] >> 4) & 0x3f) + 1;
- rate /= div;
- rate /= 64;
-
- //printf("rate %d\n", rate);
- rate -= rate * timer_drift / 1000000;
- printf("adjusted rate: %d\n", rate);
-
- if (rate < 8000-1000 || rate > 44100+1000) {
- fprintf(stderr, "get_real_snd_rate: got bad rate: %d\n", rate);
- return req_rate;
- }
-
- return rate;
-}
-
-void pollux_init(void)
-{
- struct fb_fix_screeninfo fbfix;
- int i, ret, rate, timer_div;
-
- memdev = open("/dev/mem", O_RDWR);
- if (memdev == -1) {
- perror("open(/dev/mem) failed");
- exit(1);
- }
-
- memregs = mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0xc0000000);
- if (memregs == MAP_FAILED) {
- perror("mmap(memregs) failed");
- exit(1);
- }
- memregl = (volatile void *)memregs;
-
- fbdev = open("/dev/fb0", O_RDWR);
- if (fbdev < 0) {
- perror("can't open fbdev");
- exit(1);
- }
-
- ret = ioctl(fbdev, FBIOGET_FSCREENINFO, &fbfix);
- if (ret == -1) {
- perror("ioctl(fbdev) failed");
- exit(1);
- }
-
- printf("framebuffer: \"%s\" @ %08lx\n", fbfix.id, fbfix.smem_start);
- fb_paddr[0] = fbfix.smem_start;
-
- gp2x_screens[0] = mmap(0, 320*240*2*fb_buf_count, PROT_READ|PROT_WRITE,
- MAP_SHARED, memdev, fb_paddr[0]);
- if (gp2x_screens[0] == MAP_FAILED)
- {
- perror("mmap(gp2x_screens) failed");
- exit(1);
- }
- memset(gp2x_screens[0], 0, 320*240*2*fb_buf_count);
-
- printf(" %p -> %08x\n", gp2x_screens[0], fb_paddr[0]);
- for (i = 1; i < fb_buf_count; i++)
- {
- fb_paddr[i] = fb_paddr[i-1] + 320*240*2;
- gp2x_screens[i] = (char *)gp2x_screens[i-1] + 320*240*2;
- printf(" %p -> %08x\n", gp2x_screens[i], fb_paddr[i]);
- }
- fb_work_buf = 0;
- g_screen_ptr = gp2x_screens[0];
-
- battdev = open("/dev/pollux_batt", O_RDONLY);
- if (battdev < 0)
- perror("Warning: could't open pollux_batt");
-
- /* find what PLL1 runs at, for the timer */
- rate = decode_pll(memregl[0xf008>>2]);
- printf("PLL1 @ %dHz\n", rate);
-
- /* setup timer */
- timer_div = (rate + 500000) / 1000000;
- if (1 <= timer_div && timer_div <= 256) {
- timer_drift = (rate - (timer_div * 1000000)) / timer_div;
-
- if (TIMER_REG(0x08) & 8) {
- fprintf(stderr, "warning: timer in use, overriding!\n");
- timer_cleanup();
- }
-
- TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2; /* using PLL1, divide by it's rate */
- TIMER_REG(0x40) = 0x0c; /* clocks on */
- TIMER_REG(0x08) = 0x6b; /* run timer, clear irq, latch value */
-
- gp2x_get_ticks_ms = gp2x_get_ticks_ms_;
- gp2x_get_ticks_us = gp2x_get_ticks_us_;
- }
- else {
- fprintf(stderr, "warning: could not make use of timer\n");
-
- // those functions are actually not good at all on Wiz kernel
- gp2x_get_ticks_ms = plat_get_ticks_ms_good;
- gp2x_get_ticks_us = plat_get_ticks_us_good;
- }
-
- pllsetreg0_old = memregl[0xf004>>2];
- memtimex_old[0] = memregs[0x14802>>1];
- memtimex_old[1] = memregs[0x14804>>1];
-
- gp2x_video_flip = gp2x_video_flip_;
- gp2x_video_flip2 = gp2x_video_flip2_;
- gp2x_video_changemode_ll = gp2x_video_changemode_ll_;
- gp2x_video_setpalette = gp2x_video_setpalette_;
- gp2x_video_RGB_setscaling = gp2x_video_RGB_setscaling_;
- gp2x_video_wait_vsync = gp2x_video_wait_vsync_;
-
- /* some firmwares have sys clk on PLL0, we can't adjust CPU clock
- * by reprogramming the PLL0 then, as it overclocks system bus */
- if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
- gp2x_set_cpuclk = gp2x_set_cpuclk_;
- else {
- fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
- memregl[0xf000>>2]);
- gp2x_set_cpuclk = NULL;
- }
-
- set_lcd_custom_rate = set_lcd_custom_rate_;
- unset_lcd_custom_rate = unset_lcd_custom_rate_;
- set_lcd_gamma = set_lcd_gamma_;
-
- set_ram_timings = set_ram_timings_;
- unset_ram_timings = unset_ram_timings_;
- gp2x_read_battery = gp2x_read_battery_;
-}
-
-void pollux_finish(void)
-{
- /* switch to default fb mem, turn portrait off */
- memregl[0x406C>>2] = fb_paddr[0];
- memregl[0x4058>>2] |= 0x10;
- close(fbdev);
-
- gp2x_video_changemode_ll_(16);
- unset_ram_timings_();
- if (cpuclk_was_changed) {
- memregl[0xf004>>2] = pllsetreg0_old;
- memregl[0xf07c>>2] |= 0x8000;
- }
- timer_cleanup();
-
- munmap((void *)memregs, 0x20000);
- close(memdev);
- if (battdev >= 0)
- close(battdev);
-}
-
+++ /dev/null
-
-int pollux_get_real_snd_rate(int req_rate);
--- /dev/null
+/*
+ * (C) GraÅžvydas "notaz" Ignotas, 2006-2009,2013
+ *
+ * This work is licensed under the terms of any of these licenses
+ * (at your option):
+ * - GNU GPL, version 2 or later.
+ * - GNU LGPL, version 2.1 or later.
+ * - MAME license.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <linux/fb.h>
+#include <sys/mman.h>
+
+#include "../libpicofe/gp2x/plat_gp2x.h"
+#include "../libpicofe/gp2x/soc.h"
+#include "../common/arm_utils.h"
+#include "../common/emu.h"
+#include "plat.h"
+
+#define FRAMEBUFF_SIZE 0x30000
+#define FRAMEBUFF_WHOLESIZE (FRAMEBUFF_SIZE*4) // 320*240*2 + some more
+#define FRAMEBUFF_ADDR0 (0x4000000 - FRAMEBUFF_WHOLESIZE)
+#define FRAMEBUFF_ADDR1 (FRAMEBUFF_ADDR0 + FRAMEBUFF_SIZE)
+#define FRAMEBUFF_ADDR2 (FRAMEBUFF_ADDR1 + FRAMEBUFF_SIZE)
+#define FRAMEBUFF_ADDR3 (FRAMEBUFF_ADDR2 + FRAMEBUFF_SIZE)
+
+static const int gp2x_screenaddrs[4] = { FRAMEBUFF_ADDR0, FRAMEBUFF_ADDR1, FRAMEBUFF_ADDR2, FRAMEBUFF_ADDR3 };
+static int gp2x_screenaddrs_use[4];
+
+static unsigned short gp2x_screenaddr_old[4];
+static int screensel;
+
+static void gp2x_video_flip_(void)
+{
+ unsigned short lsw = (unsigned short) gp2x_screenaddrs_use[screensel&3];
+ unsigned short msw = (unsigned short)(gp2x_screenaddrs_use[screensel&3] >> 16);
+
+ memregs[0x2910>>1] = msw;
+ memregs[0x2914>>1] = msw;
+ memregs[0x290E>>1] = lsw;
+ memregs[0x2912>>1] = lsw;
+
+ // jump to other buffer:
+ g_screen_ptr = gp2x_screens[++screensel&3];
+}
+
+/* doulblebuffered flip */
+static void gp2x_video_flip2_(void)
+{
+ unsigned short msw = (unsigned short)(gp2x_screenaddrs_use[screensel&1] >> 16);
+
+ memregs[0x2910>>1] = msw;
+ memregs[0x2914>>1] = msw;
+ memregs[0x290E>>1] = 0;
+ memregs[0x2912>>1] = 0;
+
+ // jump to other buffer:
+ g_screen_ptr = gp2x_screens[++screensel&1];
+}
+
+static void gp2x_video_changemode_ll_(int bpp)
+{
+printf("changemode %d\n", bpp);
+ memregs[0x28DA>>1] = (((bpp+1)/8)<<9)|0xAB; /*8/15/16/24bpp...*/
+ memregs[0x290C>>1] = 320*((bpp+1)/8); /*line width in bytes*/
+}
+
+static void gp2x_video_setpalette_(int *pal, int len)
+{
+ unsigned short *g = (unsigned short *)pal;
+ volatile unsigned short *memreg = &memregs[0x295A>>1];
+
+ memregs[0x2958>>1] = 0;
+
+ len *= 2;
+ while (len--)
+ *memreg = *g++;
+}
+
+static void gp2x_video_RGB_setscaling_(int ln_offs, int W, int H)
+{
+ float escalaw, escalah;
+ int bpp = (memregs[0x28DA>>1]>>9)&0x3;
+ unsigned short scalw;
+
+ // set offset
+ gp2x_screenaddrs_use[0] = gp2x_screenaddrs[0] + ln_offs * 320 * bpp;
+ gp2x_screenaddrs_use[1] = gp2x_screenaddrs[1] + ln_offs * 320 * bpp;
+ gp2x_screenaddrs_use[2] = gp2x_screenaddrs[2] + ln_offs * 320 * bpp;
+ gp2x_screenaddrs_use[3] = gp2x_screenaddrs[3] + ln_offs * 320 * bpp;
+
+ escalaw = 1024.0; // RGB Horiz LCD
+ escalah = 320.0; // RGB Vert LCD
+
+ if (memregs[0x2800>>1]&0x100) //TV-Out
+ {
+ escalaw=489.0; // RGB Horiz TV (PAL, NTSC)
+ if (memregs[0x2818>>1] == 287) //PAL
+ escalah=274.0; // RGB Vert TV PAL
+ else if (memregs[0x2818>>1] == 239) //NTSC
+ escalah=331.0; // RGB Vert TV NTSC
+ }
+
+ // scale horizontal
+ scalw = (unsigned short)((float)escalaw *(W/320.0));
+ /* if there is no horizontal scaling, vertical doesn't work.
+ * Here is a nasty wrokaround... */
+ if (H != 240 && W == 320) scalw--;
+ memregs[0x2906>>1]=scalw;
+ // scale vertical
+ memregl[0x2908>>2]=(unsigned long)((float)escalah *bpp *(H/240.0));
+}
+
+static void gp2x_video_wait_vsync_(void)
+{
+ unsigned short v = memregs[0x1182>>1];
+ while (!((v ^ memregs[0x1182>>1]) & 0x10))
+ spend_cycles(1024);
+}
+
+
+void vid_mmsp2_init(void)
+{
+ int i;
+
+ gp2x_screens[0] = mmap(0, FRAMEBUFF_WHOLESIZE, PROT_WRITE, MAP_SHARED,
+ memdev, gp2x_screenaddrs[0]);
+ if (gp2x_screens[0] == MAP_FAILED)
+ {
+ perror("mmap(g_screen_ptr)");
+ exit(1);
+ }
+ printf("framebuffers:\n");
+ printf(" %08x -> %p\n", gp2x_screenaddrs[0], gp2x_screens[0]);
+ for (i = 1; i < 4; i++)
+ {
+ gp2x_screens[i] = (char *) gp2x_screens[i - 1] + FRAMEBUFF_SIZE;
+ printf(" %08x -> %p\n", gp2x_screenaddrs[i], gp2x_screens[i]);
+ }
+
+ g_screen_ptr = gp2x_screens[0];
+ screensel = 0;
+
+ gp2x_screenaddr_old[0] = memregs[0x290E>>1];
+ gp2x_screenaddr_old[1] = memregs[0x2910>>1];
+ gp2x_screenaddr_old[2] = memregs[0x2912>>1];
+ gp2x_screenaddr_old[3] = memregs[0x2914>>1];
+
+ memcpy(gp2x_screenaddrs_use, gp2x_screenaddrs, sizeof(gp2x_screenaddrs));
+
+ gp2x_video_flip = gp2x_video_flip_;
+ gp2x_video_flip2 = gp2x_video_flip2_;
+ gp2x_video_changemode_ll = gp2x_video_changemode_ll_;
+ gp2x_video_setpalette = gp2x_video_setpalette_;
+ gp2x_video_RGB_setscaling = gp2x_video_RGB_setscaling_;
+ gp2x_video_wait_vsync = gp2x_video_wait_vsync_;
+}
+
+void vid_mmsp2_finish(void)
+{
+ gp2x_video_RGB_setscaling_(0, 320, 240);
+ gp2x_video_changemode_ll_(16);
+
+ memregs[0x290E>>1] = gp2x_screenaddr_old[0];
+ memregs[0x2910>>1] = gp2x_screenaddr_old[1];
+ memregs[0x2912>>1] = gp2x_screenaddr_old[2];
+ memregs[0x2914>>1] = gp2x_screenaddr_old[3];
+
+ munmap(gp2x_screens[0], FRAMEBUFF_WHOLESIZE);
+}
--- /dev/null
+/*
+ * (C) GraÅžvydas "notaz" Ignotas, 2009,2013
+ *
+ * This work is licensed under the terms of any of these licenses
+ * (at your option):
+ * - GNU GPL, version 2 or later.
+ * - GNU LGPL, version 2.1 or later.
+ * - MAME license.
+ * See the COPYING file in the top-level directory.
+ *
+ * <random_info=mem_map>
+ * 00000000-029fffff linux (42MB)
+ * 02a00000-02dfffff fb (4MB, 153600B really used)
+ * 02e00000-02ffffff sound dma (2MB)
+ * 03000000-03ffffff MPEGDEC (?, 16MB)
+ * </random_info>
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include <sys/mman.h>
+#include <linux/fb.h>
+#include <unistd.h>
+
+#include "../libpicofe/gp2x/soc.h"
+#include "../libpicofe/gp2x/plat_gp2x.h"
+#include "../libpicofe/gp2x/pollux_set.h"
+#include "../common/emu.h"
+#include "../common/arm_utils.h"
+#include "plat.h"
+
+#define fb_buf_count 4
+static unsigned int fb_paddr[fb_buf_count];
+static int fb_work_buf;
+static int fbdev = -1;
+
+static unsigned short memtimex_old[2];
+static int last_pal_setting = 0;
+
+
+/* misc */
+static void pollux_set_fromenv(const char *env_var)
+{
+ const char *set_string;
+ set_string = getenv(env_var);
+ if (set_string)
+ pollux_set(memregs, set_string);
+ else
+ printf("env var %s not defined.\n", env_var);
+}
+
+/* video stuff */
+static void pollux_video_flip(int buf_count)
+{
+ memregl[0x406C>>2] = fb_paddr[fb_work_buf];
+ memregl[0x4058>>2] |= 0x10;
+ fb_work_buf++;
+ if (fb_work_buf >= buf_count)
+ fb_work_buf = 0;
+ g_screen_ptr = gp2x_screens[fb_work_buf];
+}
+
+static void gp2x_video_flip_(void)
+{
+ pollux_video_flip(fb_buf_count);
+}
+
+/* doulblebuffered flip */
+static void gp2x_video_flip2_(void)
+{
+ pollux_video_flip(2);
+}
+
+static void gp2x_video_changemode_ll_(int bpp)
+{
+ static int prev_bpp = 0;
+ int code = 0, bytes = 2;
+ int rot_cmd[2] = { 0, 0 };
+ unsigned int r;
+ char buff[32];
+ int ret;
+
+ if (bpp == prev_bpp)
+ return;
+ prev_bpp = bpp;
+
+ printf("changemode: %dbpp rot=%d\n", abs(bpp), bpp < 0);
+
+ /* negative bpp means rotated mode */
+ rot_cmd[0] = (bpp < 0) ? 6 : 5;
+ ret = ioctl(fbdev, _IOW('D', 90, int[2]), rot_cmd);
+ if (ret < 0)
+ perror("rot ioctl failed");
+ memregl[0x4004>>2] = (bpp < 0) ? 0x013f00ef : 0x00ef013f;
+ memregl[0x4000>>2] |= 1 << 3;
+
+ /* the above ioctl resets LCD timings, so set them here */
+ snprintf(buff, sizeof(buff), "POLLUX_LCD_TIMINGS_%s", last_pal_setting ? "PAL" : "NTSC");
+ pollux_set_fromenv(buff);
+
+ switch (abs(bpp))
+ {
+ case 8:
+ code = 0x443a;
+ bytes = 1;
+ break;
+
+ case 15:
+ case 16:
+ code = 0x4432;
+ bytes = 2;
+ break;
+
+ default:
+ printf("unhandled bpp request: %d\n", abs(bpp));
+ return;
+ }
+
+ memregl[0x405c>>2] = bytes;
+ memregl[0x4060>>2] = bytes * (bpp < 0 ? 240 : 320);
+
+ r = memregl[0x4058>>2];
+ r = (r & 0xffff) | (code << 16) | 0x10;
+ memregl[0x4058>>2] = r;
+}
+
+static void gp2x_video_setpalette_(int *pal, int len)
+{
+ /* pollux palette is 16bpp only.. */
+ int i;
+ for (i = 0; i < len; i++)
+ {
+ int c = pal[i];
+ c = ((c >> 8) & 0xf800) | ((c >> 5) & 0x07c0) | ((c >> 3) & 0x001f);
+ memregl[0x4070>>2] = (i << 24) | c;
+ }
+}
+
+static void gp2x_video_RGB_setscaling_(int ln_offs, int W, int H)
+{
+ /* maybe a job for 3d hardware? */
+}
+
+static void gp2x_video_wait_vsync_(void)
+{
+ while (!(memregl[0x308c>>2] & (1 << 10)))
+ spend_cycles(128);
+ memregl[0x308c>>2] |= 1 << 10;
+}
+
+/* RAM timings */
+static void set_ram_timings_(void)
+{
+ pollux_set_fromenv("POLLUX_RAM_TIMINGS");
+}
+
+static void unset_ram_timings_(void)
+{
+ int i;
+
+ memregs[0x14802>>1] = memtimex_old[0];
+ memregs[0x14804>>1] = memtimex_old[1] | 0x8000;
+
+ for (i = 0; i < 0x100000; i++)
+ if (!(memregs[0x14804>>1] & 0x8000))
+ break;
+
+ printf("RAM timings reset to startup values.\n");
+}
+
+void vid_pollux_init(void)
+{
+ struct fb_fix_screeninfo fbfix;
+ int i, ret;
+
+ fbdev = open("/dev/fb0", O_RDWR);
+ if (fbdev < 0) {
+ perror("can't open fbdev");
+ exit(1);
+ }
+
+ ret = ioctl(fbdev, FBIOGET_FSCREENINFO, &fbfix);
+ if (ret == -1) {
+ perror("ioctl(fbdev) failed");
+ exit(1);
+ }
+
+ printf("framebuffer: \"%s\" @ %08lx\n", fbfix.id, fbfix.smem_start);
+ fb_paddr[0] = fbfix.smem_start;
+
+ gp2x_screens[0] = mmap(0, 320*240*2*fb_buf_count, PROT_READ|PROT_WRITE,
+ MAP_SHARED, memdev, fb_paddr[0]);
+ if (gp2x_screens[0] == MAP_FAILED)
+ {
+ perror("mmap(gp2x_screens) failed");
+ exit(1);
+ }
+ memset(gp2x_screens[0], 0, 320*240*2*fb_buf_count);
+
+ printf(" %p -> %08x\n", gp2x_screens[0], fb_paddr[0]);
+ for (i = 1; i < fb_buf_count; i++)
+ {
+ fb_paddr[i] = fb_paddr[i-1] + 320*240*2;
+ gp2x_screens[i] = (char *)gp2x_screens[i-1] + 320*240*2;
+ printf(" %p -> %08x\n", gp2x_screens[i], fb_paddr[i]);
+ }
+ fb_work_buf = 0;
+ g_screen_ptr = gp2x_screens[0];
+
+ set_ram_timings_();
+
+ gp2x_video_flip = gp2x_video_flip_;
+ gp2x_video_flip2 = gp2x_video_flip2_;
+ gp2x_video_changemode_ll = gp2x_video_changemode_ll_;
+ gp2x_video_setpalette = gp2x_video_setpalette_;
+ gp2x_video_RGB_setscaling = gp2x_video_RGB_setscaling_;
+ gp2x_video_wait_vsync = gp2x_video_wait_vsync_;
+}
+
+void vid_pollux_finish(void)
+{
+ munmap(gp2x_screens[0], 320*240*2 * fb_buf_count);
+ close(fbdev);
+ fbdev = -1;
+
+ unset_ram_timings_();
+}
-Subproject commit cab9194354b6340b4bf0c5154fecc4018a4f2a33
+Subproject commit 9089665ca1260c338c4239583f59de981bc80c1c
{
static const struct retro_variable vars[] = {
//{ "region", "Region; Auto|NTSC|PAL" },
+ { "picodrive_input1", "Input device 1; 3 button pad|6 button pad|None" },
+ { "picodrive_input2", "Input device 2; 3 button pad|6 button pad|None" },
+#ifdef DRC_SH2
+ { "picodrive_drc", "Dynamic recompilers; enabled|disabled" },
+#endif
{ NULL, NULL },
};
enum retro_pixel_format fmt = RETRO_PIXEL_FORMAT_RGB565;
if (!environ_cb(RETRO_ENVIRONMENT_SET_PIXEL_FORMAT, &fmt)) {
- lprintf("RGB565 suppot required, sorry\n");
+ lprintf("RGB565 support required, sorry\n");
return false;
}
audio_batch_cb(PsndOut, len / 4);
}
+static enum input_device input_name_to_val(const char *name)
+{
+ if (strcmp(name, "3 button pad") == 0)
+ return PICO_INPUT_PAD_3BTN;
+ if (strcmp(name, "6 button pad") == 0)
+ return PICO_INPUT_PAD_6BTN;
+ if (strcmp(name, "None") == 0)
+ return PICO_INPUT_NOTHING;
+
+ lprintf("invalid picodrive_input: '%s'\n", name);
+ return PICO_INPUT_PAD_3BTN;
+}
+
+static void update_variables(void)
+{
+ struct retro_variable var;
+
+ var.value = NULL;
+ var.key = "picodrive_input1";
+ if (environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var) && var.value)
+ PicoSetInputDevice(0, input_name_to_val(var.value));
+
+ var.value = NULL;
+ var.key = "picodrive_input2";
+ if (environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var) && var.value)
+ PicoSetInputDevice(1, input_name_to_val(var.value));
+
+#ifdef DRC_SH2
+ var.value = NULL;
+ var.key = "picodrive_drc";
+ if (environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var) && var.value) {
+ if (strcmp(var.value, "enabled") == 0)
+ PicoOpt |= POPT_EN_DRC;
+ else
+ PicoOpt &= ~POPT_EN_DRC;
+ }
+#endif
+}
+
void retro_run(void)
{
bool updated = false;
int pad, i;
if (environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE_UPDATE, &updated) && updated)
- ; //update_variables(true);
+ update_variables();
input_poll_cb();
//PicoMessage = plat_status_msg_busy_next;
PicoMCDopenTray = disk_tray_open;
PicoMCDcloseTray = disk_tray_close;
+
+ update_variables();
}
void retro_deinit(void)
mee_range_hide("layer_w", MA_OPT3_LAYER_W, g_layer_cw, 160, 800), \
mee_range_hide("layer_h", MA_OPT3_LAYER_H, g_layer_ch, 60, 480), \
-#define MENU_OPTIONS_ADV \
- mee_onoff ("SVP dynarec", MA_OPT2_SVP_DYNAREC, PicoOpt, POPT_EN_SVP_DRC), \
- mee_onoff ("Status line in main menu", MA_OPT2_STATUS_LINE, currentConfig.EmuOpt, EOPT_SHOW_RTC),
-
-#define menu_main_plat_draw NULL
+#define MENU_OPTIONS_ADV
static menu_entry e_menu_gfx_options[];
static menu_entry e_menu_options[];
void pnd_menu_init(void)
{
- int i;
-
- i = me_id2offset(e_menu_options, MA_OPT_CPU_CLOCKS);
- e_menu_options[i].name = "Max CPU clock";
-
me_enable(e_menu_keyconfig, MA_CTRL_DEADZONE, 0);
}
{ KEY_S, IN_BINDTYPE_PLAYER12, GBTN_B },\r
{ KEY_D, IN_BINDTYPE_PLAYER12, GBTN_C },\r
{ KEY_ENTER, IN_BINDTYPE_PLAYER12, GBTN_START },\r
- { KEY_BACKSLASH, IN_BINDTYPE_EMU, PEVB_MENU },\r
+ { KEY_F, IN_BINDTYPE_EMU, PEVB_FF },\r
+ { KEY_BACKSPACE,IN_BINDTYPE_EMU, PEVB_FF },\r
+ { KEY_BACKSLASH,IN_BINDTYPE_EMU, PEVB_MENU },\r
{ KEY_SPACE, IN_BINDTYPE_EMU, PEVB_MENU },\r
- /* Pandora */\r
+ { KEY_LEFTCTRL, IN_BINDTYPE_EMU, PEVB_MENU },\r
{ KEY_HOME, IN_BINDTYPE_PLAYER12, GBTN_A },\r
{ KEY_PAGEDOWN, IN_BINDTYPE_PLAYER12, GBTN_B },\r
{ KEY_END, IN_BINDTYPE_PLAYER12, GBTN_C },\r
{ KEY_LEFTALT, IN_BINDTYPE_PLAYER12, GBTN_START },\r
- { KEY_RIGHTSHIFT,IN_BINDTYPE_EMU, PEVB_STATE_SAVE },\r
- { KEY_RIGHTCTRL, IN_BINDTYPE_EMU, PEVB_STATE_LOAD },\r
- { KEY_LEFTCTRL, IN_BINDTYPE_EMU, PEVB_MENU },\r
+ { KEY_1, IN_BINDTYPE_EMU, PEVB_STATE_SAVE },\r
+ { KEY_2, IN_BINDTYPE_EMU, PEVB_STATE_LOAD },\r
+ { KEY_3, IN_BINDTYPE_EMU, PEVB_SSLOT_PREV },\r
+ { KEY_4, IN_BINDTYPE_EMU, PEVB_SSLOT_NEXT },\r
+ { KEY_5, IN_BINDTYPE_EMU, PEVB_PICO_PPREV },\r
+ { KEY_6, IN_BINDTYPE_EMU, PEVB_PICO_PNEXT },\r
+ { KEY_7, IN_BINDTYPE_EMU, PEVB_PICO_SWINP },\r
{ 0, 0, 0 }\r
};\r
\r
int i, h;\r
\r
len++;\r
+ if (x + len > g_screen_width)\r
+ len = g_screen_width - x;\r
+\r
for (h = 0; h < 8; h++) {\r
unsigned short *p;\r
p = (unsigned short *)g_screen_ptr + x + g_screen_width*(y + h);\r
- for (i = len; i; i--, p++)\r
+ for (i = len; i > 0; i--, p++)\r
*p = (*p>>2) & 0x39e7;\r
}\r
emu_text_out16(x, y, text);\r
\r
pnd_setup_layer(1, g_layer_x, g_layer_y, g_layer_w, g_layer_h);\r
vout_fbdev_clear(layer_fb);\r
- vout_fbdev_resize(layer_fb, fb_w, fb_h, 16, fb_left, fb_right, fb_top, fb_bottom, 3);\r
+ vout_fbdev_resize(layer_fb, fb_w, fb_h, 16, fb_left, fb_right, fb_top, fb_bottom, 4);\r
plat_video_flip();\r
\r
PicoDrawSetOutFormat(PDF_RGB555, 0);\r
g_menuscreen_ptr = vout_fbdev_flip(main_fb);\r
\r
w = 320; h = 240;\r
- layer_fb = vout_fbdev_init(layer_fb_name, &w, &h, 16, 3);\r
+ layer_fb = vout_fbdev_init(layer_fb_name, &w, &h, 16, 4);\r
if (layer_fb == NULL) {\r
fprintf(stderr, "couldn't init fb: %s\n", layer_fb_name);\r
goto fail0;\r
void pemu_prep_defconfig(void)
{
memset(&defaultConfig, 0, sizeof(defaultConfig));
- defaultConfig.s_PicoOpt|= POPT_6BTN_PAD; // for xmen proto
defaultConfig.s_PicoCDBuffers = 0;
defaultConfig.Frameskip = 0;
}
notaz.gp2x.de / picodrive.git / commitdiff