LD = $(CROSS)ld
OBJCOPY = $(CROSS)objcopy
+CROSS_SH = sh-elf-
+CC_SH = $(CROSS_SH)gcc
+LD_SH = $(CROSS_SH)ld
+OBJCOPY_SH = $(CROSS_SH)objcopy
+
ASFLAGS += -m68000 --register-prefix-optional --bitwise-or -pic
ASFLAGS_CC += -Wa,-m68000 -Wa,--register-prefix-optional -Wa,--bitwise-or -Wa,-pic
CFLAGS += -Wall -g -O2 -m68000 -fomit-frame-pointer
$(LD) -o $@ -Tsega.ld -Map $(TARGET).map $^ $(LDLIBS)
clean:
- $(RM) $(TARGET).bin $(OBJS) $(TARGET).elf $(TARGET).map fill
- $(RM) *.lst *.bin80
+ $(RM) $(TARGET).bin $(OBJS) *.elf *.map fill
+ $(RM) *.lst *.bin80 *.osh *.binsh
$(TARGET).bin: $(TARGET).elf fill
$(OBJCOPY) -I elf32-m68k -O binary $< $@
%.bin80: %.s80
sjasm $< $@
+# sh2
+TARGET_SH = sh2_test
+OBJS_SH = sh2_test.osh sh2_main.osh
+
+CFLAGS_SH = -m2 -mb -O2 -Wall
+
+%.binsh: %.elf
+ $(OBJCOPY_SH) -O binary $< $@
+
+$(TARGET_SH).elf: $(OBJS_SH)
+ $(LD_SH) -o $@ $^ -Tmars.ld -Map $(TARGET_SH).map -nostdlib
+
+%.osh: %.sh2
+ $(CC_SH) -o $@ -c -x assembler $< $(CFLAGS_SH)
+
+%.osh: %.c
+ $(CC_SH) -o $@ -c $< $(CFLAGS_SH)
+
# manual deps
data.o: z80_test.bin80
+sega_gcc.o: sh2_test.binsh
+
+up: $(TARGET).bin
+ scp $< root@router:/tmp/
.PHONY: all clean
move.l d4, (a2)+ /* *ram++ = count */
movem.l (sp)+, d2-d7/a2
- rts
+ rts
.global test_hint
test_hint:
.global test_vint_end
test_vint_end:
+.global x32x_enable
+x32x_enable:
+ movea.l #0xa15100, a0
+ movea.l #0xa15120, a1
+ move.w #3, (a0) /* ADEN, nRES */
+0:
+ nop
+ nop
+ tst.w (a1)
+ beq 0b /* BIOS busy */
+ or.w #1, 6(a0) /* RV */
+ rts
+.global x32x_enable_end
+x32x_enable_end:
+
# some nastyness from Fatal Rewind
.global test_h_v_2
test_h_v_2:
test_lb_s d4, a0
test_lb_s d5, a0
movem.l (sp)+, d2-d7/a2
- rts
+ rts
.global test_hb
test_hb:
test_lb_s d6, a1
test_lb_s d7, a1
movem.l (sp)+, d2-d7
- rts
+ rts
# vim:filetype=asmM68k:ts=4:sw=4:expandtab
extern const char test_vint_end[];
extern const char test_f_vint[];
extern const char test_f_vint_end[];
+extern const char x32x_enable[];
+extern const char x32x_enable_end[];
--- /dev/null
+#define u8 unsigned char
+#define u16 unsigned short
+#define u32 unsigned int
+
+#define noinline __attribute__((noinline))
+#define unused __attribute__((unused))
+#define _packed __attribute__((packed))
+
+#define mem_barrier() \
+ asm volatile("":::"memory")
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
+
+#define MKLONG(a, b, c, d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
+
+#define read8(a) \
+ *((volatile u8 *) (a))
+#define read16(a) \
+ *((volatile u16 *) (a))
+#define read32(a) \
+ *((volatile u32 *) (a))
+#define write8(a, d) \
+ *((volatile u8 *) (a)) = (d)
+#define write16(a, d) \
+ *((volatile u16 *) (a)) = (d)
+#define write32(a, d) \
+ *((volatile u32 *) (a)) = (d)
+
+enum x32x_cmd {
+ CMD_ECHO = 1,
+};
+
+// vim:ts=4:sw=4:expandtab
*/
#include <stdlib.h>
#include <stdarg.h>
-
-#define u8 unsigned char
-#define u16 unsigned short
-#define u32 unsigned int
-
-#define noinline __attribute__((noinline))
-#define unused __attribute__((unused))
-#define _packed __attribute__((packed))
-
-#define mem_barrier() \
- asm volatile("":::"memory")
-
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
-
+#include "common.h"
#include "asmtools.h"
#define VDP_DATA_PORT 0xC00000
#define APLANE (TILE_MEM_END + 0x1000)
#define BPLANE (TILE_MEM_END + 0x3000)
-#define read8(a) \
- *((volatile u8 *) (a))
-#define read16(a) \
- *((volatile u16 *) (a))
-#define read32(a) \
- *((volatile u32 *) (a))
-#define write8(a, d) \
- *((volatile u8 *) (a)) = (d)
-#define write16(a, d) \
- *((volatile u16 *) (a)) = (d)
-#define write32(a, d) \
- *((volatile u32 *) (a)) = (d)
-
#define write16_z80le(a, d) \
((volatile u8 *)(a))[0] = (u8)(d), \
((volatile u8 *)(a))[1] = ((d) >> 8)
};
} _packed;
-int xtttt(void) { return sizeof(struct exc_frame); }
-
void exception(const struct exc_frame *f)
{
int i;
return ok;
}
+// 32X
+
+static int t_32x_init(void)
+{
+ void (*do_32x_enable)(void) = (void *)0xff0040;
+ u32 M_OK = MKLONG('M','_','O','K');
+ u32 S_OK = MKLONG('S','_','O','K');
+ u32 *r = (u32 *)0xa15100;
+ u16 *r16 = (u16 *)r;
+ int ok = 1;
+
+ expect(ok, r16[0x00/2], 0x82);
+ expect(ok, r16[0x02/2], 0);
+ expect(ok, r16[0x04/2], 0);
+ expect(ok, r16[0x06/2], 0);
+ expect(ok, r[0x14/4], 0);
+ expect(ok, r[0x18/4], 0);
+ expect(ok, r[0x1c/4], 0);
+ write32(&r[0x20/4], 0); // master resp
+ write32(&r[0x24/4], 0); // slave resp
+
+ // could just set RV, but BIOS reads ROM, so can't
+ memcpy_(do_32x_enable, x32x_enable,
+ x32x_enable_end - x32x_enable);
+ do_32x_enable();
+
+ expect(ok, r16[0x00/2], 0x83);
+ expect(ok, r16[0x02/2], 0);
+ expect(ok, r16[0x04/2], 0);
+ expect(ok, r16[0x06/2], 1); // RV
+ expect(ok, r[0x14/4], 0);
+ expect(ok, r[0x18/4], 0);
+ expect(ok, r[0x1c/4], 0);
+ expect(ok, r[0x20/4], M_OK);
+ while (!read16(&r16[0x24/2]))
+ ;
+ expect(ok, r[0x24/4], S_OK);
+ return ok;
+}
+
+static void x32_cmd(enum x32x_cmd cmd, u16 is_slave)
+{
+ u16 v, *r = (u16 *)0xa15120;
+ u16 cmd_s = cmd | (is_slave << 15);
+ write16(r, cmd_s);
+ mem_barrier();
+ while ((v = read16(r)) == cmd_s)
+ burn10(1);
+ if (v != 0)
+ printf("cmd clr: %x\n", v);
+}
+
+static int t_32x_echo(void)
+{
+ u16 *r = (u16 *)0xa15120;
+ int ok = 1;
+
+ write16(&r[0x02/2], 0x1234);
+ x32_cmd(CMD_ECHO, 0);
+ expect(ok, r[0x04/2], 0x1234);
+ write16(&r[0x02/2], 0x2345);
+ // mysteriously broken (random hangs)
+ //x32_cmd(CMD_ECHO, 1);
+ //expect(ok, r[0x04/2], 0x8345);
+ return ok;
+}
+
+static int t_32x_md_rom(void)
+{
+ u32 *rl = (u32 *)0;
+ int ok = 1;
+
+ expect(ok, rl[0x004/4], 0x880200);
+ expect(ok, rl[0x100/4], 0x53454741);
+ expect(ok, rl[0x70/4], 0);
+ write32(&rl[0x70/4], ~0);
+ write32(&rl[0x78/4], ~0);
+ mem_barrier();
+ expect(ok, rl[0x70/4], ~0);
+ expect(ok, rl[0x78/4], 0x8802ae);
+ // not tested: with RV 0x880000/0x900000 hangs
+ return ok;
+}
+
+enum {
+ T_MD = 0,
+ T_32 = 1, // 32X
+};
+
static const struct {
+ u8 type;
int (*test)(void);
const char *name;
} g_tests[] = {
- { t_dma_zero_wrap, "dma zero len + wrap" },
- { t_dma_zero_fill, "dma zero len + fill" },
- { t_dma_ram_wrap, "dma ram wrap" },
- { t_dma_multi, "dma multi" },
- { t_dma_cram_wrap, "dma cram wrap" },
- { t_dma_vsram_wrap, "dma vsram wrap" },
- { t_dma_and_data, "dma and data" },
- { t_dma_short_cmd, "dma short cmd" },
- { t_dma_fill3_odd, "dma fill3 odd" },
- { t_dma_fill3_even, "dma fill3 even" },
+#if 0
+ { T_MD, t_dma_zero_wrap, "dma zero len + wrap" },
+ { T_MD, t_dma_zero_fill, "dma zero len + fill" },
+ { T_MD, t_dma_ram_wrap, "dma ram wrap" },
+ { T_MD, t_dma_multi, "dma multi" },
+ { T_MD, t_dma_cram_wrap, "dma cram wrap" },
+ { T_MD, t_dma_vsram_wrap, "dma vsram wrap" },
+ { T_MD, t_dma_and_data, "dma and data" },
+ { T_MD, t_dma_short_cmd, "dma short cmd" },
+ { T_MD, t_dma_fill3_odd, "dma fill3 odd" },
+ { T_MD, t_dma_fill3_even, "dma fill3 even" },
#ifndef PICO // later
- { t_dma_fill3_vsram, "dma fill3 vsram" },
+ { T_MD, t_dma_fill3_vsram, "dma fill3 vsram" },
#endif
- { t_dma_fill_dis, "dma fill disabled" },
- { t_dma_fill_src, "dma fill src incr" },
- { t_dma_128k, "dma 128k mode" },
- { t_vdp_128k_b16, "vdp 128k addr bit16" },
+ { T_MD, t_dma_fill_dis, "dma fill disabled" },
+ { T_MD, t_dma_fill_src, "dma fill src incr" },
+ { T_MD, t_dma_128k, "dma 128k mode" },
+ { T_MD, t_vdp_128k_b16, "vdp 128k addr bit16" },
// { t_vdp_128k_b16_inc, "vdp 128k bit16 inc" }, // mystery
- { t_vdp_reg_cmd, "vdp reg w cmd reset" },
- { t_vdp_sr_vb, "vdp status reg vb" },
- { t_z80mem_long_mirror, "z80 ram long mirror" },
- { t_z80mem_noreq_w, "z80 ram noreq write" },
- { t_z80mem_vdp_r, "z80 vdp read" },
+ { T_MD, t_vdp_reg_cmd, "vdp reg w cmd reset" },
+ { T_MD, t_vdp_sr_vb, "vdp status reg vb" },
+ { T_MD, t_z80mem_long_mirror, "z80 ram long mirror" },
+ { T_MD, t_z80mem_noreq_w, "z80 ram noreq write" },
+ { T_MD, t_z80mem_vdp_r, "z80 vdp read" },
// { t_z80mem_vdp_w, "z80 vdp write" }, // hang
- { t_tim_loop, "time loop" },
- { t_tim_z80_ram, "time z80 ram" },
- { t_tim_z80_ym, "time z80 ym2612" },
- { t_tim_z80_vdp, "time z80 vdp" },
- { t_tim_z80_bank_rom, "time z80 bank rom" },
- { t_tim_vcnt, "time V counter" },
- { t_tim_hblank_h40, "time hblank h40" },
- { t_tim_hblank_h32, "time hblank h32" },
- { t_tim_vdp_as_vram_w, "time vdp vram w" },
- { t_tim_vdp_as_cram_w, "time vdp cram w" },
- { t_irq_hint, "irq4 / line" },
- { t_irq_ack_v_h, "irq ack v-h" },
- { t_irq_ack_v_h_2, "irq ack v-h 2" },
- { t_irq_ack_h_v, "irq ack h-v" },
- { t_irq_ack_h_v_2, "irq ack h-v 2" },
- { t_irq_f_flag_h40, "irq f flag h40" },
- { t_irq_f_flag_h32, "irq f flag h32" },
+ { T_MD, t_tim_loop, "time loop" },
+ { T_MD, t_tim_z80_ram, "time z80 ram" },
+ { T_MD, t_tim_z80_ym, "time z80 ym2612" },
+ { T_MD, t_tim_z80_vdp, "time z80 vdp" },
+ { T_MD, t_tim_z80_bank_rom, "time z80 bank rom" },
+ { T_MD, t_tim_vcnt, "time V counter" },
+ { T_MD, t_tim_hblank_h40, "time hblank h40" },
+ { T_MD, t_tim_hblank_h32, "time hblank h32" },
+ { T_MD, t_tim_vdp_as_vram_w, "time vdp vram w" },
+ { T_MD, t_tim_vdp_as_cram_w, "time vdp cram w" },
+ { T_MD, t_irq_hint, "irq4 / line" },
+ { T_MD, t_irq_ack_v_h, "irq ack v-h" },
+ { T_MD, t_irq_ack_v_h_2, "irq ack v-h 2" },
+ { T_MD, t_irq_ack_h_v, "irq ack h-v" },
+ { T_MD, t_irq_ack_h_v_2, "irq ack h-v 2" },
+ { T_MD, t_irq_f_flag_h40, "irq f flag h40" },
+#endif
+ { T_MD, t_irq_f_flag_h32, "irq f flag h32" },
+
+ // the first one enables 32X, so should be kept
+ { T_32, t_32x_init, "32x init" },
+ { T_32, t_32x_echo, "32x echo" },
+ { T_32, t_32x_md_rom, "32x rom" },
};
static void setup_z80(void)
int main()
{
int passed = 0;
+ int skipped = 0;
+ int have_32x;
int ret;
u8 v8;
int i;
VDP_setReg(VDP_MODE2, VDP_MODE2_MD | VDP_MODE2_DMA | VDP_MODE2_DISP);
+ have_32x = read32(0xa130ec) == MKLONG('M','A','R','S');
v8 = read8(0xa10001);
- printf("MD version: %02x %s %s\n", v8,
+ printf("MD version: %02x %s %s %s\n", v8,
(v8 & 0x80) ? "world" : "jap",
- (v8 & 0x40) ? "pal" : "ntsc");
+ (v8 & 0x40) ? "pal" : "ntsc",
+ have_32x ? "32X" : "");
for (i = 0; i < ARRAY_SIZE(g_tests); i++) {
// print test number if we haven't scrolled away
printf_ypos = old_ypos;
printf_xpos = 0;
}
+ if ((g_tests[i].type & T_32) && !have_32x) {
+ skipped++;
+ continue;
+ }
ret = g_tests[i].test();
if (ret != 1) {
text_pal = 2;
}
text_pal = 0;
- printf("%d/%d passed.\n", passed, ARRAY_SIZE(g_tests));
+ printf("%d/%d passed, %d skipped.\n",
+ passed, ARRAY_SIZE(g_tests), skipped);
printf_ypos = 0;
printf(" ");
--- /dev/null
+OUTPUT_ARCH(sh)
+EXTERN (_start)
+ENTRY (_start)
+__DYNAMIC = 0;
+
+/*
+ * The memory map look like this:
+ * +--------------------+ <- 0x06000000
+ * | .text |
+ * | |
+ * | __text_end |
+ * +--------------------+
+ * . .
+ * . .
+ * . .
+ * +--------------------+
+ * | .data | initialized data goes here
+ * | |
+ * | __data_end |
+ * +--------------------+
+ * | .bss |
+ * | __bss_start | start of bss, cleared by crt0
+ * | |
+ * | __bss__end | start of heap, used by sbrk()
+ * +--------------------+
+ * . .
+ * . .
+ * . .
+ * | __stack | top of stack (for Master SH2)
+ * +--------------------+ <- 0x0603FC00
+ */
+
+MEMORY
+{
+ rom (rx) : ORIGIN = 0x02000000, LENGTH = 0x00400000
+ ram (wx) : ORIGIN = 0x06000000, LENGTH = 0x0003FC00
+}
+
+/*
+ * Allocate the stack to be at the top of memory, since the stack
+ * grows down
+ */
+
+PROVIDE (__stack = 0x0603FC00);
+
+SECTIONS
+{
+/* .text 0x02000000 : */
+ .text 0x06000000 :
+ AT ( 0x00000000 )
+ {
+ __text_start = .;
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t.*)
+
+ . = ALIGN(16);
+ __INIT_SECTION__ = .;
+ KEEP (*(.init))
+ SHORT (0x000B) /* rts */
+ SHORT (0x0009) /* nop */
+ . = ALIGN(16);
+ __FINI_SECTION__ = .;
+ KEEP (*(.fini))
+ SHORT (0x000B) /* rts */
+ SHORT (0x0009) /* nop */
+
+ *(.eh_frame_hdr)
+ KEEP (*(.eh_frame))
+ *(.gcc_except_table)
+ KEEP (*(.jcr))
+
+ . = ALIGN(16);
+ __CTOR_LIST__ = .;
+ ___CTOR_LIST__ = .;
+ LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ LONG(0)
+ __CTOR_END__ = .;
+
+ . = ALIGN(16);
+ __DTOR_LIST__ = .;
+ ___DTOR_LIST__ = .;
+ LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ LONG(0)
+ __DTOR_END__ = .;
+
+ *(.rdata)
+ *(.rodata)
+ *(.rodata.*)
+ *(.gnu.linkonce.r.*)
+ . = ALIGN(16);
+ __text_end = .;
+/*
+ } > rom
+ __text_size = __text_end - __text_start;
+
+ .data 0x06000000 :
+ AT ( LOADADDR (.text) + SIZEOF (.text) )
+ {
+*/
+ __data_start = .;
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+
+ *(.lit8)
+ *(.lit4)
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.s.*)
+ . = ALIGN(16);
+ __data_end = .;
+ } > ram
+ __data_size = __data_end - __data_start;
+
+ .bss :
+ {
+ __bss_start = .;
+ *(.bss)
+ *(.bss.*)
+ *(.gnu.linkonce.b.*)
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ *(.scommon)
+ *(COMMON)
+ . = ALIGN(16);
+ end = .;
+ _end = end;
+ __end = _end;
+ __bss_end = .;
+ } > ram
+ __bss_size = __bss_end - __bss_start;
+
+}
dc.l exc30, exc31, exc32, exc33, exc34, exc35, exc3e, exc37\r
dc.l exc38, exc39, exc3a, exc3b, exc3c, exc3d, exc3e, exc3f\r
\r
- .ascii "SEGA GENESIS "\r
+ .ascii "SEGA 32X "\r
.ascii "PD testsuite "\r
.ascii "PD testsuite "\r
.ascii "GM 00000000-00"\r
.byte 0x00,0x00\r
.ascii "J "\r
- dc.l 0x000000,0x3fffff\r
- dc.l 0xff0000,0xffffff\r
+ .long 0x000000,0x3fffff\r
+ .long 0xff0000,0xffffff\r
.ascii "RA"; .byte 0xf8,0x20 /* 1b0 */\r
- dc.l 0x200001,0x20ffff /* 1b4 */\r
+ .long 0x200001,0x20ffff /* 1b4 */\r
.ascii " " /* 1bc */\r
.ascii " " /* 1c0 */\r
.ascii " "\r
VBL:\r
exc_stub 1e\r
exc_stub 1f\r
+\r
+ /* MARS data */\r
+ .org 0x3c0\r
+ .ascii "PD testsuite "\r
+ .long 0 /* version? not used */\r
+ .long sh2_test /* ROM src */\r
+ .long 0 /* SDRAM dst */\r
+ .long sh2_test_end-sh2_test /* length */\r
+ .long 0x06000244 /* master entry */\r
+ .long 0x06000248 /* slave entry */\r
+ .long 0x06000000 /* master VBR */\r
+ .long 0x06000124 /* slave VBR */\r
+ /* Standard 32X startup code for MD side at 0x3F0 */\r
+ .org 0x3f0\r
+ .word 0x287C,0xFFFF,0xFFC0,0x23FC,0x0000,0x0000,0x00A1,0x5128\r
+ .word 0x46FC,0x2700,0x4BF9,0x00A1,0x0000,0x7001,0x0CAD,0x4D41\r
+ .word 0x5253,0x30EC,0x6600,0x03E6,0x082D,0x0007,0x5101,0x67F8\r
+ .word 0x4AAD,0x0008,0x6710,0x4A6D,0x000C,0x670A,0x082D,0x0000\r
+ .word 0x5101,0x6600,0x03B8,0x102D,0x0001,0x0200,0x000F,0x6706\r
+ .word 0x2B78,0x055A,0x4000,0x7200,0x2C41,0x4E66,0x41F9,0x0000\r
+ .word 0x04D4,0x6100,0x0152,0x6100,0x0176,0x47F9,0x0000,0x04E8\r
+ .word 0x43F9,0x00A0,0x0000,0x45F9,0x00C0,0x0011,0x3E3C,0x0100\r
+ .word 0x7000,0x3B47,0x1100,0x3B47,0x1200,0x012D,0x1100,0x66FA\r
+ .word 0x7425,0x12DB,0x51CA,0xFFFC,0x3B40,0x1200,0x3B40,0x1100\r
+ .word 0x3B47,0x1200,0x149B,0x149B,0x149B,0x149B,0x41F9,0x0000\r
+ .word 0x04C0,0x43F9,0x00FF,0x0000,0x22D8,0x22D8,0x22D8,0x22D8\r
+ .word 0x22D8,0x22D8,0x22D8,0x22D8,0x41F9,0x00FF,0x0000,0x4ED0\r
+ .word 0x1B7C,0x0001,0x5101,0x41F9,0x0000,0x06BC,0xD1FC,0x0088\r
+ .word 0x0000,0x4ED0,0x0404,0x303C,0x076C,0x0000,0x0000,0xFF00\r
+ .word 0x8137,0x0002,0x0100,0x0000,0xAF01,0xD91F,0x1127,0x0021\r
+ .word 0x2600,0xF977,0xEDB0,0xDDE1,0xFDE1,0xED47,0xED4F,0xD1E1\r
+ .word 0xF108,0xD9C1,0xD1E1,0xF1F9,0xF3ED,0x5636,0xE9E9,0x9FBF\r
+ .word 0xDFFF,0x4D41,0x5253,0x2049,0x6E69,0x7469,0x616C,0x2026\r
+ .word 0x2053,0x6563,0x7572,0x6974,0x7920,0x5072,0x6F67,0x7261\r
+ .word 0x6D20,0x2020,0x2020,0x2020,0x2020,0x2043,0x6172,0x7472\r
+ .word 0x6964,0x6765,0x2056,0x6572,0x7369,0x6F6E,0x2020,0x2020\r
+ .word 0x436F,0x7079,0x7269,0x6768,0x7420,0x5345,0x4741,0x2045\r
+ .word 0x4E54,0x4552,0x5052,0x4953,0x4553,0x2C4C,0x5444,0x2E20\r
+ .word 0x3139,0x3934,0x2020,0x2020,0x2020,0x2020,0x2020,0x2020\r
+ .word 0x2020,0x2020,0x2020,0x2020,0x2020,0x2020,0x2020,0x2020\r
+ .word 0x2020,0x2020,0x2020,0x524F,0x4D20,0x5665,0x7273,0x696F\r
+ .word 0x6E20,0x312E,0x3000,0x48E7,0xC040,0x43F9,0x00C0,0x0004\r
+ .word 0x3011,0x303C,0x8000,0x323C,0x0100,0x3E3C,0x0012,0x1018\r
+ .word 0x3280,0xD041,0x51CF,0xFFF8,0x4CDF,0x0203,0x4E75,0x48E7\r
+ .word 0x81C0,0x41F9,0x0000,0x063E,0x43F9,0x00C0,0x0004,0x3298\r
+ .word 0x3298,0x3298,0x3298,0x3298,0x3298,0x3298,0x2298,0x3341\r
+ .word 0xFFFC,0x3011,0x0800,0x0001,0x66F8,0x3298,0x3298,0x7000\r
+ .word 0x22BC,0xC000,0x0000,0x7E0F,0x3340,0xFFFC,0x3340,0xFFFC\r
+ .word 0x3340,0xFFFC,0x3340,0xFFFC,0x51CF,0xFFEE,0x22BC,0x4000\r
+ .word 0x0010,0x7E09,0x3340,0xFFFC,0x3340,0xFFFC,0x3340,0xFFFC\r
+ .word 0x3340,0xFFFC,0x51CF,0xFFEE,0x4CDF,0x0381,0x4E75,0x8114\r
+ .word 0x8F01,0x93FF,0x94FF,0x9500,0x9600,0x9780,0x4000,0x0080\r
+ .word 0x8104,0x8F02,0x48E7,0xC140,0x43F9,0x00A1,0x5180,0x08A9\r
+ .word 0x0007,0xFF80,0x66F8,0x3E3C,0x00FF,0x7000,0x7200,0x337C\r
+ .word 0x00FF,0x0004,0x3341,0x0006,0x3340,0x0008,0x4E71,0x0829\r
+ .word 0x0001,0x000B,0x66F8,0x0641,0x0100,0x51CF,0xFFE8,0x4CDF\r
+ .word 0x0283,0x4E75,0x48E7,0x8180,0x41F9,0x00A1,0x5200,0x08A8\r
+ .word 0x0007,0xFF00,0x66F8,0x3E3C,0x001F,0x20C0,0x20C0,0x20C0\r
+ .word 0x20C0,0x51CF,0xFFF6,0x4CDF,0x0181,0x4E75,0x41F9,0x00FF\r
+ .word 0x0000,0x3E3C,0x07FF,0x7000,0x20C0,0x20C0,0x20C0,0x20C0\r
+ .word 0x20C0,0x20C0,0x20C0,0x20C0,0x51CF,0xFFEE,0x3B7C,0x0000\r
+ .word 0x1200,0x7E0A,0x51CF,0xFFFE,0x43F9,0x00A1,0x5100,0x7000\r
+ .word 0x2340,0x0020,0x2340,0x0024,0x1B7C,0x0003,0x5101,0x2E79\r
+ .word 0x0088,0x0000,0x0891,0x0007,0x66FA,0x7000,0x3340,0x0002\r
+ .word 0x3340,0x0004,0x3340,0x0006,0x2340,0x0008,0x2340,0x000C\r
+ .word 0x3340,0x0010,0x3340,0x0030,0x3340,0x0032,0x3340,0x0038\r
+ .word 0x3340,0x0080,0x3340,0x0082,0x08A9,0x0000,0x008B,0x66F8\r
+ .word 0x6100,0xFF12,0x08E9,0x0000,0x008B,0x67F8,0x6100,0xFF06\r
+ .word 0x08A9,0x0000,0x008B,0x6100,0xFF3C,0x303C,0x0040,0x2229\r
+ .word 0x0020,0x0C81,0x5351,0x4552,0x6700,0x0092,0x303C,0x0080\r
+ .word 0x2229,0x0020,0x0C81,0x5344,0x4552,0x6700,0x0080,0x21FC\r
+ .word 0x0088,0x02A2,0x0070,0x303C,0x0002,0x7200,0x122D,0x0001\r
+ .word 0x1429,0x0080,0xE14A,0x8242,0x0801,0x000F,0x660A,0x0801\r
+ .word 0x0006,0x6700,0x0058,0x6008,0x0801,0x0006,0x6600,0x004E\r
+ .word 0x7020,0x41F9,0x0088,0x0000,0x3C28,0x018E,0x4A46,0x6700\r
+ .word 0x0010,0x3429,0x0028,0x0C42,0x0000,0x67F6,0xB446,0x662C\r
+ .word 0x7000,0x2340,0x0028,0x2340,0x002C,0x3E14,0x2C7C,0xFFFF\r
+ .word 0xFFC0,0x4CD6,0x7FF9,0x44FC,0x0000,0x6014,0x43F9,0x00A1\r
+ .word 0x5100,0x3340,0x0006,0x303C,0x8000,0x6004,0x44FC,0x0001\r
+\r
exc_stub 20\r
exc_stub 21\r
exc_stub 22\r
exc_stub 3e\r
exc_stub 3f\r
\r
+.section .rodata\r
+.align 2\r
+\r
+.global sh2_test\r
+.global sh2_test_end\r
+sh2_test:\r
+.incbin "sh2_test.binsh"\r
+sh2_test_end:\r
+\r
# vim:filetype=asmM68k:ts=4:sw=4:expandtab\r
--- /dev/null
+#include "common.h"
+
+void spin(int loops);
+
+void main_c(u32 is_slave)
+{
+ u16 v, *r = (u16 *)0x20004000;
+
+ for (;;)
+ {
+ u16 cmd;
+
+ mem_barrier();
+ cmd = read16(&r[0x20/2]);
+ if ((cmd & 0x8000) ^ (is_slave << 15)) {
+ spin(64);
+ continue;
+ }
+ cmd &= 0x7fff;
+ switch (cmd)
+ {
+ case 0:
+ case 0x4d5f: // 'M_' from BIOS
+ case 0x535f: // 'S_' from BIOS
+ spin(64);
+ continue;
+ case CMD_ECHO:
+ v = read16(&r[0x22/2]) ^ (is_slave << 15);
+ write16(&r[0x24/2], v);
+ break;
+ }
+ write16(&r[0x20/2], 0);
+ }
+}
+
+// vim:ts=4:sw=4:expandtab
--- /dev/null
+
+ .text
+
+! Master Vector Base Table at 0x06000000
+
+ .long mstart /* Cold Start PC */
+ .long 0x06040000 /* Cold Start SP */
+ .long mstart /* Manual Reset PC */
+ .long 0x06040000 /* Manual Reset SP */
+ .long main_err /* Illegal instruction */
+ .long 0x00000000 /* reserved */
+ .long main_err /* Invalid slot instruction */
+ .long 0x20100400 /* reserved */
+ .long 0x20100420 /* reserved */
+ .long main_err /* CPU address error */
+ .long main_err /* DMA address error */
+ .long main_err /* NMI vector */
+ .long main_err /* User break vector */
+ .space 76 /* reserved */
+ .long main_err /* TRAPA #32 */
+ .long main_err /* TRAPA #33 */
+ .long main_err /* TRAPA #34 */
+ .long main_err /* TRAPA #35 */
+ .long main_err /* TRAPA #36 */
+ .long main_err /* TRAPA #37 */
+ .long main_err /* TRAPA #38 */
+ .long main_err /* TRAPA #39 */
+ .long main_err /* TRAPA #40 */
+ .long main_err /* TRAPA #41 */
+ .long main_err /* TRAPA #42 */
+ .long main_err /* TRAPA #43 */
+ .long main_err /* TRAPA #44 */
+ .long main_err /* TRAPA #45 */
+ .long main_err /* TRAPA #46 */
+ .long main_err /* TRAPA #47 */
+ .long main_err /* TRAPA #48 */
+ .long main_err /* TRAPA #49 */
+ .long main_err /* TRAPA #50 */
+ .long main_err /* TRAPA #51 */
+ .long main_err /* TRAPA #52 */
+ .long main_err /* TRAPA #53 */
+ .long main_err /* TRAPA #54 */
+ .long main_err /* TRAPA #55 */
+ .long main_err /* TRAPA #56 */
+ .long main_err /* TRAPA #57 */
+ .long main_err /* TRAPA #58 */
+ .long main_err /* TRAPA #59 */
+ .long main_err /* TRAPA #60 */
+ .long main_err /* TRAPA #61 */
+ .long main_err /* TRAPA #62 */
+ .long main_err /* TRAPA #63 */
+ .long main_irq /* Level 1 IRQ */
+ .long main_irq /* Level 2 & 3 IRQ's */
+ .long main_irq /* Level 4 & 5 IRQ's */
+ .long main_irq /* PWM interupt */
+ .long main_irq /* Command interupt */
+ .long main_irq /* H Blank interupt */
+ .long main_irq /* V Blank interupt */
+ .long main_irq /* Reset Button */
+ .long main_irq /* DMA1 TE INT */
+
+! Slave Vector Base Table at 0x06000124
+
+ .long sstart /* Cold Start PC */
+ .long 0x0603f800 /* Cold Start SP */
+ .long sstart /* Manual Reset PC */
+ .long 0x0603f800 /* Manual Reset SP */
+ .long slav_err /* Illegal instruction */
+ .long 0x00000000 /* reserved */
+ .long slav_err /* Invalid slot instruction */
+ .long 0x20100400 /* reserved */
+ .long 0x20100420 /* reserved */
+ .long slav_err /* CPU address error */
+ .long slav_err /* DMA address error */
+ .long slav_err /* NMI vector */
+ .long slav_err /* User break vector */
+ .space 76 /* reserved */
+ .long slav_err /* TRAPA #32 */
+ .long slav_err /* TRAPA #33 */
+ .long slav_err /* TRAPA #34 */
+ .long slav_err /* TRAPA #35 */
+ .long slav_err /* TRAPA #36 */
+ .long slav_err /* TRAPA #37 */
+ .long slav_err /* TRAPA #38 */
+ .long slav_err /* TRAPA #39 */
+ .long slav_err /* TRAPA #40 */
+ .long slav_err /* TRAPA #41 */
+ .long slav_err /* TRAPA #42 */
+ .long slav_err /* TRAPA #43 */
+ .long slav_err /* TRAPA #44 */
+ .long slav_err /* TRAPA #45 */
+ .long slav_err /* TRAPA #46 */
+ .long slav_err /* TRAPA #47 */
+ .long slav_err /* TRAPA #48 */
+ .long slav_err /* TRAPA #49 */
+ .long slav_err /* TRAPA #50 */
+ .long slav_err /* TRAPA #51 */
+ .long slav_err /* TRAPA #52 */
+ .long slav_err /* TRAPA #53 */
+ .long slav_err /* TRAPA #54 */
+ .long slav_err /* TRAPA #55 */
+ .long slav_err /* TRAPA #56 */
+ .long slav_err /* TRAPA #57 */
+ .long slav_err /* TRAPA #58 */
+ .long slav_err /* TRAPA #59 */
+ .long slav_err /* TRAPA #60 */
+ .long slav_err /* TRAPA #61 */
+ .long slav_err /* TRAPA #62 */
+ .long slav_err /* TRAPA #63 */
+ .long slav_irq /* Level 1 IRQ */
+ .long slav_irq /* Level 2 & 3 IRQ's */
+ .long slav_irq /* Level 4 & 5 IRQ's */
+ .long slav_irq /* PWM interupt */
+ .long slav_irq /* Command interupt */
+ .long slav_irq /* H Blank interupt */
+ .long slav_irq /* V Blank interupt */
+ .long slav_irq /* Reset Button */
+
+! Stacks set up by BIOS
+
+! The main SH2 starts here at 0x06000244
+
+mstart:
+ bra mcont
+ mov #0, r4
+
+! The slave SH2 starts here at 0x06000248
+
+sstart:
+ sleep
+! broken
+ bra xstart
+ mov #1, r4
+
+mcont:
+
+xstart:
+ mov.l l_cctl, r0
+ mov #0x11, r1
+ mov.b r1, @r0
+ mov.l l_main_c, r0
+ jmp @r0
+ nop
+
+.align 2
+l_cctl:
+ .long 0xFFFFFE92
+l_main_c:
+ .long _main_c
+
+! dummy
+.global _start
+_start:
+
+.global _spin
+_spin:
+ dt r4
+ bf _spin
+ rts
+ nop
+
+main_err:
+main_irq:
+slav_err:
+slav_irq:
+0:
+ bra 0b
+ nop
+
+! vim:ts=8:sw=8:expandtab
notaz.gp2x.de / megadrive.git / commitdiff