core z80, some timing improvements

diff --git a/pico/memory.c b/pico/memory.c
index 46e0bd4..fc7ad74 100644 (file)
--- a/pico/memory.c
+++ b/pico/memory.c
@@ -675,14 +675,15 @@ static void PicoWrite16_sram(u32 a, u32 d)
 static u32 PicoRead8_z80(u32 a)\r
 {\r
   u32 d = 0xff;\r
-  if (((Pico.m.z80Run & 1) || Pico.m.z80_reset) && !(PicoIn.quirks & PQUIRK_NO_Z80_BUS_LOCK)) {\r
+  if ((Pico.m.z80Run | Pico.m.z80_reset | (z80_cycles_from_68k() < Pico.t.z80c_cnt)) && !(PicoIn.quirks & PQUIRK_NO_Z80_BUS_LOCK)) {\r
     elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);\r
     // open bus. Pulled down if MegaCD2 is attached.\r
     return (PicoIn.AHW & PAHW_MCD ? 0 : d);\r
   }\r
+  Pico.t.z80c_cnt += 3;\r
+  SekCyclesBurnRun(1);\r
 \r
   if ((a & 0x4000) == 0x0000) {\r
-    SekCyclesBurnRun(1);\r
     d = PicoMem.zram[a & 0x1fff];\r
   } else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff\r
     d = ym2612_read_local_68k(); \r
@@ -699,14 +700,15 @@ static u32 PicoRead16_z80(u32 a)
 \r
 static void PicoWrite8_z80(u32 a, u32 d)\r
 {\r
-  if (((Pico.m.z80Run & 1) || Pico.m.z80_reset) && !(PicoIn.quirks & PQUIRK_NO_Z80_BUS_LOCK)) {\r
+  if ((Pico.m.z80Run | Pico.m.z80_reset) && !(PicoIn.quirks & PQUIRK_NO_Z80_BUS_LOCK)) {\r
     // verified on real hw\r
     elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);\r
     return;\r
   }\r
+  Pico.t.z80c_cnt += 3;\r
+  SekCyclesBurnRun(1);\r
 \r
   if ((a & 0x4000) == 0x0000) { // z80 RAM\r
-    SekCyclesBurnRun(1);\r
     PicoMem.zram[a & 0x1fff] = (u8)d;\r
     return;\r
   }\r
@@ -759,6 +761,8 @@ u32 PicoRead8_io(u32 a)
       // bit8 seems to be readable in this range\r
       if (!(a & 1)) {\r
         d &= ~0x01;\r
+       // Z80 ahead of 68K only if in BUSREQ, BUSACK only after 68K reached Z80\r
+        d |= (z80_cycles_from_68k() < Pico.t.z80c_cnt);\r
         d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;\r
         elprintf(EL_BUSREQ, "get_zrun: %02x [%u] @%06x", d, SekCyclesDone(), SekPc);\r
       }\r
@@ -790,6 +794,7 @@ u32 PicoRead16_io(u32 a)
   if ((a & 0xfc00) == 0x1000) {\r
     if ((a & 0xff00) == 0x1100) { // z80 busreq\r
       d &= ~0x0100;\r
+      d |= (z80_cycles_from_68k() < Pico.t.z80c_cnt) << 8;\r
       d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;\r
       elprintf(EL_BUSREQ, "get_zrun: %04x [%u] @%06x", d, SekCyclesDone(), SekPc);\r
     }\r
@@ -1344,6 +1349,10 @@ void PicoWrite16_32x(u32 a, u32 d) {}
 \r
 static void access_68k_bus(int delay) // bus delay as Q8\r
 {\r
+  // TODO: if the 68K is in DMA wait, Z80 has to wait until DMA ends\r
+  if (Pico.video.status & (PVS_CPUWR|PVS_CPURD))\r
+    z80_subCLeft(z80_cyclesLeft); // rather rough on both condition and action\r
+\r
   // 68k bus access delay for z80. The fractional part needs to be accumulated\r
   // until an additional cycle is full. That is then added to the integer part.\r
   Pico.t.z80_busdelay = (delay&0xff) + (Pico.t.z80_busdelay&0xff); // accumulate\r
@@ -1379,7 +1388,7 @@ static unsigned char z80_md_vdp_read(unsigned short a)
 static unsigned char z80_md_bank_read(unsigned short a)\r
 {\r
   unsigned int addr68k;\r
-  unsigned char ret;\r
+  unsigned char ret = 0xff;\r
 \r
   // 68k bus access delay=3.3 per kabuto, but for notaz picotest 3.02<delay<3.32\r
   access_68k_bus(0x340); // Q8, picotest: 0x306(>3.02)-0x351(<3.32)\r
@@ -1387,7 +1396,8 @@ static unsigned char z80_md_bank_read(unsigned short a)
   addr68k = Pico.m.z80_bank68k << 15;\r
   addr68k |= a & 0x7fff;\r
 \r
-  ret = m68k_read8(addr68k);\r
+  if (addr68k < 0xe00000) // can't read from 68K RAM\r
+    ret = m68k_read8(addr68k);\r
 \r
   elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
   return ret;\r