sh2 drc, adjust max ld/st offset in arm backend

diff --git a/cpu/drc/emit_arm.c b/cpu/drc/emit_arm.c
index c9d5e67..2e5a1bb 100644 (file)
--- a/cpu/drc/emit_arm.c
+++ b/cpu/drc/emit_arm.c
@@ -1263,7 +1263,7 @@ static inline void emith_pool_adjust(int tcache_offs, int move_offs)
 #define host_arg2reg(rd, arg) \
        rd = arg
 
-#define emith_rw_offs_max()    0xff
+#define emith_rw_offs_max()    0x1ff   // minimum of offset in AM2 and AM3
 
 /* SH2 drc specific */
 /* pushes r12 for eabi alignment */