core vdp, fix regression (irq not cleared on disable)
authorkub <derkub@gmail.com>
Sat, 27 Apr 2024 07:44:43 +0000 (09:44 +0200)
committerkub <derkub@gmail.com>
Sat, 27 Apr 2024 08:12:30 +0000 (10:12 +0200)
pico/videoport.c

index b4d6767..7ed3092 100644 (file)
@@ -999,18 +999,22 @@ PICO_INTERNAL_ASM void PicoVideoWrite(u32 a,unsigned short d)
 update_irq:\r
 #ifndef EMU_CORE_DEBUG\r
         // update IRQ level\r
-        if (!SekShouldInterrupt()) // hack\r
         {\r
           int lines, pints, irq = 0;\r
           lines = (pvid->reg[1] & 0x20) | (pvid->reg[0] & 0x10);\r
           pints = pvid->pending_ints & lines;\r
                if (pints & 0x20) irq = 6;\r
           else if (pints & 0x10) irq = pvid->hint_irq;\r
-          if (SekIrqLevel < irq)\r
+          if (irq) {\r
+            // VDP irqs have highest prio, overwrite old level\r
             SekInterrupt(irq); // update line\r
 \r
-          // this is broken because cost of current insn isn't known here\r
-          if (irq) SekEndRun(21); // make it delayed\r
+            // this is broken because cost of current insn isn't known here\r
+            SekEndRun(21); // make it delayed\r
+          } else if (SekIrqLevel >= pvid->hint_irq) {\r
+            // no VDP irq, query lower irqs\r
+            SekInterrupt(PicoPicoIrqAck(0));\r
+          }\r
         }\r
 #endif\r
       }\r