mrun = sh2_irl_irq(&msh2, mlvl, msh2.state & SH2_STATE_RUN);
if (mrun) {
- p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, m68k_cycles);
+ p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES & ~SH2_STATE_SLEEP, m68k_cycles);
if (msh2.state & SH2_STATE_RUN)
sh2_end_run(&msh2, 0);
}
srun = sh2_irl_irq(&ssh2, slvl, ssh2.state & SH2_STATE_RUN);
if (srun) {
- p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES, m68k_cycles);
+ p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES & ~SH2_STATE_SLEEP, m68k_cycles);
if (ssh2.state & SH2_STATE_RUN)
sh2_end_run(&ssh2, 0);
}
Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
if (!(Pico32x.sh2_regs[0] & 0x80))
p32x_schedule_hint(NULL, SekCyclesDone());
+
+ p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, SekCyclesDone());
+ p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, SekCyclesDone());
}
void p32x_schedule_hint(SH2 *sh2, unsigned int m68k_cycles)
void PicoFrame32x(void)
{
+ // XXX this is somehow misplaced here
sh2_execute_prepare(&msh2, PicoIn.opt & POPT_EN_DRC);
sh2_execute_prepare(&ssh2, PicoIn.opt & POPT_EN_DRC);
- p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, SekCyclesDone());
- p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, SekCyclesDone());
-
if (PicoIn.AHW & PAHW_MCD)
pcd_prepare_frame();
SyncCPUs(Pico.t.m68c_aim);
- // === VBLANK, 1st line ===
- pv->status &= ~PVS_ACTIVE;
-
if (!skip)
{
if (Pico.est.DrawScanline < y)
p32x_render_frame();
#endif
+ // === VBLANK, 1st line ===
+ pv->status &= ~PVS_ACTIVE;
+
memcpy(PicoIn.padInt, PicoIn.pad, sizeof(PicoIn.padInt));
PAD_DELAY();
}
pv->status |= SR_VB | PVS_VB2; // go into vblank
+#ifdef PICO_32X
+ p32x_start_blank();
+#endif
// the following SekRun is there for several reasons:
// there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
do_timing_hacks_start(pv);
CPUS_RUN(CYCLES_M68K_VINT_LAG);
+ SyncCPUs(Pico.t.m68c_aim);
+
pv->status |= SR_F;
pv->pending_ints |= 0x20;
+
if (pv->reg[1] & 0x20) {
if (Pico.t.m68c_cnt - Pico.t.m68c_aim < 60) // CPU blocked?
SekExecM68k(11); // HACK
}
if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80)) {
- PicoSyncZ80(Pico.t.m68c_aim);
elprintf(EL_INTS, "zint");
z80_int();
}
-#ifdef PICO_32X
- p32x_start_blank();
-#endif
-
// Run scanline:
CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG);
do_timing_hacks_end(pv);