sh2 drc, minor optimization for x86 backend

diff --git a/cpu/drc/emit_x86.c b/cpu/drc/emit_x86.c
index 33fc8e6..3f08e67 100644 (file)
--- a/cpu/drc/emit_x86.c
+++ b/cpu/drc/emit_x86.c
@@ -1211,13 +1211,12 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI,      // x86-64,i386 common
 } while (0)
 
 #define emith_sh2_rcall(a, tab, func, mask) do { \
+       int scale_ = PTR_SCALE <= 2 ? PTR_SCALE : 2; \
        emith_lsr(mask, a, SH2_READ_SHIFT); \
+       if (PTR_SCALE > scale_) emith_lsl(mask, mask, PTR_SCALE-scale_); \
        EMIT_XREX_IF(1, tab, tab, mask); \
        EMIT_OP_MODRM64(0x8d, 0, tab, 4); \
-       EMIT_SIB64(PTR_SCALE, mask, tab); /* lea tab, [tab + mask * {4,8}] */ \
-       EMIT_XREX_IF(1, tab, tab, mask); \
-       EMIT_OP_MODRM64(0x8d, 0, tab, 4); \
-       EMIT_SIB64(PTR_SCALE, mask, tab); /* lea tab, [tab + mask * {4,8}] */ \
+       EMIT_SIB64(scale_+1, mask, tab); /* lea tab, [tab + mask*(2*scale)] */ \
        EMIT_REX_IF(1, func,  tab); \
        emith_deref_modrm(0x8b, 0, func, tab); /* mov func, [tab] */ \
        EMIT_REX_IF(0, mask, tab); \

diff --git a/cpu/sh2/compiler.h b/cpu/sh2/compiler.h
index 050be11..deddf8f 100644 (file)
--- a/cpu/sh2/compiler.h
+++ b/cpu/sh2/compiler.h
@@ -50,9 +50,10 @@ u16 scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc,
 #elif defined(__powerpc__) || defined(__ppc__) || defined(__PPC__)
 #define        DRC_SR_REG      "r28"
 #define DRC_REG_LL     0       // no ABI for __ILP32__
-#elif defined(__i386__)
-#define        DRC_SR_REG      "edi"
-#define DRC_REG_LL     0       // 32 bit
+//i386 only has 8 registers and reserving one of them causes too much spilling
+//#elif defined(__i386__)
+//#define      DRC_SR_REG      "edi"
+//#define DRC_REG_LL   0       // 32 bit
 #elif defined(__x86_64__)
 #define        DRC_SR_REG      "rbx"
 #define DRC_REG_LL     (__ILP32__ || _WIN32)