Pico_mcd->m.state_flags = PCD_ST_S68K_RST;
Pico_mcd->m.busreq = 2; // busreq on, s68k in reset
Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode, m68k access
- Pico_mcd->s68k_regs[6] = 0xff;
- Pico_mcd->s68k_regs[7] = 0xff;
memset(Pico_mcd->bios + 0x70, 0xff, 4);
}
static inline void pcd_run_cpus_normal(int m68k_cycles)
{
SekCycleAim += m68k_cycles;
- if (Pico_mcd->m.m68k_poll_cnt >= 16 && !SekShouldInterrupt()) {
+ if (SekShouldInterrupt())
+ Pico_mcd->m.m68k_poll_cnt = 0;
+ else if (Pico_mcd->m.m68k_poll_cnt >= 16) {
int s68k_left = pcd_sync_s68k(SekCycleAim, 1);
if (s68k_left <= 0) {
elprintf(EL_CDPOLL, "m68k poll [%02x] x%d @%06x",
SekSyncM68k();
pcd_sync_s68k(SekCycleAim, 0);
} while (CYCLES_GT(target, SekCycleAim));
+
+ SekCycleAim = target;
}
#define PICO_CD
#define POLL_LIMIT 16\r
#define POLL_CYCLES 124\r
\r
-u32 m68k_comm_check(u32 a, u32 d)\r
+void m68k_comm_check(u32 a)\r
{\r
pcd_sync_s68k(SekCyclesDone(), 0);\r
if (a != Pico_mcd->m.m68k_poll_a) {\r
Pico_mcd->m.m68k_poll_a = a;\r
Pico_mcd->m.m68k_poll_cnt = 0;\r
- return d;\r
+ return;\r
}\r
Pico_mcd->m.m68k_poll_cnt++;\r
- return d;\r
}\r
\r
#ifndef _ASM_CD_MEMORY_C\r
| Pico_mcd->m.busreq;\r
goto end;\r
case 2:\r
+ m68k_comm_check(a);\r
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
- goto end_comm;\r
+ goto end;\r
case 4:\r
d = Pico_mcd->s68k_regs[4]<<8;\r
goto end;\r
\r
if (a < 0x30) {\r
// comm flag/cmd/status (0xE-0x2F)\r
+ m68k_comm_check(a);\r
d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
- goto end_comm;\r
+ goto end;\r
}\r
\r
elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);\r
\r
end:\r
return d;\r
-\r
-end_comm:\r
- return m68k_comm_check(a, d);\r
}\r
#endif\r
\r
//printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);\r
if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {\r
SekSetStopS68k(1);\r
- elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x",\r
+ elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",\r
SekPcS68k, a);\r
}\r
}\r
\r
regs_done:\r
d &= 0xff;\r
- elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @ %06x",\r
+ elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @%06x",\r
a, d, SekPcS68k);\r
return d;\r
}\r
d = gfx_cd_read(a);\r
else d = s68k_reg_read16(a);\r
\r
- elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @ %06x",\r
+ elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @%06x",\r
a, d, SekPcS68k);\r
return d;\r
}\r
// regs\r
if ((a & 0xfe00) == 0x8000) {\r
a &= 0x1ff;\r
- elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);\r
+ elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @%06x", a, d, SekPcS68k);\r
if (0x58 <= a && a < 0x68)\r
gfx_cd_write16(a&~1, (d<<8)|d);\r
else s68k_reg_write8(a,d);\r
// regs\r
if ((a & 0xfe00) == 0x8000) {\r
a &= 0x1fe;\r
- elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);\r
+ elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @%06x", a, d, SekPcS68k);\r
if (a >= 0x58 && a < 0x68)\r
gfx_cd_write16(a, d);\r
else {\r
add r1, r1, #0x110000
ldrb r0, [r1, #2]
bx lr
-m_m68k_read8_r03: @ FIXME: sync with C
- add r2, r1, #0x110000
- ldrb r1, [r2, #3]
- add r2, r2, #0x002200
- ldr r2, [r2, #4]
- and r1, r1, #0xc7
- tst r2, #2 @ DMNA pending?
- bicne r1, r1, #1
- orrne r1, r1, #2
- b m68k_comm_check
+m_m68k_read8_r03:
+ add r1, r1, #0x110000
+ push {r1, lr}
+ bl m68k_comm_check
+ pop {r1, lr}
+ ldrb r0, [r1, #3]
+ and r0, r0, #0xc7
+ bx lr
m_m68k_read8_r04:
add r1, r1, #0x110000
ldrb r0, [r1, #4]
bx lr
m_m68k_read8_hi:
cmp r0, #0x30
- movge r0, #0
- bxeq lr
add r1, r1, #0x110000
- ldrb r1, [r1, r0]
- b m68k_comm_check
+ movge r0, #0
+ bxge lr
+ add r1, r0
+ push {r1, lr}
+ bl m68k_comm_check
+ pop {r1, lr}
+ ldrb r0, [r1]
+ bx lr
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
and r0, r0, #0x04000000 @ we need irq2 mask state
orr r0, r1, r0, lsr #11
bx lr
-m_m68k_read16_r02: @ FIXME: out of sync from C
- add r3, r1, #0x110000
- ldrb r1, [r3, #2]
- ldrb r2, [r3, #3]
- add r3, r3, #0x002200
- ldr r3, [r3, #4]
+m_m68k_read16_r02:
+ add r1, r1, #0x110000
+ push {r1, lr}
+ bl m68k_comm_check
+ pop {r1, lr}
+ ldrb r2, [r1, #3]
+ ldrb r0, [r1, #2]
and r2, r2, #0xc7
- orr r1, r2, r1, lsl #8
- tst r3, #2 @ DMNA pending?
- bicne r1, r1, #1
- orrne r1, r1, #2
- b m68k_comm_check
+ orr r0, r2, r0, lsl #8
+ bx lr
m_m68k_read16_r04:
add r1, r1, #0x110000
ldrb r0, [r1, #4]
bx lr
m_m68k_read16_hi:
cmp r0, #0x30
- addlt r1, r1, #0x110000
- ldrlth r1, [r1, r0]
+ add r1, r1, #0x110000
movge r0, #0
bxge lr
- mov r2, r1, lsr #8
- and r1, r1, #0xff
- orr r1, r2, r1, lsl #8
- b m68k_comm_check
+
+ add r1, r0, r1
+ push {r1, lr}
+ bl m68k_comm_check
+ pop {r0, lr}
+ ldrh r0, [r0]
+ mov r1, r0, lsr #8
+ and r0, r0, #0xff
+ orr r0, r1, r0, lsl #8
+ bx lr
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@