\r
@ -------- some macros --------\r
\r
+@ helpers\r
+.macro add_c24 d s c\r
+ add \d, \s, #(\c & 0x00ff00)\r
+.if \c & 0x0000ff\r
+ add \d, \d, #(\c & 0x0000ff)\r
+.endif\r
+.if \c & 0xff0000\r
+ add \d, \d, #(\c & 0xff0000)\r
+.endif\r
+.endm\r
\r
-@ helper\r
@ TileLineSinglecol (r1=pdest, r2=pixels8, r3=pal) r4: scratch, r0: pixels8_old\r
.macro TileLineSinglecol notsinglecol=0\r
and r2, r2, #0xf @ #0x0000000f\r
mla r11, r4, r7, r11 @ scrpos+=8*328*(planestart-START_ROW);\r
\r
@ Get vertical scroll value:\r
- add r7, r10, #0x012000\r
- add r7, r7, #0x000180 @ r7=Pico.vsram (Pico+0x22180)\r
+ add_c24 r7, r10, (OFS_PMEM_vsram-OFS_PMEM_vram)\r
ldr r7, [r7]\r
tst r0, r0\r
moveq r7, r7, lsl #22\r
.equ PDRAW_PLANE_HI_PRIO, (1<<6)\r
.equ PDRAW_SHHI_DONE, (1<<7)\r
\r
-@ helper\r
+@ helpers\r
+.macro add_c24 d s c\r
+ add \d, \s, #(\c & 0x00ff00)\r
+.if \c & 0x0000ff\r
+ add \d, \d, #(\c & 0x0000ff)\r
+.endif\r
+.if \c & 0xff0000\r
+ add \d, \d, #(\c & 0xff0000)\r
+.endif\r
+.endm\r
+\r
.macro TilePixel pat lsrr offs\r
.if !\lsrr\r
ands r4, \pat, r2\r
bne .DrawStrip_vsscroll\r
\r
@ Get vertical scroll value:\r
- add r7, lr, #0x012000\r
- add r7, r7, #0x000180 @ r7=PicoMem.vsram (PicoMem+0x22180)\r
+ add_c24 r7, lr, (OFS_PMEM_vsram-OFS_PMEM_vram)\r
ldr r7, [r7]\r
\r
tst r8, #2\r
add r7, r1, #1 @ r7=dx=((ts->hscroll-1)&7)+1\r
\r
mov r10,r9, lsl #16\r
+ orr r10,r10, #0xff000000 @ will be adjusted on entering loop\r
tst r0, #1\r
orrne r10,r10, #0x8000\r
+ tst r3, #0x0f @ hscroll & 0x0f?\r
+ beq 0f\r
+ eor r3, r3, r7\r
+ sub r10,r10, #1<<24 @ cell-- // start from negative for hscroll\r
+ tst r3, #0x08\r
+ subne r10,r10, #1<<16 @ cells--\r
+ subne r10,r10, #1<<24 @ cell-- // even more negative\r
+0:\r
tst r9, #1<<31\r
mov r3, #0\r
- orr r10,r10, #0xff000000 @ will be adjusted on entering loop\r
orrne r10,r10, #1<<23 @ r10=(cell[31:24]|sh[23]|hi_not_empty[22]|cells_max[21:16]|plane[15]|ty[14:0])\r
movne r3, #0x40 @ default to shadowed pal on sh mode\r
\r
- cmp r7, #8\r
- subne r10,r10, #0x01000000 @ have hscroll, start with negative cell\r
-\r
and r9, r9, #0xff00\r
add r8, r8, r9, lsr #8 @ tilex+=cellskip\r
add r7, r7, r9, lsr #5 @ dx+=cellskip<<3;\r
ble .dsloop_vs_exit\r
\r
@ calc offset and read tileline code to r7, also calc ty\r
- add r7, lr, #0x012000\r
- add r7, r7, #0x000180 @ r7=PicoMem.vsram (PicoMem+0x22180)\r
+ add_c24 r7, lr, (OFS_PMEM_vsram-OFS_PMEM_vram)\r
add r7, r7, r10,asr #23 @ vsram + ((cell&~1)<<1)\r
bic r7, r7, #3\r
tst r10,#0x8000 @ plane1?\r
unsigned short HighPal[0x100];\r
};\r
\r
-// some assembly stuff still depends on these, do not touch!\r
struct PicoMem\r
{\r
unsigned char ram[0x10000]; // 0x00000 scratch ram\r
};\r
unsigned char zram[0x2000]; // 0x20000 Z80 ram\r
unsigned char ioports[0x10]; // XXX: fix asm and mv\r
- unsigned char pad[0xf0]; // unused\r
- unsigned short cram[0x40]; // 0x22100\r
- unsigned short vsram[0x40]; // 0x22180\r
+ unsigned short cram[0x40]; // 0x22010\r
+ unsigned char pad[0x70]; // 0x22050 DrawStripVSRam reads 0 from here\r
+ unsigned short vsram[0x40]; // 0x22100\r
};\r
\r
// sram\r