#define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles))\r
#define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)\r
#define z80_int() drZ80.Z80_IRQ = 1\r
-#define z80_int() drZ80.Z80_IRQ = 1\r
+#define z80_int_assert(a) drZ80.Z80_IRQ = (a)\r
#define z80_nmi() drZ80.Z80IF |= 8\r
\r
#define z80_cyclesLeft drZ80.cycles\r
#define z80_run(cycles) Cz80_Exec(&CZ80, cycles)\r
#define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)\r
#define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)\r
+#define z80_int_assert(a) Cz80_Set_IRQ(&CZ80, 0, (a) ? ASSERT_LINE : CLEAR_LINE)\r
#define z80_nmi() Cz80_Set_IRQ(&CZ80, IRQ_LINE_NMI, 0)\r
\r
#define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles)\r
#define z80_run(cycles) (cycles)\r
#define z80_run_nr(cycles)\r
#define z80_int()\r
+#define z80_int_assert(a)\r
#define z80_nmi()\r
\r
#endif\r
struct PicoVideo *pv = &Pico.video;
unsigned char d;
+ z80_int_assert(0);
d = pv->status | (pv->pending_ints << 7);
pv->pending = pv->pending_ints = 0;
pv->status = 0;
pv->pending = 0;
}
-static void vdp_ctl_write(unsigned char d)
+static NOINLINE void vdp_reg_write(struct PicoVideo *pv, u8 a, u8 d)
+{
+ int l;
+
+ pv->reg[a] = d;
+ switch (a) {
+ case 0:
+ l = pv->pending_ints & (d >> 3) & 2;
+ elprintf(EL_INTS, "hint %d", l);
+ z80_int_assert(l);
+ break;
+ case 1:
+ l = pv->pending_ints & (d >> 5) & 1;
+ elprintf(EL_INTS, "vint %d", l);
+ z80_int_assert(l);
+ break;
+ }
+}
+
+static void vdp_ctl_write(u8 d)
{
struct PicoVideo *pv = &Pico.video;
if (pv->pending) {
if ((d >> 6) == 2) {
- pv->reg[d & 0x0f] = pv->addr;
elprintf(EL_IO, " VDP r%02x=%02x", d & 0x0f, pv->addr & 0xff);
+ if (pv->reg[d & 0x0f] != (u8)pv->addr)
+ vdp_reg_write(pv, d & 0x0f, pv->addr);
}
pv->type = d >> 6;
pv->addr &= 0x00ff;
pv->pending_ints |= 2;
if (pv->reg[0] & 0x10) {
elprintf(EL_INTS, "hint");
- z80_int();
+ z80_int_assert(1);
}
}
}
pv->pending_ints |= 1;
if (pv->reg[1] & 0x20) {
elprintf(EL_INTS, "vint");
- z80_int();
+ z80_int_assert(1);
}
}
return drZ80.Z80PC_BASE;
}
+static void dz80_noop_irq_ack(void) {}
+
#ifdef FAST_Z80SP
static u32 drz80_sp_base;
drz80_sp_base = (PicoIn.AHW & PAHW_SMS) ? 0xc000 : 0x0000;
drZ80.Z80SP_BASE = z80_read_map[drz80_sp_base >> Z80_MEM_SHIFT] << 1;
#endif
- if (PicoIn.AHW & PAHW_SMS)
+ drZ80.z80_irq_callback = NULL; // use auto-clear
+ if (PicoIn.AHW & PAHW_SMS) {
drZ80.Z80SP = drZ80.Z80SP_BASE + 0xdff0; // simulate BIOS
+ drZ80.z80_irq_callback = dz80_noop_irq_ack;
+ }
// XXX: since we use direct SP pointer, it might make sense to force it to RAM,
// but we'll rely on built-in stack protection for now
#endif