unsigned char irq; // [r7,#0x47] IRQ level\r
unsigned int osp; // [r7,#0x48] Other Stack Pointer (USP/SSP)\r
unsigned int vector; // [r7,#0x4c] IRQ vector (temporary)\r
- unsigned int pad1[2];\r
+ unsigned int prev_pc;// [r7,#0x50] set to start address of currently executed opcode (if enabled in config.h)\r
+ unsigned int unused; // [r7,#0x54] Unused\r
int stopped; // [r7,#0x58] 1 == processor is in stopped state\r
int cycles; // [r7,#0x5c]\r
int membase; // [r7,#0x60] Memory Base (ARM address minus 68000 address)\r
if (ea<0x30) // ($nn,An) (di)\r
{\r
EaCalcReg(2,8,mask,0,0);\r
- ot(" ldrsh r0,[r4],#2 ;@ Fetch offset\n");\r
+ ot(" ldrsh r0,[r4],#2 ;@ Fetch offset\n"); pc_dirty=1;\r
ot(" ldr r2,[r7,r2,lsl #2]\n");\r
ot(" add r%d,r0,r2 ;@ Add on offset\n",a);\r
Cycles+=size<2 ? 8:12; // Extra cycles\r
if (ea<0x38) // ($nn,An,Rn) (ix)\r
{\r
ot(";@ Get extension word into r3:\n");\r
- ot(" ldrh r3,[r4],#2 ;@ ($Disp,PC,Rn)\n");\r
+ ot(" ldrh r3,[r4],#2 ;@ ($Disp,PC,Rn)\n"); pc_dirty=1;\r
ot(" mov r2,r3,lsr #10\n");\r
ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n");\r
ot(" and r2,r2,#0x3c ;@ r2=Index of Rn\n");\r
\r
if (ea==0x38) // (aw)\r
{\r
- ot(" ldrsh r%d,[r4],#2 ;@ Fetch Absolute Short address\n",a);\r
+ ot(" ldrsh r%d,[r4],#2 ;@ Fetch Absolute Short address\n",a); pc_dirty=1;\r
Cycles+=size<2 ? 8:12; // Extra cycles\r
return 0;\r
}\r
if (ea==0x39) // (al)\r
{\r
ot(" ldrh r2,[r4],#2 ;@ Fetch Absolute Long address\n");\r
- ot(" ldrh r0,[r4],#2\n");\r
+ ot(" ldrh r0,[r4],#2\n"); pc_dirty=1;\r
ot(" orr r%d,r0,r2,lsl #16\n",a);\r
Cycles+=size<2 ? 12:16; // Extra cycles\r
return 0;\r
{\r
ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n");\r
ot(" sub r0,r4,r0 ;@ Real PC\n");\r
- ot(" ldrsh r2,[r4],#2 ;@ Fetch extension\n");\r
+ ot(" ldrsh r2,[r4],#2 ;@ Fetch extension\n"); pc_dirty=1;\r
ot(" mov r0,r0,lsl #8\n");\r
ot(" add r%d,r2,r0,asr #8 ;@ ($nn,PC)\n",a);\r
Cycles+=size<2 ? 8:12; // Extra cycles\r
ot(" ldr r0,[r7,#0x60] ;@ Get Memory base\n");\r
ot(" ldrh r3,[r4] ;@ Get extension word\n");\r
ot(" sub r0,r4,r0 ;@ r0=PC\n");\r
- ot(" add r4,r4,#2\n");\r
+ ot(" add r4,r4,#2\n"); pc_dirty=1;\r
ot(" mov r0,r0,asl #8 ;@ use only 24bits of PC\n");\r
ot(" mov r2,r3,lsr #10\n");\r
ot(" tst r3,#0x0800 ;@ Is Rn Word or Long\n");\r
{\r
if (size<2)\r
{\r
- ot(" ldr%s r%d,[r4],#2 ;@ Fetch immediate value\n",Sarm[size&3],a);\r
+ ot(" ldr%s r%d,[r4],#2 ;@ Fetch immediate value\n",Sarm[size&3],a); pc_dirty=1;\r
Cycles+=4; // Extra cycles\r
return 0;\r
}\r
\r
ot(" ldrh r2,[r4],#2 ;@ Fetch immediate value\n");\r
- ot(" ldrh r0,[r4],#2\n");\r
+ ot(" ldrh r0,[r4],#2\n"); pc_dirty=1;\r
ot(" orr r%d,r0,r2,lsl #16\n",a);\r
Cycles+=8; // Extra cycles\r
return 0;\r
ot("\n"); return 0;\r
}\r
\r
- if (a!=0) ot(" mov r0,r%d\n",a);\r
-\r
- if (ea>=0x3a && ea<=0x3b) MemHandler(2,size); // Fetch\r
- else MemHandler(0,size); // Read\r
+ if (ea>=0x3a && ea<=0x3b) MemHandler(2,size,a); // Fetch\r
+ else MemHandler(0,size,a); // Read\r
\r
if (v!=0 || shift) {\r
if (shift) ot(" mov r%d,r0,asl #%d\n",v,shift);\r
\r
if (ea==0x3c) { ot("Error! Write EA=0x%x\n\n",ea); return 1; }\r
\r
- if (a!=0 && v!=0) ot(" mov r0,r%d\n",a);\r
if (v!=1 || shift) ot(" mov r1,r%d,asr #%d\n",v,shift);\r
- if (a!=0 && v==0) ot(" mov r0,r%d\n",a);\r
\r
- MemHandler(1,size); // Call write handler\r
+ MemHandler(1,size,a); // Call write handler\r
\r
ot("\n"); return 0;\r
}\r
\r
static FILE *AsmFile=NULL;\r
\r
-static int CycloneVer=0x0086; // Version number of library\r
+static int CycloneVer=0x0087; // Version number of library\r
int *CyJump=NULL; // Jump table\r
int ms=USE_MS_SYNTAX; // If non-zero, output in Microsoft ARMASM format\r
char *Narm[4]={ "b", "h","",""}; // Normal ARM Extensions for operand sizes 0,1,2\r
char *Sarm[4]={"sb","sh","",""}; // Sign-extend ARM Extensions for operand sizes 0,1,2\r
int Cycles; // Current cycles for opcode\r
+int pc_dirty; // something changed PC during processing\r
\r
\r
void ot(const char *format, ...)\r
ot("\n");\r
}\r
\r
+void FlushPC(void)\r
+{\r
+#if MEMHANDLERS_NEED_PC\r
+ if (pc_dirty)\r
+ ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
+#endif\r
+ pc_dirty = 0;\r
+}\r
+\r
static void PrintFramework()\r
{\r
ot(";@ --------------------------- Framework --------------------------\n");\r
ot("\n");\r
\r
ot("Exception%s\n", ms?"":":");\r
- ot("\n");\r
ot(" stmdb sp!,{lr} ;@ Preserve ARM return address\n");\r
PrintException(0);\r
ot(" ldmia sp!,{pc} ;@ Return\n");\r
// ---------------------------------------------------------------------------\r
// Call Read(r0), Write(r0,r1) or Fetch(r0)\r
// Trashes r0-r3,r12,lr\r
-int MemHandler(int type,int size)\r
+int MemHandler(int type,int size,int addrreg)\r
{\r
int func=0;\r
func=0x68+type*0xc+(size<<2); // Find correct offset\r
ot(" mov r3,r9,lsr #28\n");\r
ot(" strb r3,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
#endif\r
+ FlushPC();\r
\r
#if (MEMHANDLERS_ADDR_MASK & 0xff000000)\r
- ot(" bic r0,r0,#0x%08x\n", MEMHANDLERS_ADDR_MASK & 0xff000000);\r
+ ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0xff000000);\r
+ addrreg=0;\r
#endif\r
#if (MEMHANDLERS_ADDR_MASK & 0x00ff0000)\r
- ot(" bic r0,r0,#0x%08x\n", MEMHANDLERS_ADDR_MASK & 0x00ff0000);\r
+ ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x00ff0000);\r
+ addrreg=0;\r
#endif\r
#if (MEMHANDLERS_ADDR_MASK & 0x0000ff00)\r
- ot(" bic r0,r0,#0x%08x\n", MEMHANDLERS_ADDR_MASK & 0x0000ff00);\r
+ ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x0000ff00);\r
+ addrreg=0;\r
#endif\r
#if (MEMHANDLERS_ADDR_MASK & 0x000000ff)\r
- ot(" bic r0,r0,#0x%08x\n", MEMHANDLERS_ADDR_MASK & 0x000000ff);\r
+ ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x000000ff);\r
+ addrreg=0;\r
#endif\r
+ if (addrreg != 0)\r
+ ot(" mov r0,r%i\n", addrreg);\r
ot(" mov lr,pc\n");\r
ot(" ldr pc,[r7,#0x%x] ;@ Call ",func);\r
\r
else ot("%d(r0)", 8<<size);\r
ot(" handler\n");\r
\r
-#if MEMHANDLERS_CHANGE_CYCLES\r
- ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
-#endif\r
#if MEMHANDLERS_CHANGE_FLAGS\r
ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
ot(" mov r9,r9,lsl #28\n");\r
ot(";@ ---------- [%.4x] %s uses Op%.4x ----------\n",op,text,use);\r
}\r
\r
-void OpStart(int op, int ea)\r
+void OpStart(int op, int sea, int tea)\r
{\r
Cycles=0;\r
OpUse(op,op); // This opcode obviously uses this handler\r
ot("Op%.4x%s\n", op, ms?"":":");\r
-#if (MEMHANDLERS_NEED_PC || MEMHANDLERS_NEED_CYCLES)\r
- if (ea >= 0x10 && ea != 0x3c) {\r
-#if MEMHANDLERS_NEED_PC\r
+#if (MEMHANDLERS_NEED_PREV_PC || MEMHANDLERS_NEED_CYCLES)\r
+ if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c)) {\r
+#if MEMHANDLERS_NEED_PREV_PC\r
ot(" sub r0,r4,#2\n");\r
- ot(" str r0,[r7,#0x40] ;@ Save PC\n");\r
+ ot(" str r0,[r7,#0x50] ;@ Save prev PC\n");\r
#endif\r
#if MEMHANDLERS_NEED_CYCLES\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
ot("\n");\r
}\r
#endif\r
+ pc_dirty = 1;\r
}\r
\r
-void OpEnd()\r
+void OpEnd(int sea, int tea)\r
{\r
+#if MEMHANDLERS_CHANGE_CYCLES\r
+ if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))\r
+ ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
+#endif\r
ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
ot(" subs r5,r5,#%d ;@ Subtract cycles\n",Cycles);\r
ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
use=OpBase(op);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op, sea|tea); Cycles=4;\r
+ OpStart(op, sea, tea); Cycles=4;\r
\r
EaCalc(10,0x0000, sea,size,1);\r
- EaRead(10, 10, sea,size,0,1);\r
-\r
EaCalc(11,0x003f, tea,size,1);\r
+ EaRead(10, 10, sea,size,0,1);\r
EaRead(11, 0, tea,size,0x003f,1);\r
\r
ot(";@ Do arithmetic:\n");\r
if (type==1 && size>=2 && tea<8) Cycles-=2;\r
}\r
\r
- OpEnd();\r
+ OpEnd(sea,tea);\r
\r
return 0;\r
}\r
\r
EaWrite(10, 1, ea,size,0x003f,1);\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
return 0;\r
}\r
}\r
}\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
return 0;\r
}\r
EaWrite(0, 1,rea, 2,0x0e00,1);\r
\r
ot("endofop%.4x%s\n",op,ms?"":":");\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
ot("divzero%.4x%s\n",op,ms?"":":");\r
ot(" mov r0,#0x14 ;@ Divide by zero\n");\r
ot(" bl Exception\n");\r
Cycles+=38;\r
- OpEnd();\r
+ OpEnd(ea);\r
ot("\n");\r
\r
return 0;\r
if (sea==0x27||dea==0x27) use=op; // ..except -(a7)\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op,sea|dea); Cycles=6;\r
+ OpStart(op,sea,dea); Cycles=6;\r
\r
EaCalc( 0,0x0007, sea,0,1);\r
EaRead( 0, 10, sea,0,0x0007,1);\r
ot(" strb r2,[r7,#0x45] ;@ Save X bit\n");\r
\r
EaWrite(11, 0, dea,0,0x0e00,1);\r
- OpEnd();\r
+ OpEnd(sea,dea);\r
\r
return 0;\r
}\r
ot(" mov r2,r9,lsr #28\n");\r
ot(" strb r2, [r7,#0x45]\n");\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
return 0;\r
}\r
\r
if (type!=1) EaWrite( 0, 1, dea,2,0x0e00,1);\r
\r
- OpEnd();\r
+ OpEnd(sea);\r
\r
return 0;\r
}\r
if (size==0&&(sea==0x27||dea==0x27)) use=op; // ___x.b -(a7)\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op,sea|dea); Cycles=4;\r
+ OpStart(op,sea,dea); Cycles=4;\r
if(size>=2) Cycles+=4;\r
if(sea>=0x10) Cycles+=2;\r
\r
ot(";@ Save result:\n");\r
EaWrite( 0, 1, dea,size,0x0e00,1);\r
\r
- OpEnd();\r
+ OpEnd(sea,dea);\r
\r
return 0;\r
}\r
\r
if (eor) EaWrite(10, 1,ea,size,0x003f,1);\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
return 0;\r
}\r
\r
ot(" cmp r0,r10\n");\r
OpGetFlags(1,0); // Cmp like subtract\r
\r
- OpEnd();\r
+ OpEnd(sea);\r
return 0;\r
}\r
\r
ot(";@ old N remains\n");\r
ot(" bic r9,r9,#0x80000000 ;@ N\n");\r
ot(" orr r9,r9,r3\n");\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
ot("chktrap%.4x%s ;@ CHK exception:\n",op,ms?"":":");\r
ot(" mov r0,#0x18\n");\r
ot(" bl Exception\n");\r
Cycles+=40;\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
return 0;\r
}\r
\r
#include "app.h"\r
\r
-#if USE_CHECKPC_CALLBACK\r
-static void CheckPc()\r
+static void CheckPc(int reg)\r
{\r
+#if USE_CHECKPC_CALLBACK\r
ot(";@ Check Memory Base+pc (r4)\n");\r
- ot(" add lr,pc,#4\n");\r
- ot(" mov r0,r4\n");\r
+ if (reg != 0)\r
+ ot(" mov r0,r%i\n", reg);\r
+ ot(" mov lr,pc\n");\r
ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
ot(" mov r4,r0\n");\r
+#else\r
+ if (reg != 4)\r
+ ot(" mov r4,r%i\n", reg);\r
+#endif\r
ot("\n");\r
}\r
-#endif\r
\r
// Push 32-bit value in r1 - trashes r0-r3,r12,lr\r
void OpPush32()\r
ot(" add r1,r0,#4 ;@ Postincrement A7\n");\r
ot(" str r1,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(0,2);\r
- ot(" add r4,r0,r10 ;@ r4=Memory Base+PC\n");\r
+ ot(" add r0,r0,r10 ;@ Memory Base+PC\n");\r
ot("\n");\r
-#if USE_CHECKPC_CALLBACK\r
- CheckPc();\r
-#endif\r
+ CheckPc(0);\r
}\r
\r
int OpTrap(int op)\r
ot(" bl Exception\n");\r
ot("\n");\r
\r
- Cycles=38; OpEnd();\r
+ Cycles=38; OpEnd(0x10);\r
\r
return 0;\r
}\r
ot("\n");\r
\r
Cycles=16;\r
- OpEnd();\r
+ OpEnd(0x10);\r
return 0;\r
}\r
\r
EaWrite(10, 0, 8, 2, 7, 1);\r
\r
Cycles=12;\r
- OpEnd();\r
+ OpEnd(0x10);\r
return 0;\r
}\r
\r
PopPc();\r
SuperChange(op);\r
CheckInterrupt(op);\r
- OpEnd();\r
+ OpEnd(0x10);\r
SuperEnd(op);\r
return 0;\r
\r
OpStart(op,0x10); Cycles=16;\r
ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
PopPc();\r
- OpEnd();\r
+ OpEnd(0x10);\r
return 0;\r
\r
case 6: // trapv\r
ot(" subne r5,r5,#%i\n",30);\r
ot(" movne r0,#0x1c ;@ TRAPV exception\n");\r
ot(" blne Exception\n");\r
- OpEnd();\r
+ OpEnd(0x10);\r
return 0;\r
\r
case 7: // rtr\r
PopSr(0);\r
ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
PopPc();\r
- OpEnd();\r
+ OpEnd(0x10);\r
return 0;\r
\r
default:\r
use=OpBase(op);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op,0x10);\r
+ OpStart(op,(op&0x40)?0:0x10);\r
\r
ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
ot("\n");\r
- EaCalc(0,0x003f,sea,0);\r
+ EaCalc(11,0x003f,sea,0);\r
\r
ot(";@ Jump - Get new PC from r0\n");\r
if (op&0x40)\r
{\r
// Jmp - Get new PC from r0\r
- ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");\r
+ ot(" add r0,r11,r10 ;@ Memory Base + New PC\n");\r
ot("\n");\r
}\r
else\r
{\r
ot(";@ Jsr - Push old PC first\n");\r
ot(" sub r1,r4,r10 ;@ r1 = Old PC\n");\r
- ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");\r
ot(" mov r1,r1,lsl #8\n");\r
ot(" ldr r0,[r7,#0x3c]\n");\r
ot(" mov r1,r1,asr #8\n");\r
ot(" sub r0,r0,#4 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(1,2);\r
+ ot(" add r0,r11,r10 ;@ Memory Base + New PC\n");\r
ot("\n");\r
}\r
\r
-#if USE_CHECKPC_CALLBACK\r
- CheckPc();\r
-#endif\r
+ CheckPc(0);\r
\r
Cycles=(op&0x40) ? 4 : 12;\r
Cycles+=Ea_add_ns((op&0x40) ? g_jmp_cycle_table : g_jsr_cycle_table, sea);\r
\r
- OpEnd();\r
+ OpEnd((op&0x40)?0:0x10);\r
\r
return 0;\r
}\r
EaCalc(0,0,0x3c,size);\r
EaRead(0,0,0x3c,size,0);\r
}\r
+ else\r
+ ot(" mov r0,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n");\r
\r
// above code messes cycles\r
Cycles=10; // Assume branch taken\r
\r
- if (size==0) ot(" mov r0,r8,asl #24 ;@ Shift 8-bit signed offset up...\n\n");\r
-\r
if (cc==1) ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
\r
if (cc>=2)\r
ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");\r
if ((cc&~1)==2) ot(" eor r9,r9,#0x20000000\n");\r
\r
- if (size==0) ot(" mov r0,r0,asr #24 ;@ ...shift down\n\n");\r
-\r
ot(" b%s DontBranch%.4x\n",Cond[cc^1],op);\r
-\r
ot("\n");\r
}\r
- else\r
- {\r
- if (size==0) ot(" mov r0,r0,asr #24 ;@ ...shift down\n\n");\r
- }\r
+\r
+ if (size==0) ot(" mov r0,r0,asr #24 ;@ ...shift down\n\n");\r
\r
ot(";@ Branch taken - Add on r0 to PC\n");\r
\r
MemHandler(1,2);\r
ot("\n");\r
Cycles=18; // always 18\r
+ if (offset==0 || offset==-1)\r
+ {\r
+ ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");\r
+ CheckPc(4);\r
+ }\r
}\r
else\r
{\r
if (size) ot(" sub r4,r4,#%d ;@ (Branch is relative to Opcode+2)\n",1<<size);\r
- ot(" add r4,r4,r0 ;@ r4 = New PC\n");\r
- ot("\n");\r
+ if (offset==0 || offset==-1)\r
+ {\r
+ ot(" add r0,r4,r0 ;@ r4 = New PC\n");\r
+ ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");\r
+ CheckPc(0);\r
+ }\r
+ else\r
+ {\r
+ ot(" add r4,r4,r0 ;@ r4 = New PC\n");\r
+ ot("\n");\r
+ }\r
}\r
\r
-#if USE_CHECKPC_CALLBACK\r
- if (offset==0 || offset==-1)\r
- {\r
- ot(";@ Branch is quite far, so may be a good idea to check Memory Base+pc\n");\r
- CheckPc();\r
- }\r
-#endif\r
\r
- OpEnd();\r
+ OpEnd(size?0x10:0);\r
\r
if (cc>=2)\r
{\r
ot("DontBranch%.4x%s\n", op, ms?"":":");\r
Cycles+=(size==1)? 2 : -2; // Branch not taken\r
- OpEnd();\r
+ OpEnd(size?0x10:0);\r
}\r
\r
return 0;\r
ot("\n");\r
EaWrite(11, 1,tea,size,0x003f);\r
}\r
- OpEnd();\r
+ OpEnd(tea);\r
\r
return 0;\r
}\r
use=OpBase(op);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op,sea|tea);\r
+ OpStart(op,sea,tea);\r
\r
ot(" mov r10,#1\n");\r
ot("\n");\r
EaWrite(11, 1,tea,size,0x003f);\r
}\r
\r
- OpEnd();\r
+ OpEnd(sea,tea);\r
\r
return 0;\r
}\r
\r
EaWrite(10, 1,ea,size,0x003f);\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
return 0;\r
}\r
ot(" mrs r9,cpsr ;@ r9=flags\n");\r
ot("\n");\r
\r
- OpEnd();\r
+ OpEnd(sea);\r
return 0;\r
}\r
\r
EaCalc (0,0x003f, ea,size);\r
EaWrite(0, 1, ea,size,0x003f);\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
return 0;\r
}\r
\r
\r
EaWrite(10, 0,ea,size,0x003f,1);\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
return 0;\r
}\r
\r
}\r
#endif\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
#if (CYCLONE_FOR_GENESIS == 2)\r
if (!gen_special && ea >= 0x10) {\r
ot(" mov r0,#0x20 ;@ privilege violation\n");\r
ot(" bl Exception\n");\r
Cycles=34;\r
- OpEnd();\r
+ OpEnd(0x10);\r
}\r
\r
// does OSP and A7 swapping if needed\r
\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op,sea|tea); Cycles=4;\r
+ OpStart(op,sea,tea); Cycles=4;\r
\r
EaCalc(0,0x003f,sea,size);\r
EaRead(0, 1,sea,size,0x003f);\r
\r
if((tea&0x38)==0x20) Cycles-=2; // less cycles when dest is -(An)\r
\r
- OpEnd();\r
+ OpEnd(sea,tea);\r
return 0;\r
}\r
\r
use&=~0x0e00; // Also use 1 handler for target ?0-7\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op,sea|tea);\r
+ OpStart(op,sea,tea);\r
\r
EaCalc (1,0x003f,sea,0); // Lea\r
EaCalc (0,0x0e00,tea,2,1);\r
\r
Cycles=Ea_add_ns(g_lea_cycle_table,sea);\r
\r
- OpEnd();\r
+ OpEnd(sea,tea);\r
\r
return 0;\r
}\r
}\r
}\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
if (type==3) SuperEnd(op);\r
\r
CheckInterrupt(op);\r
}\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
if (size) SuperEnd(op);\r
\r
return 0;\r
\r
Cycles=6+Ea_add_ns(g_pea_cycle_table,ea);\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
return 0;\r
}\r
\r
Cycles+=Ea_add_ns(g_movem_cycle_table,ea);\r
\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
return 0;\r
}\r
}\r
\r
Cycles=(size==2)?24:16;\r
- OpEnd();\r
+ OpEnd(ea);\r
\r
return 0;\r
}\r
\r
return 0;\r
}\r
+\r
int EaAn(int ea);\r
\r
// Main.cpp\r
-extern int *CyJump; // Jump table\r
-extern int ms; // If non-zero, output in Microsoft ARMASM format\r
+extern int *CyJump; // Jump table\r
+extern int ms; // If non-zero, output in Microsoft ARMASM format\r
extern char *Narm[4]; // Normal ARM Extensions for operand sizes 0,1,2\r
extern char *Sarm[4]; // Sign-extend ARM Extensions for operand sizes 0,1,2\r
-extern int Cycles; // Current cycles for opcode\r
+extern int Cycles; // Current cycles for opcode\r
+extern int pc_dirty; // something changed PC during processing\r
void ot(const char *format, ...);\r
void ltorg();\r
void CheckInterrupt(int op);\r
-int MemHandler(int type,int size);\r
+int MemHandler(int type,int size,int addrreg=0);\r
+void FlushPC(void);\r
\r
// OpAny.cpp\r
int OpGetFlags(int subtract,int xbit,int sprecialz=0);\r
void OpUse(int op,int use);\r
-void OpStart(int op,int ea=0);\r
-void OpEnd();\r
+void OpStart(int op,int sea=0,int tea=0);\r
+void OpEnd(int sea=0,int tea=0);\r
int OpBase(int op,int sepa=0);\r
void OpAny(int op);\r
\r
* count in ARM registers instead of the context for performance reasons. If you for\r
* any reason need to access them in your memory handlers, enable the options below,\r
* otherwise disable them to improve performance.\r
- * PC value will point to start of instruction currently executed.\r
+ * MEMHANDLERS_NEED_PC updates .pc context field with PC value effective at the time\r
+ * when memhandler was called (opcode address + unknown amount).\r
+ * MEMHANDLERS_NEED_PREV_PC updates .prev_pc context field to currently executed\r
+ * opcode address.\r
+ * Note that .pc and .prev_pc values are always real pointers to memory, so you must\r
+ * subtract .membase to get M68k PC value.\r
* Warning: updating PC in memhandlers is dangerous, as Cyclone may internally\r
* increment the PC before fetching the next instruction and continue executing\r
* at wrong location.\r
*/\r
#define MEMHANDLERS_NEED_PC 0\r
+#define MEMHANDLERS_NEED_PREV_PC 0\r
#define MEMHANDLERS_NEED_FLAGS 0\r
#define MEMHANDLERS_NEED_CYCLES 1\r
#define MEMHANDLERS_CHANGE_PC 0\r