some poor timing improvement attempts

diff --git a/pico/memory.c b/pico/memory.c
index 34ef99d..3900208 100644 (file)
--- a/pico/memory.c
+++ b/pico/memory.c
@@ -1195,6 +1195,8 @@ void PicoWrite16_32x(u32 a, u32 d) {}
 \r
 static unsigned char z80_md_vdp_read(unsigned short a)\r
 {\r
+  z80_subCLeft(2);\r
+\r
   if ((a & 0x00f0) == 0x0000) {\r
     switch (a & 0x0d)\r
     {\r
@@ -1218,8 +1220,10 @@ static unsigned char z80_md_bank_read(unsigned short a)
   unsigned int addr68k;\r
   unsigned char ret;\r
 \r
-  addr68k = Pico.m.z80_bank68k<<15;\r
-  addr68k += a & 0x7fff;\r
+  z80_subCLeft(3);\r
+\r
+  addr68k = Pico.m.z80_bank68k << 15;\r
+  addr68k |= a & 0x7fff;\r
 \r
   ret = m68k_read8(addr68k);\r
 \r

diff --git a/pico/pico_int.h b/pico/pico_int.h
index 97b7b0e..f439d6a 100644 (file)
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -185,6 +185,7 @@ extern struct DrZ80 drZ80;
 #define z80_nmi()          drZ80.Z80IF |= 8\r
 \r
 #define z80_cyclesLeft     drZ80.cycles\r
+#define z80_subCLeft(c)    drZ80.cycles -= c\r
 #define z80_pc()           (drZ80.Z80PC - drZ80.Z80PC_BASE)\r
 \r
 #elif defined(_USE_CZ80)\r
@@ -196,6 +197,7 @@ extern struct DrZ80 drZ80;
 #define z80_nmi()          Cz80_Set_IRQ(&CZ80, IRQ_LINE_NMI, 0)\r
 \r
 #define z80_cyclesLeft     (CZ80.ICount - CZ80.ExtraCycles)\r
+#define z80_subCLeft(c)    CZ80.ICount -= c\r
 #define z80_pc()           Cz80_Get_Reg(&CZ80, CZ80_PC)\r
 \r
 #else\r