timing hack removed, seems to be no longer needed

git-svn-id: file:///home/notaz/opt/svn/PicoDrive@242 be3aeb3a-fb24-0410-a615-afba39da0efa

diff --git a/cpu/Cyclone/OpLogic.cpp b/cpu/Cyclone/OpLogic.cpp
index 4bd0869..94b0017 100644 (file)
--- a/cpu/Cyclone/OpLogic.cpp
+++ b/cpu/Cyclone/OpLogic.cpp
@@ -143,16 +143,8 @@ int OpNeg(int op)
   use=OpBase(op,size);\r
   if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
 \r
-  OpStart(op,ea);   Cycles=size<2?4:6;\r
-  if(ea >= 0x10) {\r
-    Cycles*=2;\r
-#if CYCLONE_FOR_GENESIS\r
-    // This is same as in Starscream core, CLR uses only 6 cycles for memory EAs.\r
-    // May be this is similar case as with TAS opcode, but this time the dummy\r
-    // read is ignored somehow? Without this hack Fatal Rewind hangs even in Gens.\r
-    if(type==1&&size<2) Cycles-=2;\r
-#endif\r
-  }\r
+  OpStart(op,ea); Cycles=size<2?4:6;\r
+  if(ea >= 0x10)  Cycles*=2;\r
 \r
   EaCalc (10,0x003f,ea,size,0,0);\r
 \r

diff --git a/cpu/Cyclone/config.h b/cpu/Cyclone/config.h
index 7736712..e180490 100644 (file)
--- a/cpu/Cyclone/config.h
+++ b/cpu/Cyclone/config.h
@@ -16,7 +16,6 @@
  * Mega Drive system. As VDP chip in these systems had control of the bus,\r
  * several instructions were acting differently, for example TAS did'n have\r
  * the write-back phase. That will be emulated, if this option is enabled.\r
- * This option also alters timing slightly.\r
  */\r
 #define CYCLONE_FOR_GENESIS         0\r
 \r

diff --git a/cpu/Cyclone/config_mamegp2x.h b/cpu/Cyclone/config_mamegp2x.h
index 307b905..bb3f81a 100644 (file)
--- a/cpu/Cyclone/config_mamegp2x.h
+++ b/cpu/Cyclone/config_mamegp2x.h
@@ -16,7 +16,6 @@
  * Mega Drive system. As VDP chip in these systems had control of the bus,\r
  * several instructions were acting differently, for example TAS did'n have\r
  * the write-back phase. That will be emulated, if this option is enabled.\r
- * This option also alters timing slightly.\r
  */\r
 #define CYCLONE_FOR_GENESIS         0\r
 \r

diff --git a/cpu/Cyclone/config_pico.h b/cpu/Cyclone/config_pico.h
index 8f7a336..d3229ac 100644 (file)
--- a/cpu/Cyclone/config_pico.h
+++ b/cpu/Cyclone/config_pico.h
@@ -16,7 +16,6 @@
  * Mega Drive system. As VDP chip in these systems had control of the bus,\r
  * several instructions were acting differently, for example TAS did'n have\r
  * the write-back phase. That will be emulated, if this option is enabled.\r
- * This option also alters timing slightly.\r
  */\r
 #define CYCLONE_FOR_GENESIS         2\r
 \r
@@ -58,7 +57,7 @@
  * MEMHANDLERS_NEED_CYCLES, or else Cyclone will keep reloading the same cycle\r
  * count and this will screw timing (if not cause a deadlock).\r
  */\r
-#define MEMHANDLERS_NEED_PC         1\r
+#define MEMHANDLERS_NEED_PC         0\r
 #define MEMHANDLERS_NEED_PREV_PC    0\r
 #define MEMHANDLERS_NEED_FLAGS      0\r
 #define MEMHANDLERS_NEED_CYCLES     1\r

diff --git a/cpu/Cyclone/config_uae4all.h b/cpu/Cyclone/config_uae4all.h
index d1f68c6..f84dc6d 100644 (file)
--- a/cpu/Cyclone/config_uae4all.h
+++ b/cpu/Cyclone/config_uae4all.h
@@ -16,7 +16,6 @@
  * Mega Drive system. As VDP chip in these systems had control of the bus,\r
  * several instructions were acting differently, for example TAS did'n have\r
  * the write-back phase. That will be emulated, if this option is enabled.\r
- * This option also alters timing slightly.\r
  */\r
 #define CYCLONE_FOR_GENESIS         0\r
 \r

diff --git a/cpu/musashi/m68k_in.c b/cpu/musashi/m68k_in.c
index d3ee866..5c9cc06 100644 (file)
--- a/cpu/musashi/m68k_in.c
+++ b/cpu/musashi/m68k_in.c
@@ -496,9 +496,9 @@ chk2cmp2  32  .     pcdi  0000010011111010  ..........  . . U U   .   .  23  23
 chk2cmp2  32  .     pcix  0000010011111011  ..........  . . U U   .   .  23  23\r
 chk2cmp2  32  .     .     0000010011......  A..DXWL...  . . U U   .   .  18  18\r
 clr        8  .     d     0100001000000...  ..........  U U U U   4   4   2   2\r
-clr        8  .     .     0100001000......  A+-DXWL...  U U U U   6   4   4   4  notaz hack: changed 000 cycles 8 -> 6 like in starscream for Fatal Rewind\r
+clr        8  .     .     0100001000......  A+-DXWL...  U U U U   8   4   4   4\r
 clr       16  .     d     0100001001000...  ..........  U U U U   4   4   2   2\r
-clr       16  .     .     0100001001......  A+-DXWL...  U U U U   6   4   4   4  notaz hack: ditto\r
+clr       16  .     .     0100001001......  A+-DXWL...  U U U U   8   4   4   4\r
 clr       32  .     d     0100001010000...  ..........  U U U U   6   6   2   2\r
 clr       32  .     .     0100001010......  A+-DXWL...  U U U U  12   6   4   4\r
 cmp        8  .     d     1011...000000...  ..........  U U U U   4   4   2   2\r