#ifdef _ASM_MEMORY_C\r
u32 PicoRead8(u32 a);\r
u32 PicoRead16(u32 a);\r
+void PicoWrite8(u32 a,u8 d);\r
void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
void PicoWriteRomHW_in1 (u32 a,u32 d);\r
#endif\r
\r
// -----------------------------------------------------------------\r
\r
+int PadRead(int i)\r
+{\r
+ int pad,value,data_reg;\r
+ pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r
+ data_reg=Pico.ioports[i+1];\r
+\r
+ // orr the bits, which are set as output\r
+ value = data_reg&(Pico.ioports[i+4]|0x80);\r
+\r
+ if(PicoOpt & 0x20) { // 6 button gamepad enabled\r
+ int phase = Pico.m.padTHPhase[i];\r
+\r
+ if(phase == 2 && !(data_reg&0x40)) { // TH\r
+ value|=(pad&0xc0)>>2; // ?0SA 0000\r
+ return value;\r
+ } else if(phase == 3) {\r
+ if(data_reg&0x40)\r
+ value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
+ else\r
+ value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
+ return value;\r
+ }\r
+ }\r
+\r
+ if(data_reg&0x40) // TH\r
+ value|=(pad&0x3f); // ?1CB RLDU\r
+ else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
+\r
+ return value; // will mirror later\r
+}\r
+\r
+\r
#ifndef _ASM_MEMORY_C\r
// address must already be checked\r
static int SRAMRead(u32 a)\r
// -----------------------------------------------------------------\r
// Write Ram\r
\r
-static void CPU_CALL PicoWrite8(u32 a,u8 d)\r
+#ifndef _ASM_MEMORY_C\r
+PICO_INTERNAL_ASM void CPU_CALL PicoWrite8(u32 a,u8 d)\r
{\r
#ifdef __debug_io\r
dprintf("w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
a&=0xffffff;\r
OtherWrite8(a,d,8);\r
}\r
+#endif\r
\r
void CPU_CALL PicoWrite16(u32 a,u16 d)\r
{\r
@ All Rights Reserved\r
\r
\r
+.include "port_config.s"\r
\r
.text\r
\r
.global PicoRead8\r
.global PicoRead16\r
.global PicoRead32\r
+.global PicoWrite8\r
.global PicoWriteRomHW_SSF2\r
+.global m_m68k_read8_misc\r
+.global m_m68k_write8_misc\r
\r
\r
PicoMemReset:\r
m_read8_rom13: @ 0x980000 - 0x9fffff\r
m_read8_rom 0x13\r
\r
+\r
+m_m68k_read8_misc:\r
m_read8_misc:\r
- bic r2, r0, #0x00ff\r
- bic r2, r2, #0xbf00\r
- cmp r2, #0xa00000 @ Z80 RAM?\r
- ldreq r2, =z80Read8\r
+ bic r2, r0, #0x001f @ most commonly we get i/o port read,\r
+ cmp r2, #0xa10000 @ so check for it first\r
+ bne m_read8_misc2\r
+m_read8_misc_io:\r
+ ands r0, r0, #0x1e\r
+ beq m_read8_misc_hwreg\r
+ cmp r0, #4\r
+ ldrle r2, =PadRead\r
+ movlt r0, #0\r
+ moveq r0, #1\r
+ bxle r2\r
+ ldr r3, =(Pico+0x22000)\r
+ mov r0, r0, lsr #1 @ other IO ports (Pico.ioports[a])\r
+ ldrb r0, [r3, r0]\r
+ bx lr\r
+\r
+m_read8_misc_hwreg:\r
+ ldr r3, =(Pico+0x22200)\r
+ ldrb r0, [r3, #0x0f] @ Pico.m.hardware\r
+ bx lr\r
+\r
+m_read8_misc2:\r
+ mov r2, #0xa10000 @ games also like to poll busreq,\r
+ orr r2, r2, #0x001100 @ so we'll try it now\r
+ cmp r0, r2\r
+ ldreq r2, =z80ReadBusReq\r
+ bxeq r2\r
+\r
+ and r2, r0, #0xff0000 @ finally it might be\r
+ cmp r2, #0xa00000 @ z80 area\r
+ bne m_read8_misc3\r
+ tst r0, #0x4000\r
+ ldreq r2, =z80Read8 @ z80 RAM\r
bxeq r2\r
+ and r2, r0, #0x6000\r
+ cmp r2, #0x4000\r
+ mvnne r0, #0\r
+ bxne lr @ invalid\r
+.if EXTERNAL_YM2612\r
+ ldr r1, =PicoOpt\r
+ ldr r1, [r1]\r
+ tst r1, #1\r
+ beq m_read8_fake_ym2612\r
+ tst r1, #0x200\r
+ ldreq r2, =YM2612Read_\r
+ ldrne r2, =YM2612Read_940\r
+.else\r
+ ldr r2, =YM2612Read_\r
+.endif\r
+ bx r2 @ ym2612\r
+\r
+m_read8_fake_ym2612:\r
+ ldr r3, =(Pico+0x22200)\r
+ ldrb r0, [r3, #8] @ Pico.m.rotate\r
+ add r1, r0, #1\r
+ strb r1, [r3, #8]\r
+ and r0, r0, #3\r
+ bx lr\r
+\r
+m_read8_misc3:\r
+ @ if everything else fails, use generic handler\r
stmfd sp!,{r0,lr}\r
bic r0, r0, #1\r
mov r1, #8\r
moveq r0, r0, lsr #8\r
bx lr\r
\r
+\r
m_read8_vdp:\r
tst r0, #0x70000\r
tsteq r0, #0x000e0\r
\r
bx lr\r
\r
+@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
+\r
+@ Here we only handle most often used locations,\r
+@ everything else is passed to generic handlers\r
+\r
+PicoWrite8: @ u32 a, u8 d\r
+ bic r0, r0, #0xff000000\r
+ and r2, r0, #0x00e00000\r
+ cmp r2, #0x00e00000 @ RAM?\r
+ ldr r3, =Pico\r
+ biceq r0, r0, #0x00ff0000\r
+ eoreq r0, r0, #1\r
+ streqb r1, [r3, r0]\r
+ bxeq lr\r
+\r
+m_m68k_write8_misc:\r
+ bic r2, r0, #0x1f @ most commonly we get i/o port write,\r
+ cmp r2, #0xa10000 @ so check for it first\r
+ bne m_write8_misc2\r
+m_write8_io:\r
+ ldr r2, =PicoOpt\r
+ and r0, r0, #0x1e\r
+ ldr r2, [r2]\r
+ ldr r3, =(Pico+0x22000) @ Pico.ioports\r
+ tst r2, #0x20 @ 6 button pad?\r
+ streqb r1, [r3, r0, lsr #1]\r
+ bxeq lr\r
+ cmp r0, #2\r
+ cmpne r0, #4\r
+ bne m_write8_io_done @ not likely to happen\r
+ add r2, r3, #0x200 @ Pico+0x22200\r
+ mov r12,#0\r
+ cmp r0, #2\r
+ streqb r12,[r2,#0x18]\r
+ strneb r12,[r2,#0x19] @ Pico.m.padDelay[i] = 0\r
+ tst r1, #0x40 @ TH\r
+ beq m_write8_io_done\r
+ ldrb r12,[r3, r0, lsr #1]\r
+ tst r12,#0x40\r
+ bne m_write8_io_done\r
+ cmp r0, #2\r
+ ldreqb r12,[r2,#0x0a]\r
+ ldrneb r12,[r2,#0x0b] @ Pico.m.padTHPhase\r
+ add r12,r12,#1\r
+ streqb r12,[r2,#0x0a]\r
+ strneb r12,[r2,#0x0b] @ Pico.m.padTHPhase\r
+m_write8_io_done:\r
+ strb r1, [r3, r0, lsr #1]\r
+ bx lr\r
+\r
+\r
+m_write8_misc2:\r
+ and r2, r0, #0xff0000\r
+ cmp r2, #0xa00000 @ z80 area?\r
+ bne m_write8_not_z80\r
+ tst r0, #0x4000\r
+ bne m_write8_z80_not_ram\r
+ ldr r3, =(Pico+0x20000) @ Pico.zram\r
+ add r2, r3, #0x02200 @ Pico+0x22200\r
+ ldrb r2, [r2, #9] @ Pico.m.z80Run\r
+ bic r0, r0, #0xff0000\r
+ bic r0, r0, #0x00e000\r
+ tst r2, #1\r
+ streqb r1, [r3, r0] @ zram\r
+ bx lr\r
+\r
+m_write8_z80_not_ram:\r
+ and r2, r0, #0x6000\r
+ cmp r2, #0x4000\r
+ bne m_write8_z80_not_ym2612\r
+ ldr r2, =PicoOpt\r
+ and r0, r0, #3\r
+ ldr r2, [r2]\r
+ tst r2, #1\r
+ bxeq lr\r
+ stmfd sp!,{lr}\r
+.if EXTERNAL_YM2612\r
+ tst r2, #0x200\r
+ ldreq r2, =YM2612Write_\r
+ ldrne r2, =YM2612Write_940\r
+ mov lr, pc\r
+ bx r2\r
+.else\r
+ bl YM2612Write_\r
+.endif\r
+ ldr r2, =emustatus\r
+ ldmfd sp!,{lr}\r
+ ldr r1, [r2]\r
+ orr r1, r0, r2\r
+ str r1, [r2] @ emustatus|=YM2612Write(a&3, d);\r
+ bx lr\r
+\r
+m_write8_z80_not_ym2612: @ not too likely\r
+ mov r2, r0, lsl #17\r
+ bic r2, r2, #6<<17\r
+ mov r3, #0x7f00\r
+ orr r3, r3, #0x0011\r
+ cmp r3, r2, lsr #17 @ psg @ z80 area?\r
+ beq m_write8_psg\r
+ and r2, r0, #0x7f00\r
+ cmp r2, #0x6000 @ bank register?\r
+ bxne lr @ invalid write\r
+\r
+m_write8_z80_bank_reg:\r
+ ldr r3, =(Pico+0x22208) @ Pico.m\r
+ ldrh r2, [r3, #0x0a]\r
+ mov r1, r1, lsr #8\r
+ orr r2, r1, r2, lsr #1\r
+ bic r2, r2, #0xfe00\r
+ strh r2, [r3, #0x0a]\r
+ bx lr\r
+\r
+\r
+m_write8_not_z80:\r
+ and r2, r0, #0xe70000\r
+ cmp r2, #0xc00000 @ VDP area?\r
+ bne m_write8_misc4\r
+ and r2, r0, #0xf9\r
+ cmp r2, #0x11\r
+ bne m_write8_misc4\r
+m_write8_psg:\r
+ ldr r2, =PicoOpt\r
+ mov r0, r1\r
+ ldr r2, [r2]\r
+ tst r2, #2\r
+ bxeq lr\r
+ ldr r2, =SN76496Write\r
+ bx r2\r
+ \r
+\r
+m_write8_misc4:\r
+ @ passthrough\r
+ ldr r2, =OtherWrite8\r
+ bx r2\r
+\r
static void OtherWrite8End(u32 a,u32 d,int realsize);
#endif
-static int PadRead(int i)
-{
- int pad=0,value=0,TH;
- pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU
- TH=Pico.ioports[i+1]&0x40;
-
- if(PicoOpt & 0x20) { // 6 button gamepad enabled
- int phase = Pico.m.padTHPhase[i];
-
- if(phase == 2 && !TH) {
- value=(pad&0xc0)>>2; // ?0SA 0000
- goto end;
- } else if(phase == 3 && TH) {
- value=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ
- goto end;
- } else if(phase == 3 && !TH) {
- value=((pad&0xc0)>>2)|0x0f; // ?0SA 1111
- goto end;
- }
- }
-
- if(TH) value=(pad&0x3f); // ?1CB RLDU
- else value=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU
-
- end:
-
- // orr the bits, which are set as output
- value |= Pico.ioports[i+1]&Pico.ioports[i+4];
-
- return value; // will mirror later
-}
-
#ifndef _ASM_MEMORY_C
static
return Pico.zram[a];
}
-
#ifndef _ASM_MEMORY_C
static
#endif
-u32 OtherRead16(u32 a, int realsize)
+u32 z80ReadBusReq(void)
{
- u32 d=0;
+ u32 d=Pico.m.z80Run&1;
+ if (!d) {
+ // needed by buggy Terminator (Sega CD)
+ int stop_before = SekCyclesDone() - z80stopCycle;
+ dprintf("stop before: %i", stop_before);
+ if (stop_before > 0 && stop_before <= 32) // Gens uses 16 here
+ d = 1; // bus not yet available
+ }
+ // |=0x80 for Shadow of the Beast & Super Offroad
+ return d|0x80;
+}
- if ((a&0xff0000)==0xa00000) {
- if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
- if ((a&0x6000)==0x4000) { // 0x4000-0x5fff, Fudge if disabled
- if(PicoOpt&1) d=YM2612Read();
- else d=Pico.m.rotate++&3;
- dprintf("read ym2612: %04x", d);
- goto end;
+#ifndef _ASM_MEMORY_C
+static
+#endif
+void z80WriteBusReq(u32 d)
+{
+ d&=1; d^=1;
+ if(!d) {
+ // this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
+ if (Pico.m.z80Run) {
+ int lineCycles;
+ z80stopCycle = SekCyclesDone();
+ if (Pico.m.z80Run&2)
+ lineCycles=(488-SekCyclesLeft)&0x1ff;
+ else lineCycles=z80stopCycle-z80startCycle; // z80 was started at current line
+ if (lineCycles > 0 && lineCycles <= 488) {
+ dprintf("zrun: %i/%i cycles", lineCycles, (lineCycles>>1)-(lineCycles>>5));
+ lineCycles=(lineCycles>>1)-(lineCycles>>5);
+ z80_run(lineCycles);
+ }
}
- d=0xffff;
- goto end;
+ } else {
+ z80startCycle = SekCyclesDone();
+ //if(Pico.m.scanline != -1)
}
+ dprintf("set_zrun: %02x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), /*mz80GetRegisterValue(NULL, 0),*/ SekPc);
+ Pico.m.z80Run=(u8)d;
+}
+
+#ifndef _ASM_MEMORY_C
+static
+#endif
+u32 OtherRead16(u32 a, int realsize)
+{
+ u32 d=0;
if ((a&0xffffe0)==0xa10000) { // I/O ports
a=(a>>1)&0xf;
switch(a) {
case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
- case 1: d=PadRead(0); d|=Pico.ioports[1]&0x80; break;
- case 2: d=PadRead(1); d|=Pico.ioports[2]&0x80; break;
+ case 1: d=PadRead(0); break;
+ case 2: d=PadRead(1); break;
default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
}
d|=d<<8;
// |=0x80 for Shadow of the Beast & Super Offroad; rotate fakes next fetched instruction for Time Killers
if (a==0xa11100) { // z80 busreq
- d=Pico.m.z80Run&1;
-#if 1
- if (!d) {
- // needed by buggy Terminator (Sega CD)
- int stop_before = SekCyclesDone() - z80stopCycle;
- dprintf("stop before: %i", stop_before);
- if (stop_before > 0 && stop_before <= 32) // Gens uses 16 here
- d = 1; // bus not yet available
- }
-#endif
- d=(d<<8)|0x8000|Pico.m.rotate++;
+ d=(z80ReadBusReq()<<8)|Pico.m.rotate++;
dprintf("get_zrun: %04x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), SekPc);
goto end;
}
+ if ((a&0xff0000)==0xa00000) {
+ if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
+ if ((a&0x6000)==0x4000) { // 0x4000-0x5fff, Fudge if disabled
+ if(PicoOpt&1) d=YM2612Read();
+ else d=Pico.m.rotate++&3;
+ dprintf("read ym2612: %04x", d);
+ goto end;
+ }
+ d=0xffff;
+ goto end;
+ }
+
#ifndef _ASM_MEMORY_C
if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }
#endif
return d;
}
-
-//extern UINT32 mz80GetRegisterValue(void *, UINT32);
+static void IoWrite8(u32 a, u32 d)
+{
+ a=(a>>1)&0xf;
+ // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
+ if(PicoOpt&0x20) {
+ if(a==1) {
+ Pico.m.padDelay[0] = 0;
+ if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
+ }
+ else if(a==2) {
+ Pico.m.padDelay[1] = 0;
+ if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
+ }
+ }
+ Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
+}
#ifndef _ASM_CD_MEMORY_C
static
#endif
-void OtherWrite8(u32 a,u32 d,int realsize)
+void OtherWrite8(u32 a,u32 d)
{
+#ifndef _ASM_MEMORY_C
if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram
if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound
- if ((a&0xffffe0)==0xa10000) { // I/O ports
- a=(a>>1)&0xf;
- // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
- if(PicoOpt&0x20) {
- if(a==1) {
- Pico.m.padDelay[0] = 0;
- if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
- }
- else if(a==2) {
- Pico.m.padDelay[1] = 0;
- if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
- }
- }
- Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
- return;
- }
- if (a==0xa11100) {
- //int lineCycles=(488-SekCyclesLeft)&0x1ff;
- d&=1; d^=1;
- if(!d) {
- // this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
- if (Pico.m.z80Run) {
- int lineCycles;
- z80stopCycle = SekCyclesDone();
- if (Pico.m.z80Run&2)
- lineCycles=(488-SekCyclesLeft)&0x1ff;
- else lineCycles=z80stopCycle-z80startCycle; // z80 was started at current line
- if (lineCycles > 0 && lineCycles <= 488) {
- dprintf("zrun: %i/%i cycles", lineCycles, (lineCycles>>1)-(lineCycles>>5));
- lineCycles=(lineCycles>>1)-(lineCycles>>5);
- z80_run(lineCycles);
- }
- }
- } else {
- z80startCycle = SekCyclesDone();
- //if(Pico.m.scanline != -1)
- }
- dprintf("set_zrun: %02x [%i|%i] @%06x", d, Pico.m.scanline, SekCyclesDone(), /*mz80GetRegisterValue(NULL, 0),*/ SekPc);
- Pico.m.z80Run=(u8)d; return;
- }
+ if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
+#endif
+ if (a==0xa11100) { z80WriteBusReq(d); return; }
if (a==0xa11200) {
dprintf("write z80Reset: %02x", d);
if(!(d&1)) z80_reset();
return;
}
-
+#ifndef _ASM_MEMORY_C
if ((a&0xff7f00)==0xa06000) // Z80 BANK register
{
Pico.m.z80_bank68k>>=1;
Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
return;
}
-
+#endif
if ((a&0xe700e0)==0xc00000) {
PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored
return;
}
- OtherWrite8End(a, d, realsize);
+ OtherWrite8End(a, d, 8);
}
void OtherWrite16(u32 a,u32 d)
{
if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }
+ if (a==0xa11100) { z80WriteBusReq(d>>8); return; }
+ if (a==0xa11200) { dprintf("write z80reset: %04x", d); if(!(d&0x100)) z80_reset(); return; }
+ if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)
-
- if ((a&0xffffe0)==0xa10000) { // I/O ports
- a=(a>>1)&0xf;
- // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
- if(PicoOpt&0x20) {
- if(a==1) {
- Pico.m.padDelay[0] = 0;
- if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
- }
- else if(a==2) {
- Pico.m.padDelay[1] = 0;
- if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
- }
- }
- Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
+ if ((a&0xe700f8)==0xc00010||(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
+ if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound (??)
+ if ((a&0xff7f00)==0xa06000) // Z80 BANK register
+ {
+ Pico.m.z80_bank68k>>=1;
+ Pico.m.z80_bank68k|=(d&1)<<8;
+ Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
return;
}
- if (a==0xa11100) { OtherWrite8(a, d>>8, 16); return; }
- if (a==0xa11200) { dprintf("write z80reset: %04x", d); if(!(d&0x100)) z80_reset(); return; }
- OtherWrite8(a, d>>8, 16);
- OtherWrite8(a+1,d&0xff, 16);
+ OtherWrite8End(a, d>>8, 16);
+ OtherWrite8End(a+1,d&0xff, 16);
}
{\r
unsigned char rotate;\r
unsigned char z80Run;\r
- unsigned char padTHPhase[2]; // phase of gamepad TH switches\r
- short scanline; // 0 to 261||311; -1 in fast mode\r
- char dirtyPal; // Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
- unsigned char hardware; // Hardware value for country\r
- unsigned char pal; // 1=PAL 0=NTSC\r
- unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)\r
- unsigned short z80_bank68k;\r
+ unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches\r
+ short scanline; // 04 0 to 261||311; -1 in fast mode\r
+ char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
+ unsigned char hardware; // 07 Hardware value for country\r
+ unsigned char pal; // 08 1=PAL 0=NTSC\r
+ unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)\r
+ unsigned short z80_bank68k; // 0a\r
unsigned short z80_lastaddr; // this is for Z80 faking\r
unsigned char z80_fakeval;\r
unsigned char pad0;\r
- unsigned char padDelay[2]; // gamepad phase time outs, so we count a delay\r
+ unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay\r
unsigned short sram_addr; // EEPROM address register\r
unsigned char sram_cycle; // EEPROM SRAM cycle number\r
unsigned char sram_slave; // EEPROM slave word for X24C02 and better SRAMs\r
PICO_INTERNAL_ASM unsigned int CPU_CALL PicoRead32(unsigned int a);\r
PICO_INTERNAL void PicoMemSetup(void);\r
PICO_INTERNAL_ASM void PicoMemReset(void);\r
+PICO_INTERNAL int PadRead(int i);\r
PICO_INTERNAL unsigned char z80_read(unsigned short a);\r
PICO_INTERNAL unsigned short z80_read16(unsigned short a);\r
PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a);\r
.extern PicoCpuS68k
.extern s68k_poll_detect
.extern SN76496Write
+.extern m_m68k_read8_misc
+.extern m_m68k_write8_misc
@ r0=reg3, r1-r3=temp
bic r2, r0, #0xfe0000
bic r2, r2, #0x3f
cmp r2, #0x012000
- bne m_m68k_read8_misc
+ bne m_m68k_read8_misc @ now from Pico/Memory.s
ldr r1, =(Pico+0x22200)
and r0, r0, #0x3f
ldrb r0, [r1, r0]
bx lr
-
+/*
m_m68k_read8_misc:
bic r2, r0, #0x00ff
bic r2, r2, #0xbf00
tst r1, #1
moveq r0, r0, lsr #8
bx lr
-
+*/
m_m68k_read8_vdp:
tst r0, #0x70000
cmp r2, #0x012000
beq m68k_reg_write8
mov r2, #8
- b OtherWrite8
+@ b OtherWrite8
+ b m_m68k_write8_misc
m_m68k_write8_vdp:
.if DRZ80_FOR_PICODRIVE\r
\r
.macro YM2612Read_and_ret8\r
- stmfd sp!,{r3,r12,lr}\r
+ stmfd sp!,{r3,r12,lr}\r
.if EXTERNAL_YM2612\r
ldr r1,=PicoOpt\r
ldr r1,[r1]\r
tst r1,#0x200\r
- bne 10f\r
- bl YM2612Read_\r
- ldmfd sp!,{r3,r12,pc}\r
-10:\r
- bl YM2612Read_940\r
+ ldrne r2, =YM2612Read_940\r
+ ldreq r2, =YM2612Read_\r
+ mov lr,pc\r
+ bx r2\r
.else\r
bl YM2612Read_\r
.endif\r
- ldmfd sp!,{r3,r12,pc}\r
+ ldmfd sp!,{r3,r12,pc}\r
.endm\r
\r
.macro YM2612Read_and_ret16\r
- stmfd sp!,{r3,r12,lr}\r
+ stmfd sp!,{r3,r12,lr}\r
.if EXTERNAL_YM2612\r
ldr r0,=PicoOpt\r
ldr r0,[r0]\r
tst r0,#0x200\r
- bne 10f\r
- bl YM2612Read_\r
- orr r0,r0,r0,lsl #8\r
- ldmfd sp!,{r3,r12,pc}\r
-10:\r
- bl YM2612Read_940\r
+ ldrne r2, =YM2612Read_940\r
+ ldreq r2, =YM2612Read_\r
+ mov lr,pc\r
+ bx r2\r
orr r0,r0,r0,lsl #8\r
.else\r
bl YM2612Read_\r
orr r0,r0,r0,lsl #8\r
.endif\r
- ldmfd sp!,{r3,r12,pc}\r
+ ldmfd sp!,{r3,r12,pc}\r
.endm\r
\r
pico_z80_read8: @ addr\r
cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
bne 0f\r
and r0,r0,#3\r
- YM2612Read_and_ret8\r
+ YM2612Read_and_ret8\r
0:\r
cmp r0,#0x4000\r
movge r0,#0xff\r
@$(GCC) $(COPT) $^ $(LDFLAGS) -lm -lpng -Wl,-Map=PicoDrive.map -o $@
+../../cpu/musashi/m68kops.c :
+ @make -C ../../cpu/musashi
+
../../cpu/mz80/mz80.o : ../../cpu/mz80/mz80.asm
@echo $@
@nasm -f elf $< -o $@
notaz.gp2x.de / picodrive.git / commitdiff