5, 6, 6, 7, 8, 8, 9,10,11,12,13,14,16,16,16,16,\r
/* FD=3 */\r
2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7,\r
- 8 , 8, 9,10,11,12,13,14,16,17,19,20,22,22,22,22\r
+ 8 ,8, 9,10,11,12,13,14,16,17,19,20,22,22,22,22\r
};\r
\r
\r
UINT32 fn;\r
int kc,fc;\r
\r
+ blk = block_fnum >> 11;\r
block_fnum = block_fnum*2 + lfo_fn_table_index_offset;\r
\r
- blk = (block_fnum&0x7000) >> 12;\r
fn = block_fnum & 0xfff;\r
\r
/* keyscale code */\r
/* update phase increment and envelope generator */\r
INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT, int fc, int kc)\r
{\r
- int ksr;\r
+ int ksr, fdt;\r
\r
/* (frequency) phase increment counter */\r
- SLOT->Incr = ((fc+SLOT->DT[kc])*SLOT->mul) >> 1;\r
+ fdt = fc+SLOT->DT[kc];\r
+ /* detect overflow */\r
+// if (fdt < 0) fdt += fn_table[0x7ff*2] >> (7-blk-1);\r
+ if (fdt < 0) fdt += fn_table[0x7ff*2] >> 2;\r
+ SLOT->Incr = fdt*SLOT->mul >> 1;\r
\r
ksr = kc >> SLOT->KSR;\r
if( SLOT->ksr != ksr )\r
}\r
}\r
\r
+INLINE void refresh_fc_eg_chan_sl3(void)\r
+{\r
+ if( ym2612.CH[2].SLOT[SLOT1].Incr==-1)\r
+ {\r
+ refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT1], ym2612.OPN.SL3.fc[1], ym2612.OPN.SL3.kcode[1] );\r
+ refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT2], ym2612.OPN.SL3.fc[2], ym2612.OPN.SL3.kcode[2] );\r
+ refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT3], ym2612.OPN.SL3.fc[0], ym2612.OPN.SL3.kcode[0] );\r
+ refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT4], ym2612.CH[2].fc , ym2612.CH[2].kcode );\r
+ }\r
+}\r
+\r
/* initialize time tables */\r
static void init_timetables(const UINT8 *dttable)\r
{\r
\r
ym2612.OPN.eg_timer_add = (1<<EG_SH) * ym2612.OPN.ST.freqbase;\r
\r
-\r
/* make time tables */\r
init_timetables( dt_tab );\r
\r
switch( OPN_SLOT(r) ){\r
case 0: /* 0xa0-0xa2 : FNUM1 | depends on fn_h (below) */\r
{\r
- UINT32 fn = (((UINT32)( (ym2612.OPN.ST.fn_h)&7))<<8) + v;\r
- UINT8 blk = ym2612.OPN.ST.fn_h>>3;\r
+ UINT32 fn = (((UINT32)( (CH->fn_h)&7))<<8) + v;\r
+ UINT8 blk = CH->fn_h>>3;\r
/* keyscale code */\r
CH->kcode = (blk<<2) | opn_fktable[fn >> 7];\r
/* phase increment counter */\r
}\r
break;\r
case 1: /* 0xa4-0xa6 : FNUM2,BLK */\r
- ym2612.OPN.ST.fn_h = v&0x3f;\r
+ CH->fn_h = v&0x3f;\r
ret = 0;\r
break;\r
case 2: /* 0xa8-0xaa : 3CH FNUM1 */\r
refresh_fc_eg_chan( &ym2612.CH[0] );\r
refresh_fc_eg_chan( &ym2612.CH[1] );\r
if( (ym2612.OPN.ST.mode & 0xc0) )\r
- {\r
/* 3SLOT MODE */\r
- if( ym2612.CH[2].SLOT[SLOT1].Incr==-1)\r
- {\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT1], ym2612.OPN.SL3.fc[1], ym2612.OPN.SL3.kcode[1] );\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT2], ym2612.OPN.SL3.fc[2], ym2612.OPN.SL3.kcode[2] );\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT3], ym2612.OPN.SL3.fc[0], ym2612.OPN.SL3.kcode[0] );\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT4], ym2612.CH[2].fc , ym2612.CH[2].kcode );\r
- }\r
- } else refresh_fc_eg_chan( &ym2612.CH[2] );\r
+ refresh_fc_eg_chan_sl3();\r
+ else\r
+ refresh_fc_eg_chan( &ym2612.CH[2] );\r
refresh_fc_eg_chan( &ym2612.CH[3] );\r
refresh_fc_eg_chan( &ym2612.CH[4] );\r
refresh_fc_eg_chan( &ym2612.CH[5] );\r
UINT32 eg_timer;\r
UINT32 lfo_cnt;\r
UINT16 lfo_ampm;\r
- UINT8 fn_h;\r
- UINT8 fn_h_sl3;\r
+ UINT16 unused2;\r
UINT32 keyon_field; // 20\r
UINT32 kcode_fc_sl3_3;\r
} ym_save_addon;\r
unsigned char *ptr;\r
int c, s;\r
\r
- refresh_fc_eg_chan( &ym2612.CH[0] );\r
- refresh_fc_eg_chan( &ym2612.CH[1] );\r
- if( (ym2612.OPN.ST.mode & 0xc0) )\r
- {\r
- /* 3SLOT MODE */\r
- if( ym2612.CH[2].SLOT[SLOT1].Incr==-1)\r
- {\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT1], ym2612.OPN.SL3.fc[1], ym2612.OPN.SL3.kcode[1] );\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT2], ym2612.OPN.SL3.fc[2], ym2612.OPN.SL3.kcode[2] );\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT3], ym2612.OPN.SL3.fc[0], ym2612.OPN.SL3.kcode[0] );\r
- refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT4], ym2612.CH[2].fc , ym2612.CH[2].kcode );\r
- }\r
- } else refresh_fc_eg_chan( &ym2612.CH[2] );\r
- refresh_fc_eg_chan( &ym2612.CH[3] );\r
- refresh_fc_eg_chan( &ym2612.CH[4] );\r
- refresh_fc_eg_chan( &ym2612.CH[5] );\r
-\r
memset(&sa, 0, sizeof(sa));\r
memset(&sa2, 0, sizeof(sa2));\r
\r
sa.address = ym2612.OPN.ST.address;\r
sa.status = ym2612.OPN.ST.status;\r
sa.addr_A1 = ym2612.addr_A1;\r
- sa.unused = 0;\r
sa.TAT = tat;\r
sa.TBT = tbt;\r
sa.eg_cnt = ym2612.OPN.eg_cnt;\r
sa.eg_timer = ym2612.OPN.eg_timer;\r
sa.lfo_cnt = ym2612.OPN.lfo_cnt;\r
sa.lfo_ampm = g_lfo_ampm;\r
- sa.fn_h = ym2612.REGS[0xa4] = ym2612.OPN.ST.fn_h;\r
- sa.fn_h_sl3 = ym2612.REGS[0xac] = ym2612.OPN.SL3.fn_h;\r
memcpy(ptr, &sa, sizeof(sa)); // 0x30 max\r
}\r
\r
\r
UINT8 ALGO; /* +00 algorithm */\r
UINT8 FB; /* feedback shift */\r
+ UINT8 pad[2];\r
INT32 op1_out; /* op1 output for feedback */\r
\r
INT32 mem_value; /* +08 delayed sample (MEM) value */\r
UINT8 ams; /* channel AMS */\r
\r
UINT8 kcode; /* +11 key code: */\r
+ UINT8 fn_h; /* freq latch */\r
+ UINT8 pad2;\r
UINT32 fc; /* fnum,blk:adjusted to sample rate */\r
UINT32 block_fnum; /* current blk/fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */\r
\r
/* LFO */\r
UINT8 AMmasks; /* AM enable flag */\r
-\r
+ UINT8 pad3[3];\r
} FM_CH;\r
\r
typedef struct\r
UINT8 address; /* 10 address register | need_save */\r
UINT8 status; /* 11 status flag | need_save */\r
UINT8 mode; /* mode CSM / 3SLOT */\r
- UINT8 fn_h; /* freq latch */\r
+ UINT8 pad;\r
int TA; /* timer a */\r
int TAC; /* timer a maxval */\r
int TAT; /* timer a ticker | need_save */\r
UINT8 TB; /* timer b */\r
- UINT8 pad[3];\r
+ UINT8 pad2[3];\r
int TBC; /* timer b maxval */\r
int TBT; /* timer b ticker | need_save */\r
/* local time tables */\r
FM_3SLOT SL3; /* 3 slot mode state */\r
UINT32 pan; /* fm channels output mask (bit 1 = enable) */\r
\r
- UINT32 eg_cnt; /* #0xb38 global envelope generator counter | need_save */\r
- UINT32 eg_timer; /* #0xb3c global envelope generator counter works at frequency = chipclock/64/3 | need_save */\r
- UINT32 eg_timer_add; /* #0xb40 step of eg_timer */\r
+ UINT32 eg_cnt; /* global envelope generator counter | need_save */\r
+ UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 | need_save */\r
+ UINT32 eg_timer_add; /* step of eg_timer */\r
\r
/* LFO */\r
UINT32 lfo_cnt; /* need_save */\r
UINT8 REGS[0x200]; /* registers (for save states) */\r
INT32 addr_A1; /* address line A1 | need_save */\r
\r
- FM_CH CH[6]; /* channel state (0x168 bytes each)? */\r
+ FM_CH CH[6]; /* channel state */\r
\r
/* dac output (YM2612) */\r
int dacen;\r