core z80, bus blocking for VDP DMA

diff --git a/pico/memory.c b/pico/memory.c
index 0c06aca..eca0ba4 100644 (file)
--- a/pico/memory.c
+++ b/pico/memory.c
@@ -565,6 +565,7 @@ void NOINLINE ctl_write_z80reset(u32 d)
         pprof_end_sub(m68k);\r
       }\r
       Pico.t.z80_busdelay &= 0xff; // also resets bus request\r
+      Pico.video.status &= ~PVS_Z80WAIT;\r
       YM2612ResetChip();\r
       timers_reset();\r
     }\r
@@ -1369,8 +1370,10 @@ void PicoWrite16_32x(u32 a, u32 d) {}
 static void access_68k_bus(int delay) // bus delay as Q8\r
 {\r
   // TODO: if the 68K is in DMA wait, Z80 has to wait until DMA ends\r
-  if (Pico.video.status & (PVS_CPUWR|PVS_CPURD))\r
+  if (Pico.video.status & (PVS_CPUWR|PVS_CPURD)) {\r
     z80_subCLeft(z80_cyclesLeft); // rather rough on both condition and action\r
+    Pico.video.status |= PVS_Z80WAIT;\r
+  }\r
 \r
   // 68k bus access delay for z80. The fractional part needs to be accumulated\r
   // until an additional cycle is full. That is then added to the integer part.\r

diff --git a/pico/pico_cmn.c b/pico/pico_cmn.c
index af2e598..cd03789 100644 (file)
--- a/pico/pico_cmn.c
+++ b/pico/pico_cmn.c
@@ -125,6 +125,12 @@ static void do_timing_hacks_start(struct PicoVideo *pv)
   int cycles = PicoVideoFIFOHint();
 
   SekCyclesBurn(cycles); // prolong cpu HOLD if necessary
+  if (pv->status & PVS_Z80WAIT) {
+    Pico.t.z80c_cnt += cycles_68k_to_z80(cycles);
+    if (!(pv->status & (PVS_CPUWR|PVS_CPURD)))
+      pv->status &= ~PVS_Z80WAIT;
+  }
+
   // XXX how to handle Z80 bus cycle stealing during DMA correctly?
   if ((Pico.t.z80_buscycles -= cycles) < 0)
     Pico.t.z80_buscycles = 0;

diff --git a/pico/pico_int.h b/pico/pico_int.h
index 995f8c1..49361f1 100644 (file)
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -299,6 +299,7 @@ extern SH2 sh2s[2];
 #define PVS_DMAFILL   (1 << 20) // DMA fill is waiting for fill data\r
 #define PVS_DMABG     (1 << 21) // background DMA operation is running\r
 #define PVS_FIFORUN   (1 << 22) // FIFO is processing\r
+#define PVS_Z80WAIT   (1 << 23) // Z80 blocked by VDP DMA\r
 \r
 struct PicoVideo\r
 {\r