Cyclone: direct memhandler calls option + reset function

git-svn-id: file:///home/notaz/opt/svn/PicoDrive@778 be3aeb3a-fb24-0410-a615-afba39da0efa

diff --git a/cpu/Cyclone/Cyclone.h b/cpu/Cyclone/Cyclone.h
index 9ef7090..fc7695e 100644 (file)
--- a/cpu/Cyclone/Cyclone.h
+++ b/cpu/Cyclone/Cyclone.h
@@ -52,6 +52,9 @@ struct Cyclone
 // Initialize. Used only if Cyclone was compiled with compressed jumptable, see config.h\r
 void CycloneInit(void);\r
 \r
+// Reset\r
+void CycloneReset(struct Cyclone *pcy);\r
+\r
 // Run cyclone. Cycles should be specified in context (pcy->cycles)\r
 void CycloneRun(struct Cyclone *pcy);\r
 \r

diff --git a/cpu/Cyclone/Main.cpp b/cpu/Cyclone/Main.cpp
index 1093160..9871437 100644 (file)
--- a/cpu/Cyclone/Main.cpp
+++ b/cpu/Cyclone/Main.cpp
@@ -300,6 +300,32 @@ static void PrintFramework()
 #endif\r
   ot("\n");\r
 \r
+  // --------------\r
+  ot("CycloneReset%s\n", ms?"":":");\r
+  ot("  stmfd sp!,{r7,lr}\n");\r
+  ot("  mov r7,r0\n");\r
+  ot("  mov r0,#0\n");\r
+  ot("  str r0,[r7,#0x58] ;@ state_flags\n");\r
+  ot("  str r0,[r7,#0x48] ;@ OSP\n");\r
+  ot("  mov r1,#0x27 ;@ Supervisor mode\n");\r
+  ot("  strb r1,[r7,#0x44] ;@ set SR high\n");\r
+  ot("  strb r0,[r7,#0x47] ;@ IRQ\n");\r
+  MemHandler(0,2);\r
+  ot("  str r0,[r7,#0x3c] ;@ Stack pointer\n");\r
+  ot("  mov r0,#0\n");\r
+  ot("  str r0,[r7,#0x60] ;@ Membase\n");\r
+  ot("  mov r0,#4\n");\r
+  MemHandler(0,2);\r
+#ifdef MEMHANDLERS_DIRECT_PREFIX\r
+  ot("  bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);\r
+#else\r
+  ot("  mov lr,pc\n");\r
+  ot("  ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+#endif\r
+  ot("  str r0,[r7,#0x40] ;@ PC + base\n");\r
+  ot("  ldmfd sp!,{r7,pc}\n");\r
+  ot("\n");\r
+\r
   // --------------\r
   // 68k: XNZVC, ARM: NZCV\r
   ot("CycloneSetSr%s\n", ms?"":":");\r
@@ -375,9 +401,10 @@ static void PrintFramework()
 \r
   // --------------\r
   ot("CycloneUnpack%s\n", ms?"":":");\r
-  ot("  stmfd sp!,{r4,r5,lr}\n");\r
-  ot("  mov r4,r0\n");\r
-  ot("  mov r5,r1\n");\r
+  ot("  stmfd sp!,{r5,r7,lr}\n");\r
+  ot("  mov r7,r0\n");\r
+  ot("  movs r5,r1\n");\r
+  ot("  beq c_unpack_do_pc\n");\r
   ot("  mov r3,#16\n");\r
   ot(";@ 0x00-0x3f: DA registers\n");\r
   ot("c_unpack_loop%s\n",ms?"":":");\r
@@ -387,30 +414,37 @@ static void PrintFramework()
   ot("  bne c_unpack_loop\n");\r
   ot(";@ 0x40: PC\n");\r
   ot("  ldr r0,[r5],#4 ;@ PC\n");\r
-#if USE_CHECKPC_CALLBACK\r
-  ot("  mov r1,#0\n");\r
-  ot("  str r1,[r4,#0x60] ;@ Memory base\n");\r
-  ot("  mov lr,pc\n");\r
-  ot("  ldr pc,[r4,#0x64] ;@ Call checkpc()\n");\r
-#else\r
-  ot("  ldr r1,[r4,#0x60] ;@ Memory base\n");\r
-  ot("  add r0,r0,r1 ;@ r0 = Memory Base + New PC\n");\r
-#endif\r
-  ot("  str r0,[r4,#0x40] ;@ PC + Memory Base\n");\r
+  ot("  str r0,[r7,#0x40] ;@ handle later\n");\r
   ot(";@ 0x44: SR\n");\r
   ot("  ldrh r1,[r5],#2\n");\r
-  ot("  mov r0,r4\n");\r
+  ot("  mov r0,r7\n");\r
   ot("  bl CycloneSetSr\n");\r
   ot(";@ 0x46: IRQ level\n");\r
   ot("  ldrb r0,[r5],#2\n");\r
-  ot("  strb r0,[r4,#0x47]\n");\r
+  ot("  strb r0,[r7,#0x47]\n");\r
   ot(";@ 0x48: other SP\n");\r
   ot("  ldr r0,[r5],#4\n");\r
-  ot("  str r0,[r4,#0x48]\n");\r
+  ot("  str r0,[r7,#0x48]\n");\r
   ot(";@ 0x4c: CPU state flags\n");\r
   ot("  ldr r0,[r5],#4\n");\r
-  ot("  str r0,[r4,#0x58]\n");\r
-  ot("  ldmfd sp!,{r4,r5,pc}\n");\r
+  ot("  str r0,[r7,#0x58]\n");\r
+  ot("c_unpack_do_pc%s\n",ms?"":":");\r
+  ot("  ldr r0,[r7,#0x40] ;@ unbased PC\n");\r
+#if USE_CHECKPC_CALLBACK\r
+  ot("  mov r1,#0\n");\r
+  ot("  str r1,[r7,#0x60] ;@ Memory base\n");\r
+ #ifdef MEMHANDLERS_DIRECT_PREFIX\r
+  ot("  bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);\r
+ #else\r
+  ot("  mov lr,pc\n");\r
+  ot("  ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+ #endif\r
+#else\r
+  ot("  ldr r1,[r7,#0x60] ;@ Memory base\n");\r
+  ot("  add r0,r0,r1 ;@ r0 = Memory Base + New PC\n");\r
+#endif\r
+  ot("  str r0,[r7,#0x40] ;@ PC + Memory Base\n");\r
+  ot("  ldmfd sp!,{r5,r7,pc}\n");\r
   ot("\n");\r
 \r
   // --------------\r
@@ -549,12 +583,20 @@ static void PrintFramework()
   MemHandler(0,2,0,0);\r
   ot("  tst r0,r0 ;@ uninitialized int vector?\n");\r
   ot("  moveq r0,#0x3c\n");\r
+ #ifdef MEMHANDLERS_DIRECT_PREFIX\r
+  ot("  bleq %sread32 ;@ Call read32(r0) handler\n", MEMHANDLERS_DIRECT_PREFIX);\r
+ #else\r
   ot("  moveq lr,pc\n");\r
   ot("  ldreq pc,[r7,#0x70] ;@ Call read32(r0) handler\n");\r
+ #endif\r
 #if USE_CHECKPC_CALLBACK\r
   ot("  add lr,pc,#4\n");\r
   ot("  add r0,r0,r11 ;@ r0 = Memory Base + New PC\n");\r
+ #ifdef MEMHANDLERS_DIRECT_PREFIX\r
+  ot("  bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);\r
+ #else\r
   ot("  ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+ #endif\r
  #if EMULATE_ADDRESS_ERRORS_JUMP\r
   ot("  mov r4,r0\n");\r
  #else\r
@@ -636,7 +678,11 @@ static void PrintFramework()
 #if USE_CHECKPC_CALLBACK\r
   ot("  add lr,pc,#4\n");\r
   ot("  add r0,r0,r3 ;@ r0 = Memory Base + New PC\n");\r
+ #ifdef MEMHANDLERS_DIRECT_PREFIX\r
+  ot("  bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);\r
+ #else\r
   ot("  ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+ #endif\r
  #if EMULATE_ADDRESS_ERRORS_JUMP\r
   ot("  mov r4,r0\n");\r
  #else\r
@@ -763,7 +809,11 @@ static void PrintFramework()
 #if USE_CHECKPC_CALLBACK\r
   ot("  add lr,pc,#4\n");\r
   ot("  add r0,r0,r3 ;@ r0 = Memory Base + New PC\n");\r
+ #ifdef MEMHANDLERS_DIRECT_PREFIX\r
+  ot("  bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);\r
+ #else\r
   ot("  ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+ #endif\r
   ot("  mov r4,r0\n");\r
 #else\r
   ot("  add r4,r0,r3 ;@ r4 = Memory Base + New PC\n");\r
@@ -854,8 +904,8 @@ static void PrintFramework()
 // Trashes r0-r3,r12,lr\r
 int MemHandler(int type,int size,int addrreg,int need_addrerr_check)\r
 {\r
-  int func=0;\r
-  func=0x68+type*0xc+(size<<2); // Find correct offset\r
+  int func=0x68+type*0xc+(size<<2); // Find correct offset\r
+  char what[32];\r
 \r
 #if MEMHANDLERS_NEED_FLAGS\r
   ot("  mov r3,r10,lsr #28\n");\r
@@ -894,6 +944,14 @@ int MemHandler(int type,int size,int addrreg,int need_addrerr_check)
   }\r
   else\r
 #endif\r
+\r
+  sprintf(what, "%s%d", type==0 ? "read" : (type==1 ? "write" : "fetch"), 8<<size);\r
+#ifdef MEMHANDLERS_DIRECT_PREFIX\r
+  if (addrreg != 0)\r
+    ot("  mov r0,r%i\n", addrreg);\r
+  ot("  bl %s%s ;@ Call ", MEMHANDLERS_DIRECT_PREFIX, what);\r
+  (void)func; // avoid warning\r
+#else\r
   if (addrreg != 0)\r
   {\r
     ot("  add lr,pc,#4\n");\r
@@ -902,14 +960,11 @@ int MemHandler(int type,int size,int addrreg,int need_addrerr_check)
   else\r
     ot("  mov lr,pc\n");\r
   ot("  ldr pc,[r7,#0x%x] ;@ Call ",func);\r
+#endif\r
 \r
   // Document what we are calling:\r
-  if (type==0) ot("read");\r
-  if (type==1) ot("write");\r
-  if (type==2) ot("fetch");\r
-\r
-  if (type==1) ot("%d(r0,r1)",8<<size);\r
-  else         ot("%d(r0)",   8<<size);\r
+  if (type==1) ot("%s(r0,r1)",what);\r
+  else         ot("%s(r0)",   what);\r
   ot(" handler\n");\r
 \r
 #if MEMHANDLERS_CHANGE_FLAGS\r
@@ -1185,6 +1240,7 @@ static int CycloneMake()
 \r
   ot(ms?"  area |.text|, code\n":"  .text\n  .align 4\n\n");\r
   ot("  %s CycloneInit\n",globl);\r
+  ot("  %s CycloneReset\n",globl);\r
   ot("  %s CycloneRun\n",globl);\r
   ot("  %s CycloneSetSr\n",globl);\r
   ot("  %s CycloneGetSr\n",globl);\r

diff --git a/cpu/Cyclone/OpBranch.cpp b/cpu/Cyclone/OpBranch.cpp
index 804aa91..63569da 100644 (file)
--- a/cpu/Cyclone/OpBranch.cpp
+++ b/cpu/Cyclone/OpBranch.cpp
@@ -5,10 +5,14 @@
 static void CheckPc(void)\r
 {\r
 #if USE_CHECKPC_CALLBACK\r
+ #ifdef MEMHANDLERS_DIRECT_PREFIX\r
+  ot("  bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);\r
+ #else\r
   ot(";@ Check Memory Base+pc\n");\r
   ot("  mov lr,pc\n");\r
   ot("  ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
   ot("\n");\r
+ #endif\r
 #endif\r
 }\r
 \r

diff --git a/cpu/Cyclone/config.h b/cpu/Cyclone/config.h
index e180490..d73b5b5 100644 (file)
--- a/cpu/Cyclone/config.h
+++ b/cpu/Cyclone/config.h
@@ -65,6 +65,17 @@
 #define MEMHANDLERS_CHANGE_FLAGS    0\r
 #define MEMHANDLERS_CHANGE_CYCLES   0\r
 \r
+/*\r
+ * If the following macro is defined, Cyclone no longer calls read*, write*,\r
+ * fetch* and checkpc from it's context, it calls these functions directly\r
+ * instead, prefixed with prefix selected below. For example, if\r
+ * MEMHANDLERS_DIRECT_PREFIX is set to cyclone_, it will call cyclone_read8\r
+ * on byte reads.\r
+ * This is to avoid indirect jumps, which are slower. It also saves one ARM\r
+ * instruction.\r
+ */\r
+/* MEMHANDLERS_DIRECT_PREFIX "cyclone_" */\r
+\r
 /*\r
  * If enabled, Cyclone will call .IrqCallback routine from it's context whenever it\r
  * acknowledges an IRQ. IRQ level (.irq) is not cleared automatically, do this in your\r

diff --git a/cpu/Cyclone/config_pico.h b/cpu/Cyclone/config_pico.h
index 8607070..af9ab5e 100644 (file)
--- a/cpu/Cyclone/config_pico.h
+++ b/cpu/Cyclone/config_pico.h
@@ -21,6 +21,8 @@
 #define MEMHANDLERS_CHANGE_FLAGS    0\r
 #define MEMHANDLERS_CHANGE_CYCLES   0\r
 \r
+#define MEMHANDLERS_DIRECT_PREFIX   "cyclone_"\r
+\r
 #define USE_INT_ACK_CALLBACK        1\r
 \r
 #define INT_ACK_NEEDS_STUFF         0\r