core, fix for vdp save/load regression

diff --git a/pico/videoport.c b/pico/videoport.c
index 8269d89..1ecb311 100644 (file)
--- a/pico/videoport.c
+++ b/pico/videoport.c
@@ -1165,7 +1165,7 @@ void PicoVideoLoad(void)
   }\r
 \r
   // fake entries in the FIFO if there are outstanding transfers\r
-  vf->fifo_ql = vf->fifo_qx = vf->fifo_total = 0;\r
+  vf->fifo_ql = vf->fifo_qx = vf->fifo_cnt = vf->fifo_total = 0;\r
   if (pv->fifo_cnt) {\r
     int wc = (pv->fifo_cnt + b) >> b;\r
     pv->status |= PVS_FIFORUN|PVS_CPUWR;\r