From: frangarcj Date: Tue, 6 Sep 2016 11:49:55 +0000 (+0200) Subject: (VITA) Some dynarec X-Git-Tag: r24l~839^2~3 X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1a5fd79401ac52789fad34c6b852b947200a6334;p=pcsx_rearmed.git (VITA) Some dynarec --- diff --git a/frontend/libretro.c b/frontend/libretro.c index 5bf737fc..75f9b983 100644 --- a/frontend/libretro.c +++ b/frontend/libretro.c @@ -256,6 +256,85 @@ void pl_3ds_munmap(void *ptr, size_t size, enum psxMapTag tag) } #endif +#ifdef VITA +typedef struct +{ + void* buffer; + uint32_t target_map; + size_t size; + enum psxMapTag tag; +}psx_map_t; + +psx_map_t custom_psx_maps[] = { + {NULL, NULL, 0x210000, MAP_TAG_RAM}, // 0x80000000 + {NULL, NULL, 0x010000, MAP_TAG_OTHER}, // 0x1f800000 + {NULL, NULL, 0x080000, MAP_TAG_OTHER}, // 0x1fc00000 + {NULL, NULL, 0x800000, MAP_TAG_LUTS}, // 0x08000000 + {NULL, NULL, 0x200000, MAP_TAG_VRAM}, // 0x00000000 +}; + +void* pl_vita_mmap(unsigned long addr, size_t size, int is_fixed, + enum psxMapTag tag) +{ + (void)is_fixed; + (void)addr; + + + psx_map_t* custom_map = custom_psx_maps; + + for (; custom_map->size; custom_map++) + { + if ((custom_map->size == size) && (custom_map->tag == tag)) + { + int block, ret; + char blockname[32]; + sprintf(blockname, "CODE 0x%08X",tag); + + block = sceKernelAllocMemBlockForVM(blockname, size); + if(block<=0){ + sceClibPrintf("could not alloc mem block @0x%08X 0x%08X \n", block, tag); + exit(1); + } + + // get base address + ret = sceKernelGetMemBlockBase(block, &custom_map->buffer); + if (ret < 0) + { + sceClibPrintf("could get address @0x%08X 0x%08X 0x%08X \n", block, ret, tag); + exit(1); + } + + custom_map->target_map = block; + + return custom_map->buffer; + } + } + + + return malloc(size); +} + +void pl_vita_munmap(void *ptr, size_t size, enum psxMapTag tag) +{ + (void)tag; + + psx_map_t* custom_map = custom_psx_maps; + + for (; custom_map->size; custom_map++) + { + if ((custom_map->buffer == ptr)) + { + sceKernelFreeMemBlock(custom_map->target_map); + custom_map->buffer = NULL; + custom_map->target_map = NULL; + return; + } + } + + free(ptr); +} +#endif + static void *pl_mmap(unsigned int size) { return psxMap(0, size, 0, MAP_TAG_VRAM); @@ -1474,6 +1553,10 @@ void retro_init(void) #ifdef _3DS psxMapHook = pl_3ds_mmap; psxUnmapHook = pl_3ds_munmap; +#endif +#ifdef VITA + psxMapHook = pl_vita_mmap; + psxUnmapHook = pl_vita_munmap; #endif ret = emu_core_preinit(); #ifdef _3DS diff --git a/frontend/vita/pthread.h b/frontend/vita/pthread.h index c18b20b4..e1afdc5f 100644 --- a/frontend/vita/pthread.h +++ b/frontend/vita/pthread.h @@ -1,4 +1,4 @@ -/* Copyright (C) 2010-2015 The RetroArch team +/* Copyright (C) 2010-2016 The RetroArch team * * --------------------------------------------------------------------------------------- * The following license statement only applies to this file (psp_pthread.h). @@ -26,6 +26,7 @@ #ifdef VITA #include +#include #else #include #include @@ -34,13 +35,20 @@ #include #include -#define STACKSIZE (64 * 1024) +#define STACKSIZE (8 * 1024) typedef SceUID pthread_t; typedef SceUID pthread_mutex_t; typedef void* pthread_mutexattr_t; typedef int pthread_attr_t; -typedef SceUID pthread_cond_t; + +typedef struct +{ + SceUID mutex; + SceUID sema; + int waiting; +} pthread_cond_t; + typedef SceUID pthread_condattr_t; /* Use pointer values to create unique names for threads/mutexes */ @@ -65,14 +73,15 @@ static int psp_thread_wrap(SceSize args, void *argp) static INLINE int pthread_create(pthread_t *thread, const pthread_attr_t *attr, void *(*start_routine)(void*), void *arg) { - sprintf(name_buffer, "0x%08X", (uint32_t) thread); + sprintf(name_buffer, "0x%08X", (unsigned int) thread); - *thread = sceKernelCreateThread(name_buffer, - psp_thread_wrap, 0x20, STACKSIZE, 0, #ifdef VITA - 0, + *thread = sceKernelCreateThread(name_buffer, psp_thread_wrap, + 0x10000100, 0x10000, 0, 0, NULL); +#else + *thread = sceKernelCreateThread(name_buffer, + psp_thread_wrap, 0x20, STACKSIZE, 0, NULL); #endif - NULL); sthread_args_struct sthread_args; sthread_args.arg = arg; @@ -84,10 +93,13 @@ static INLINE int pthread_create(pthread_t *thread, static INLINE int pthread_mutex_init(pthread_mutex_t *mutex, const pthread_mutexattr_t *attr) { - sprintf(name_buffer, "0x%08X", (uint32_t) mutex); + sprintf(name_buffer, "0x%08X", (unsigned int) mutex); #ifdef VITA - return *mutex = sceKernelCreateMutex(name_buffer, 0, 0, 0); + *mutex = sceKernelCreateMutex(name_buffer, 0, 0, 0); + if(*mutex<0) + return *mutex; + return 0; #else return *mutex = sceKernelCreateSema(name_buffer, 0, 1, 1, NULL); #endif @@ -105,7 +117,9 @@ static INLINE int pthread_mutex_destroy(pthread_mutex_t *mutex) static INLINE int pthread_mutex_lock(pthread_mutex_t *mutex) { #ifdef VITA - return sceKernelLockMutex(*mutex, 1, 0); + int ret = sceKernelLockMutex(*mutex, 1, 0); + return ret; + #else /* FIXME: stub */ return 1; @@ -115,7 +129,8 @@ static INLINE int pthread_mutex_lock(pthread_mutex_t *mutex) static INLINE int pthread_mutex_unlock(pthread_mutex_t *mutex) { #ifdef VITA - return sceKernelUnlockMutex(*mutex, 1); + int ret = sceKernelUnlockMutex(*mutex, 1); + return ret; #else /* FIXME: stub */ return 1; @@ -125,16 +140,18 @@ static INLINE int pthread_mutex_unlock(pthread_mutex_t *mutex) static INLINE int pthread_join(pthread_t thread, void **retval) { - int exit_status; - SceUInt timeout = (SceUInt)-1; #ifdef VITA - sceKernelWaitThreadEnd(thread, &exit_status, &timeout); + int res = sceKernelWaitThreadEnd(thread, 0, 0); + if (res < 0) + return res; + return sceKernelDeleteThread(thread); #else + SceUInt timeout = (SceUInt)-1; sceKernelWaitThreadEnd(thread, &timeout); exit_status = sceKernelGetThreadExitStatus(thread); -#endif sceKernelDeleteThread(thread); return exit_status; +#endif } static INLINE int pthread_mutex_trylock(pthread_mutex_t *mutex) @@ -150,51 +167,142 @@ static INLINE int pthread_mutex_trylock(pthread_mutex_t *mutex) static INLINE int pthread_cond_wait(pthread_cond_t *cond, pthread_mutex_t *mutex) { +#ifdef VITA + int ret = pthread_mutex_lock(&cond->mutex); + if (ret < 0) + return ret; + ++cond->waiting; + pthread_mutex_unlock(mutex); + pthread_mutex_unlock(&cond->mutex); + + ret = sceKernelWaitSema(cond->sema, 1, 0); + if (ret < 0) + sceClibPrintf("Premature wakeup: %08X", ret); + pthread_mutex_lock(mutex); + return ret; +#else + /* FIXME: stub */ sceKernelDelayThread(10000); return 1; +#endif } static INLINE int pthread_cond_timedwait(pthread_cond_t *cond, pthread_mutex_t *mutex, const struct timespec *abstime) { - //FIXME: stub +#ifdef VITA + int ret = pthread_mutex_lock(&cond->mutex); + if (ret < 0) + return ret; + ++cond->waiting; + pthread_mutex_unlock(mutex); + pthread_mutex_unlock(&cond->mutex); + + SceUInt timeout = 0; + + timeout = abstime->tv_sec; + timeout += abstime->tv_nsec / 1.0e6; + + ret = sceKernelWaitSema(cond->sema, 1, &timeout); + if (ret < 0) + sceClibPrintf("Premature wakeup: %08X", ret); + pthread_mutex_lock(mutex); + return ret; + +#else + /* FIXME: stub */ return 1; +#endif } static INLINE int pthread_cond_init(pthread_cond_t *cond, const pthread_condattr_t *attr) { - //FIXME: stub +#ifdef VITA + + pthread_mutex_init(&cond->mutex,NULL); + if(cond->mutex<0){ + return cond->mutex; + } + sprintf(name_buffer, "0x%08X", (unsigned int) cond); + //cond->sema = sceKernelCreateCond(name_buffer, 0, cond->mutex, 0); + cond->sema = sceKernelCreateSema(name_buffer, 0, 0, 1, 0); + if(cond->sema<0){ + pthread_mutex_destroy(&cond->mutex); + return cond->sema; + } + + cond->waiting = 0; + + + return 0; + + +#else + /* FIXME: stub */ return 1; +#endif } static INLINE int pthread_cond_signal(pthread_cond_t *cond) { - //FIXME: stub +#ifdef VITA + pthread_mutex_lock(&cond->mutex); + if (cond->waiting) + { + --cond->waiting; + sceKernelSignalSema(cond->sema, 1); + } + pthread_mutex_unlock(&cond->mutex); + return 0; +#else + /* FIXME: stub */ return 1; +#endif } static INLINE int pthread_cond_broadcast(pthread_cond_t *cond) { - //FIXME: stub + /* FIXME: stub */ return 1; } static INLINE int pthread_cond_destroy(pthread_cond_t *cond) { - //FIXME: stub - return 1; +#ifdef VITA + int ret = sceKernelDeleteSema(cond->sema); + if(ret < 0) + return ret; + + return sceKernelDeleteMutex(cond->mutex); +#else + /* FIXME: stub */ + return 1; +#endif } static INLINE int pthread_detach(pthread_t thread) { - return 1; + return 0; } static INLINE void pthread_exit(void *retval) { - (void)retval; +#ifdef VITA + sceKernelExitDeleteThread(sceKernelGetThreadId()); +#endif +} + +static INLINE pthread_t pthread_self(void) +{ + /* zero 20-mar-2016: untested */ + return sceKernelGetThreadId(); +} + +static INLINE int pthread_equal(pthread_t t1, pthread_t t2) +{ + return t1 == t2; } #endif //_PSP_PTHREAD_WRAP__ diff --git a/frontend/vita/sys/mman.h b/frontend/vita/sys/mman.h index 66467f40..89da513c 100644 --- a/frontend/vita/sys/mman.h +++ b/frontend/vita/sys/mman.h @@ -18,19 +18,32 @@ extern "C" { static inline void* mmap(void *addr, size_t len, int prot, int flags, int fd, off_t offset) { - (void)addr; (void)prot; (void)flags; (void)fd; (void)offset; - void* addr_out; + int block, ret; + + block = sceKernelAllocMemBlockForVM("code", len); + if(block<=0){ + sceClibPrintf("could not alloc mem block @0x%08X 0x%08X \n", block, len); + exit(1); + } + + // get base address + ret = sceKernelGetMemBlockBase(block, &addr); + if (ret < 0) + { + sceClibPrintf("could get address @0x%08X 0x%08X \n", block, addr); + exit(1); + } + - addr_out = malloc(len); - if(!addr_out) + if(!addr) return MAP_FAILED; - return addr_out; + return addr; } static inline int mprotect(void *addr, size_t len, int prot) @@ -43,8 +56,9 @@ static inline int mprotect(void *addr, size_t len, int prot) static inline int munmap(void *addr, size_t len) { - free(addr); - return 0; + int uid = sceKernelFindMemBlockByAddr(addr, len); + + return sceKernelFreeMemBlock(uid); } @@ -53,4 +67,3 @@ static inline int munmap(void *addr, size_t len) #endif #endif // MMAN_H - diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 65c8f03e..1c0ab56e 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -56,6 +56,13 @@ static void __clear_cache(void *start, void *end) { #elif defined(_3DS) #include "3ds_utils.h" #define __clear_cache(start,end) svcFlushProcessDataCache(0xFFFF8001, start, (u32)(end)-(u32)(start)) +#elif defined(VITA) +#define __clear_cache vita_clear_cache +static void __clear_cache(void *start, void *end) { + size_t len = (char *)end - (char *)start; + int block = sceKernelFindMemBlockByAddr(start,len); + sceKernelSyncVMDomain(block, start, len); +} #endif #define MAXBLOCK 4096 @@ -196,7 +203,7 @@ struct ll_entry #define STORE 2 // Store #define LOADLR 3 // Unaligned load #define STORELR 4 // Unaligned store -#define MOV 5 // Move +#define MOV 5 // Move #define ALU 6 // Arithmetic/logic #define MULTDIV 7 // Multiply/divide #define SHIFT 8 // Shift by register @@ -314,18 +321,18 @@ static void tlb_hacks() { u_int addr; int n; - switch (ROM_HEADER->Country_code&0xFF) + switch (ROM_HEADER->Country_code&0xFF) { case 0x45: // U addr=0x34b30; - break; - case 0x4A: // J - addr=0x34b70; - break; - case 0x50: // E + break; + case 0x4A: // J + addr=0x34b70; + break; + case 0x50: // E addr=0x329f0; - break; - default: + break; + default: // Unknown country code addr=0; break; @@ -526,7 +533,7 @@ static void flush_dirty_uppers(struct regstat *cur) for (hr=0;hrdirty>>hr)&1) { reg=cur->regmap[hr]; - if(reg>=64) + if(reg>=64) if((cur->is32>>(reg&63))&1) cur->regmap[hr]=-1; } } @@ -683,7 +690,7 @@ int needed_again(int r, int i) int j; int b=-1; int rn=10; - + if(i>0&&(itype[i-1]==UJUMP||itype[i-1]==RJUMP||(source[i-1]>>16)==0x1000)) { if(ba[i-1]start+slen*4-4) @@ -786,7 +793,7 @@ int loop_reg(int i, int r, int hr) void alloc_all(struct regstat *cur,int i) { int hr; - + for(hr=0;hrregmap[hr]&63)!=rs1[i])&&((cur->regmap[hr]&63)!=rs2[i])&& @@ -827,7 +834,7 @@ void mult64(uint64_t m1,uint64_t m2) unsigned long long int result1, result2, result3, result4; unsigned long long int temp1, temp2, temp3, temp4; int sign = 0; - + if (m1 < 0) { op2 = -m1; @@ -840,22 +847,22 @@ void mult64(uint64_t m1,uint64_t m2) sign = 1 - sign; } else op4 = m2; - + op1 = op2 & 0xFFFFFFFF; op2 = (op2 >> 32) & 0xFFFFFFFF; op3 = op4 & 0xFFFFFFFF; op4 = (op4 >> 32) & 0xFFFFFFFF; - + temp1 = op1 * op3; temp2 = (temp1 >> 32) + op1 * op4; temp3 = op2 * op3; temp4 = (temp3 >> 32) + op2 * op4; - + result1 = temp1 & 0xFFFFFFFF; result2 = temp2 + (temp3 & 0xFFFFFFFF); result3 = (result2 >> 32) + temp4; result4 = (result3 >> 32); - + lo = result1 | (result2 << 32); hi = (result3 & 0xFFFFFFFF) | (result4 << 32); if (sign) @@ -871,25 +878,25 @@ void multu64(uint64_t m1,uint64_t m2) unsigned long long int op1, op2, op3, op4; unsigned long long int result1, result2, result3, result4; unsigned long long int temp1, temp2, temp3, temp4; - + op1 = m1 & 0xFFFFFFFF; op2 = (m1 >> 32) & 0xFFFFFFFF; op3 = m2 & 0xFFFFFFFF; op4 = (m2 >> 32) & 0xFFFFFFFF; - + temp1 = op1 * op3; temp2 = (temp1 >> 32) + op1 * op4; temp3 = op2 * op3; temp4 = (temp3 >> 32) + op2 * op4; - + result1 = temp1 & 0xFFFFFFFF; result2 = temp2 + (temp3 & 0xFFFFFFFF); result3 = (result2 >> 32) + temp4; result4 = (result3 >> 32); - + lo = result1 | (result2 << 32); hi = (result3 & 0xFFFFFFFF) | (result4 << 32); - + //printf("TRACE: dmultu %8x%8x %8x%8x\n",(int)reg[HIREG],(int)(reg[HIREG]>>32) // ,(int)reg[LOREG],(int)(reg[LOREG]>>32)); } @@ -1011,7 +1018,7 @@ void ll_remove_matching_addrs(struct ll_entry **head,int addr,int shift) { struct ll_entry *next; while(*head) { - if(((u_int)((*head)->addr)>>shift)==(addr>>shift) || + if(((u_int)((*head)->addr)>>shift)==(addr>>shift) || ((u_int)((*head)->addr-MAX_OUTPUT_BLOCK_SIZE)>>shift)==(addr>>shift)) { inv_debug("EXP: Remove pointer to %x (%x)\n",(int)(*head)->addr,(*head)->vaddr); @@ -1107,7 +1114,7 @@ static void invalidate_block_range(u_int block, u_int first, u_int last) #ifdef __arm__ do_clear_cache(); #endif - + // Don't trap writes invalid_code[block]=1; #ifndef DISABLE_TLB @@ -3386,7 +3393,7 @@ void storelr_assemble(int i,struct regstat *i_regs) if(map<0) emit_loadreg(ROREG,map=HOST_TEMPREG); gen_tlb_addr_w(temp,map); #else - if((u_int)rdram!=0x80000000) + if((u_int)rdram!=0x80000000) emit_addimm_no_flags((u_int)rdram-(u_int)0x80000000,temp); #endif }else{ // using tlb @@ -4159,7 +4166,7 @@ void address_generation(int i,struct regstat *i_regs,signed char entry[]) int mgr=MGEN1+(i&1); if(itype[i]==LOAD) { ra=get_reg(i_regs->regmap,rt1[i]); - if(ra<0) ra=get_reg(i_regs->regmap,-1); + if(ra<0) ra=get_reg(i_regs->regmap,-1); assert(ra>=0); } if(itype[i]==LOADLR) { @@ -4757,7 +4764,7 @@ int match_bt(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty,int addr) { return 0; } - else + else if((i_dirty>>hr)&1) { if(i_regmap[hr]>s1l)&(branch_regs[i].is32>>rs1[i])&1) emit_loadreg(rs1[i],s1l); - } + } else { if((branch_regs[i].dirty>>s1l)&(branch_regs[i].is32>>rs2[i])&1) emit_loadreg(rs2[i],s1l); @@ -5194,7 +5201,7 @@ void do_ccstub(int n) load_all_regs(branch_regs[i].regmap); } emit_jmp(stubs[n][2]); // return address - + /* This works but uses a lot of memory... emit_readword((int)&last_count,ECX); emit_add(HOST_CCREG,ECX,EAX); @@ -5228,7 +5235,7 @@ add_to_linker(int addr,int target,int ext) { link_addr[linkcount][0]=addr; link_addr[linkcount][1]=target; - link_addr[linkcount][2]=ext; + link_addr[linkcount][2]=ext; linkcount++; } @@ -5254,7 +5261,7 @@ static void ujump_assemble_write_ra(int i) #endif { #ifdef REG_PREFETCH - if(temp>=0) + if(temp>=0) { if(i_regmap[temp]!=PTEMP) emit_movimm((int)hash_table[((return_address>>16)^return_address)&0xFFFF],temp); } @@ -5275,10 +5282,10 @@ void ujump_assemble(int i,struct regstat *i_regs) address_generation(i+1,i_regs,regs[i].regmap_entry); #ifdef REG_PREFETCH int temp=get_reg(branch_regs[i].regmap,PTEMP); - if(rt1[i]==31&&temp>=0) + if(rt1[i]==31&&temp>=0) { int return_address=start+i*4+8; - if(get_reg(branch_regs[i].regmap,31)>0) + if(get_reg(branch_regs[i].regmap,31)>0) if(i_regmap[temp]==PTEMP) emit_movimm((int)hash_table[((return_address>>16)^return_address)&0xFFFF],temp); } #endif @@ -5329,7 +5336,7 @@ static void rjump_assemble_write_ra(int i) assert(rt>=0); return_address=start+i*4+8; #ifdef REG_PREFETCH - if(temp>=0) + if(temp>=0) { if(i_regmap[temp]!=PTEMP) emit_movimm((int)hash_table[((return_address>>16)^return_address)&0xFFFF],temp); } @@ -5358,7 +5365,7 @@ void rjump_assemble(int i,struct regstat *i_regs) } address_generation(i+1,i_regs,regs[i].regmap_entry); #ifdef REG_PREFETCH - if(rt1[i]==31) + if(rt1[i]==31) { if((temp=get_reg(branch_regs[i].regmap,PTEMP))>=0) { int return_address=start+i*4+8; @@ -5492,7 +5499,7 @@ void cjump_assemble(int i,struct regstat *i_regs) #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK if(i>(ba[i]-start)>>2) invert=1; #endif - + if(ooo[i]) { s1l=get_reg(branch_regs[i].regmap,rs1[i]); s1h=get_reg(branch_regs[i].regmap,rs1[i]|64); @@ -5547,7 +5554,7 @@ void cjump_assemble(int i,struct regstat *i_regs) load_regs(regs[i].regmap,branch_regs[i].regmap,regs[i].was32,CCREG,CCREG); cc=get_reg(branch_regs[i].regmap,CCREG); assert(cc==HOST_CCREG); - if(unconditional) + if(unconditional) store_regs_bt(branch_regs[i].regmap,branch_regs[i].is32,branch_regs[i].dirty,ba[i]); //do_cc(i,branch_regs[i].regmap,&adj,unconditional?ba[i]:-1,unconditional); //assem_debug("cycle count (adj)\n"); @@ -5619,7 +5626,7 @@ void cjump_assemble(int i,struct regstat *i_regs) emit_jne(0); } } // if(!only32) - + //printf("branch(%d): eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",i,branch_regs[i].regmap[0],branch_regs[i].regmap[1],branch_regs[i].regmap[2],branch_regs[i].regmap[3],branch_regs[i].regmap[5],branch_regs[i].regmap[6],branch_regs[i].regmap[7]); assert(s1l>=0); if(opcode[i]==4) // BEQ @@ -5749,7 +5756,7 @@ void cjump_assemble(int i,struct regstat *i_regs) emit_jne(1); } } // if(!only32) - + //printf("branch(%d): eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",i,branch_regs[i].regmap[0],branch_regs[i].regmap[1],branch_regs[i].regmap[2],branch_regs[i].regmap[3],branch_regs[i].regmap[5],branch_regs[i].regmap[6],branch_regs[i].regmap[7]); assert(s1l>=0); if((opcode[i]&0x2f)==4) // BEQ @@ -5932,7 +5939,7 @@ void sjump_assemble(int i,struct regstat *i_regs) } cc=get_reg(branch_regs[i].regmap,CCREG); assert(cc==HOST_CCREG); - if(unconditional) + if(unconditional) store_regs_bt(branch_regs[i].regmap,branch_regs[i].is32,branch_regs[i].dirty,ba[i]); //do_cc(i,branch_regs[i].regmap,&adj,unconditional?ba[i]:-1,unconditional); assem_debug("cycle count (adj)\n"); @@ -6019,7 +6026,7 @@ void sjump_assemble(int i,struct regstat *i_regs) } } } // if(!only32) - + if(invert) { #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK if(match&&(!internal||!is_ds[(ba[i]-start)>>2])) { @@ -6267,7 +6274,7 @@ void fjump_assemble(int i,struct regstat *i_regs) { } } // if(!only32) - + if(invert) { if(adj) emit_addimm(cc,-CLOCK_ADJUST(adj),cc); #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK @@ -6775,14 +6782,14 @@ void unneeded_registers(int istart,int iend,int r) { // If subroutine call, flag return address as a possible branch target if(rt1[i]==31 && i=(start+slen*4)) { // Branch out of this block, flush all regs u=1; uu=1; gte_u=gte_u_unknown; - /* Hexagon hack + /* Hexagon hack if(itype[i]==UJUMP&&rt1[i]==31) { uu=u=0x300C00F; // Discard at, v0-v1, t6-t9 @@ -7045,7 +7052,7 @@ static void provisional_32bit() int i,j; uint64_t is32=1; uint64_t lastbranch=1; - + for(i=0;i0) { @@ -7082,13 +7089,13 @@ static void provisional_32bit() uint64_t temp_is32=is32; for(j=i-1;j>=0;j--) { - if(ba[j]==start+i*4) + if(ba[j]==start+i*4) //temp_is32&=branch_regs[j].is32; temp_is32&=p32[j]; } for(j=i;j=0;i--) { int hr; @@ -7373,7 +7380,7 @@ static void provisional_r32() } //requires_32bit[i]=r32; pr32[i]=r32; - + // Dirty registers which are 32-bit, require 32-bit input // as they will be written as 32-bit values for(hr=0;hristart) { - if(itype[i]!=RJUMP&&itype[i]!=UJUMP&&itype[i]!=CJUMP&&itype[i]!=SJUMP&&itype[i]!=FJUMP) + if(itype[i]!=RJUMP&&itype[i]!=UJUMP&&itype[i]!=CJUMP&&itype[i]!=SJUMP&&itype[i]!=FJUMP) { // Don't store a register immediately after writing it, // may prevent dual-issue. @@ -7974,17 +7981,28 @@ void new_dynarec_init() { SysPrintf("Init new dynarec\n"); out=(u_char *)BASE_ADDR; -#if BASE_ADDR_FIXED +#if defined(VITA) + if (mmap (out, 1< %x\n", (int)addr, (int)out); //printf("NOTCOMPILED: addr = %x -> %x\n", (int)addr, (int)out); //printf("TRACE: count=%d next=%d (compile %x)\n",Count,next_interupt,addr); - //if(debug) + //if(debug) //printf("TRACE: count=%d next=%d (checksum %x)\n",Count,next_interupt,mchecksum()); //printf("fpu mapping=%x enabled=%x\n",(Status & 0x04000000)>>26,(Status & 0x20000000)>>29); /*if(Count>=312978186) { @@ -8246,7 +8264,7 @@ int new_recompile_block(int addr) unsigned int type,op,op2; //printf("addr = %x source = %x %x\n", addr,source,source[0]); - + /* Pass 1 disassembly */ for(i=0;!done;i++) { @@ -8906,7 +8924,7 @@ int new_recompile_block(int addr) /* Pass 2 - Register dependencies and branch targets */ unneeded_registers(0,slen-1,0); - + /* Pass 3 - Register allocation */ struct regstat current; // Current register allocations/status @@ -8936,7 +8954,7 @@ int new_recompile_block(int addr) unneeded_reg_upper[0]=1; current.regmap[HOST_BTREG]=BTREG; } - + for(i=0;i=0;j--) { - if(ba[j]==start+i*4) + if(ba[j]==start+i*4) temp_is32&=branch_regs[j].is32; } for(j=i;j=0;j--) { - if(ba[j]==start+i*4+4) + if(ba[j]==start+i*4+4) temp_is32&=branch_regs[j].is32; } for(j=i;j=0) + if(get_reg(current.regmap,r|64)>=0) current.regmap[get_reg(current.regmap,r|64)]=-1; } } @@ -9059,12 +9077,12 @@ int new_recompile_block(int addr) uint64_t temp_is32=current.is32; for(j=i-1;j>=0;j--) { - if(ba[j]==start+i*4+8) + if(ba[j]==start+i*4+8) temp_is32&=branch_regs[j].is32; } for(j=i;j=0) + if(get_reg(current.regmap,r|64)>=0) current.regmap[get_reg(current.regmap,r|64)]=-1; } } @@ -9172,7 +9190,7 @@ int new_recompile_block(int addr) } } else { // First instruction expects CCREG to be allocated - if(i==0&&hr==HOST_CCREG) + if(i==0&&hr==HOST_CCREG) regs[i].regmap_entry[hr]=CCREG; else regs[i].regmap_entry[hr]=-1; @@ -9507,7 +9525,7 @@ int new_recompile_block(int addr) pagespan_alloc(¤t,i); break; } - + // Drop the upper half of registers that have become 32-bit current.uu|=current.is32&((1LL<=0;i--) { int hr; @@ -10065,7 +10083,7 @@ int new_recompile_block(int addr) } // Save it needed_reg[i]=nr; - + // Deallocate unneeded registers for(hr=0;hr=start && ba[i]<(start+i*4)) + if(ba[i]>=start && ba[i]<(start+i*4)) if(itype[i+1]==NOP||itype[i+1]==MOV||itype[i+1]==ALU ||itype[i+1]==SHIFTIMM||itype[i+1]==IMM16||itype[i+1]==LOAD ||itype[i+1]==STORE||itype[i+1]==STORELR||itype[i+1]==C1LS @@ -10255,10 +10273,10 @@ int new_recompile_block(int addr) } } if(ooo[i]) { - if(count_free_regs(regs[i].regmap)<=minimum_free_regs[i+1]) + if(count_free_regs(regs[i].regmap)<=minimum_free_regs[i+1]) f_regmap[hr]=branch_regs[i].regmap[hr]; }else{ - if(count_free_regs(branch_regs[i].regmap)<=minimum_free_regs[i+1]) + if(count_free_regs(branch_regs[i].regmap)<=minimum_free_regs[i+1]) f_regmap[hr]=branch_regs[i].regmap[hr]; } // Avoid dirty->clean transition @@ -10428,10 +10446,10 @@ int new_recompile_block(int addr) if(itype[j]==CJUMP||itype[j]==SJUMP||itype[j]==FJUMP) { if(ooo[j]) { - if(count_free_regs(regs[j].regmap)<=minimum_free_regs[j+1]) + if(count_free_regs(regs[j].regmap)<=minimum_free_regs[j+1]) break; }else{ - if(count_free_regs(branch_regs[j].regmap)<=minimum_free_regs[j+1]) + if(count_free_regs(branch_regs[j].regmap)<=minimum_free_regs[j+1]) break; } if(get_reg(branch_regs[j].regmap,f_regmap[hr])>=0) { @@ -10504,7 +10522,7 @@ int new_recompile_block(int addr) regs[k].isconst&=~(1<i&&f_regmap[HOST_CCREG]==CCREG) @@ -10546,7 +10564,7 @@ int new_recompile_block(int addr) } } } - + // Cache memory offset or tlb map pointer if a register is available #ifndef HOST_IMM_ADDR32 #ifndef RAM_OFFSET @@ -10726,7 +10744,7 @@ int new_recompile_block(int addr) } } #endif - + // This allocates registers (if possible) one instruction prior // to use, which can avoid a load-use penalty on certain CPUs. for(i=0;i=0) { @@ -10901,7 +10919,7 @@ int new_recompile_block(int addr) } } if(itype[i+1]==LOAD||itype[i+1]==LOADLR||itype[i+1]==STORE||itype[i+1]==STORELR/*||itype[i+1]==C1LS||||itype[i+1]==C2LS*/) { - if(itype[i+1]==LOAD) + if(itype[i+1]==LOAD) hr=get_reg(regs[i+1].regmap,rt1[i+1]); if(itype[i+1]==LOADLR||(opcode[i+1]&0x3b)==0x31||(opcode[i+1]&0x3b)==0x32) // LWC1/LDC1, LWC2/LDC2 hr=get_reg(regs[i+1].regmap,FTEMP); @@ -10925,16 +10943,16 @@ int new_recompile_block(int addr) } } } - + /* Pass 6 - Optimize clean/dirty state */ clean_registers(0,slen-1,1); - + /* Pass 7 - Identify 32-bit registers */ #ifndef FORCE32 provisional_r32(); u_int r32=0; - + for (i=slen-1;i>=0;i--) { int hr; @@ -11030,7 +11048,7 @@ int new_recompile_block(int addr) if((regs[i].was32>>dep2[i])&1) r32|=1LL<(u_int)BASE_ADDR+(1<>12;i<=(start+slen*4)>>12;i++) { invalid_code[i]=0; @@ -11618,9 +11636,9 @@ int new_recompile_block(int addr) invalid_code[((u_int)0x80000000>>12)|(i&0x1ff)]= invalid_code[((u_int)0xa0000000>>12)|(i&0x1ff)]=0; #endif - + /* Pass 10 - Free memory by expiring oldest blocks */ - + int end=((((int)out-(int)BASE_ADDR)>>(TARGET_SIZE_2-16))+16384)&65535; while(expirep!=end) { @@ -11662,7 +11680,7 @@ int new_recompile_block(int addr) case 3: // Clear jump_out #ifdef __arm__ - if((expirep&2047)==0) + if((expirep&2047)==0) do_clear_cache(); #endif ll_remove_matching_addrs(jump_out+(expirep&2047),base,shift);